VirtualBox

Changeset 92453 in vbox for trunk/src/VBox/VMM/VMMR3


Ignore:
Timestamp:
Nov 16, 2021 10:44:37 AM (3 years ago)
Author:
vboxsync
Message:

VMM/NEMR3Native-darwin.cpp: Fixes to the guest state import/export (especially the floating point/SIMD state), fixes SIMD state corruptions with 64bit guests, bugref:9044

File:
1 edited

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Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin.cpp

    r92376 r92453  
    967967        APICSetTpr(pVCpu, u64Cr8);
    968968    }
     969    if (fWhat & CPUMCTX_EXTRN_XCRx)
     970        READ_GREG(HV_X86_XCR0, pVCpu->cpum.GstCtx.aXcr[0]);
    969971
    970972    /* Debug registers. */
     
    10871089        pVCpu->cpum.GstCtx.fExtrn = 0;
    10881090
     1091#ifdef LOG_ENABLED
     1092    nemR3DarwinLogState(pVM, pVCpu);
     1093#endif
     1094
    10891095    /* Typical. */
    10901096    if (!fMaybeChangedMode && !fUpdateCr3)
     
    12621268
    12631269
     1270#if 0 /* unused */
    12641271DECL_FORCE_INLINE(bool) nemR3DarwinIsVmxLbr(PCVMCC pVM)
    12651272{
     
    12671274    return false;
    12681275}
     1276#endif
    12691277
    12701278
     
    12741282#define IN_NEM_DARWIN
    12751283//#define HMVMX_ALWAYS_TRAP_ALL_XCPTS
    1276 #define HMVMX_ALWAYS_SYNC_FULL_GUEST_STATE
     1284//#define HMVMX_ALWAYS_SYNC_FULL_GUEST_STATE
    12771285#define VCPU_2_VMXSTATE(a_pVCpu)            (a_pVCpu)->nem.s
    12781286#define VCPU_2_VMXSTATS(a_pVCpu)            (*(a_pVCpu)->nem.s.pVmxStats)
     
    15391547    RT_NOREF(pVM);
    15401548
     1549#ifdef LOG_ENABLED
     1550    nemR3DarwinLogState(pVM, pVCpu);
     1551#endif
     1552
    15411553    uint64_t const fWhat = ~pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_ALL;
    15421554    if (!fWhat)
     
    15711583    AssertLogRelMsgRCReturn(rc, ("rc=%Rrc\n", rc), rc);
    15721584
     1585    if (fWhat & CPUMCTX_EXTRN_XCRx)
     1586    {
     1587        WRITE_GREG(HV_X86_XCR0, pVCpu->cpum.GstCtx.aXcr[0]);
     1588        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_XCRx);
     1589    }
     1590
    15731591    if (fWhat & CPUMCTX_EXTRN_APIC_TPR)
     1592    {
    15741593        WRITE_GREG(HV_X86_TPR, CPUMGetGuestCR8(pVCpu));
     1594        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_APIC_TPR);
     1595    }
    15751596
    15761597    /* Debug registers. */
     
    15811602        WRITE_GREG(HV_X86_DR2, pVCpu->cpum.GstCtx.dr[2]); // CPUMGetHyperDR2(pVCpu));
    15821603        WRITE_GREG(HV_X86_DR3, pVCpu->cpum.GstCtx.dr[3]); // CPUMGetHyperDR3(pVCpu));
     1604        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_DR0_DR3);
    15831605    }
    15841606    if (fWhat & CPUMCTX_EXTRN_DR6)
     1607    {
    15851608        WRITE_GREG(HV_X86_DR6, pVCpu->cpum.GstCtx.dr[6]); // CPUMGetHyperDR6(pVCpu));
     1609        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_DR6);
     1610    }
    15861611    if (fWhat & CPUMCTX_EXTRN_DR7)
     1612    {
    15871613        WRITE_GREG(HV_X86_DR7, pVCpu->cpum.GstCtx.dr[7]); // CPUMGetHyperDR7(pVCpu));
    1588 
    1589     if (fWhat & (CPUMCTX_EXTRN_X87 | CPUMCTX_EXTRN_SSE_AVX))
     1614        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_DR7);
     1615    }
     1616
     1617    if (fWhat & (CPUMCTX_EXTRN_X87 | CPUMCTX_EXTRN_SSE_AVX | CPUMCTX_EXTRN_OTHER_XSAVE))
    15901618    {
    15911619        hv_return_t hrc = hv_vcpu_write_fpstate(pVCpu->nem.s.hVCpuId, &pVCpu->cpum.GstCtx.XState, sizeof(pVCpu->cpum.GstCtx.XState));
     
    15941622        else
    15951623            return nemR3DarwinHvSts2Rc(hrc);
     1624
     1625        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~(HM_CHANGED_GUEST_X87 | HM_CHANGED_GUEST_SSE_AVX | CPUMCTX_EXTRN_OTHER_XSAVE));
    15961626    }
    15971627
    15981628    /* MSRs */
    15991629    if (fWhat & CPUMCTX_EXTRN_EFER)
     1630    {
    16001631        WRITE_VMCS_FIELD(VMX_VMCS64_GUEST_EFER_FULL, pVCpu->cpum.GstCtx.msrEFER);
     1632        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_EFER_MSR);
     1633    }
    16011634    if (fWhat & CPUMCTX_EXTRN_KERNEL_GS_BASE)
     1635    {
    16021636        WRITE_MSR(MSR_K8_KERNEL_GS_BASE, pVCpu->cpum.GstCtx.msrKERNELGSBASE);
     1637        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_KERNEL_GS_BASE);
     1638    }
    16031639    if (fWhat & CPUMCTX_EXTRN_SYSENTER_MSRS)
    16041640    {
     
    16061642        WRITE_MSR(MSR_IA32_SYSENTER_EIP, pVCpu->cpum.GstCtx.SysEnter.eip);
    16071643        WRITE_MSR(MSR_IA32_SYSENTER_ESP, pVCpu->cpum.GstCtx.SysEnter.esp);
     1644        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_SYSENTER_MSR_MASK);
    16081645    }
    16091646    if (fWhat & CPUMCTX_EXTRN_SYSCALL_MSRS)
     
    16131650        WRITE_MSR(MSR_K8_CSTAR, pVCpu->cpum.GstCtx.msrCSTAR);
    16141651        WRITE_MSR(MSR_K8_SF_MASK, pVCpu->cpum.GstCtx.msrSFMASK);
     1652        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_SYSCALL_MSRS);
    16151653    }
    16161654    if (fWhat & CPUMCTX_EXTRN_OTHER_MSRS)
     
    16191657        if (RT_UNLIKELY(hrc != HV_SUCCESS))
    16201658            return nemR3DarwinHvSts2Rc(hrc);
     1659
     1660        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_OTHER_MSRS);
    16211661
    16221662#if 0
     
    16521692    WRITE_VMCS_FIELD(VMX_VMCS64_GUEST_DEBUGCTL_FULL, 0 /*MSR_IA32_DEBUGCTL_LBR*/);
    16531693
    1654 #if 0 /** @todo */
    1655     WRITE_GREG(HV_X86_TSS_BASE, );
    1656     WRITE_GREG(HV_X86_TSS_LIMIT, );
    1657     WRITE_GREG(HV_X86_TSS_AR, );
    1658     WRITE_GREG(HV_X86_XCR0, );
    1659 #endif
    1660 
    16611694    hv_vcpu_invalidate_tlb(pVCpu->nem.s.hVCpuId);
    16621695    hv_vcpu_flush(pVCpu->nem.s.hVCpuId);
     
    16651698
    16661699    /* Clear any bits that may be set but exported unconditionally or unused/reserved bits. */
    1667     ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~(  (HM_CHANGED_GUEST_GPRS_MASK & ~HM_CHANGED_GUEST_RSP)
    1668                                                    |  HM_CHANGED_GUEST_CR2
    1669                                                    | (HM_CHANGED_GUEST_DR_MASK & ~HM_CHANGED_GUEST_DR7)
    1670                                                    |  HM_CHANGED_GUEST_X87
    1671                                                    |  HM_CHANGED_GUEST_SSE_AVX
    1672                                                    |  HM_CHANGED_GUEST_OTHER_XSAVE
    1673                                                    |  HM_CHANGED_GUEST_XCRx
    1674                                                    |  HM_CHANGED_GUEST_KERNEL_GS_BASE /* Part of lazy or auto load-store MSRs. */
    1675                                                    |  HM_CHANGED_GUEST_SYSCALL_MSRS   /* Part of lazy or auto load-store MSRs. */
    1676                                                    |  HM_CHANGED_GUEST_TSC_AUX
    1677                                                    |  HM_CHANGED_GUEST_OTHER_MSRS
     1700    ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~(
     1701                                                     HM_CHANGED_GUEST_TSC_AUX
     1702                                                   | HM_CHANGED_GUEST_HWVIRT
     1703                                                   | HM_CHANGED_VMX_GUEST_AUTO_MSRS
     1704                                                   | HM_CHANGED_VMX_GUEST_LAZY_MSRS
    16781705                                                   | (HM_CHANGED_KEEPER_STATE_MASK & ~HM_CHANGED_VMX_MASK)));
    16791706
     
    17081735                                    VERR_NEM_IPE_0);
    17091736
    1710     /** @todo Only copy the state on demand (requires changing to adhere to fCtxChanged from th VMX code
    1711      * flags instead of the fExtrn one living in CPUM.
    1712      */
    1713     rc = nemR3DarwinCopyStateFromHv(pVM, pVCpu, UINT64_MAX);
     1737    /** @todo Only copy the state on demand (the R0 VT-x code saves some stuff unconditionally and the VMX template assumes that
     1738     * when handling exits). */
     1739    rc = nemR3DarwinCopyStateFromHv(pVM, pVCpu, CPUMCTX_EXTRN_ALL);
    17141740    AssertRCReturn(rc, rc);
    17151741
     
    17231749
    17241750/**
    1725  * Worker for nemR3NativeInit that loads the Hypervisor.framwork shared library.
     1751 * Worker for nemR3NativeInit that loads the Hypervisor.framework shared library.
    17261752 *
    17271753 * @returns VBox status code.
     
    23892415    if (pVM->nem.s.fCreatedAsid)
    23902416    {
    2391         hv_return_t hrc = hv_vcpu_set_space(pVCpu->nem.s.hVCpuId, pVM->nem.s.uVmAsid);
     2417        hrc = hv_vcpu_set_space(pVCpu->nem.s.hVCpuId, pVM->nem.s.uVmAsid);
    23922418        AssertReturn(hrc == HV_SUCCESS, VERR_NEM_VM_CREATE_FAILED);
    23932419    }
     
    24762502         */
    24772503        hv_return_t hrc = hv_vcpu_destroy(pVCpu->nem.s.hVCpuId);
    2478         Assert(hrc == HV_SUCCESS);
     2504        Assert(hrc == HV_SUCCESS); RT_NOREF(hrc);
    24792505
    24802506        if (pVCpu->nem.s.pVmxStats)
     
    24902516    {
    24912517        hv_return_t hrc = hv_vm_space_destroy(pVM->nem.s.uVmAsid);
    2492         Assert(hrc == HV_SUCCESS);
     2518        Assert(hrc == HV_SUCCESS); RT_NOREF(hrc);
    24932519        pVM->nem.s.fCreatedAsid = false;
    24942520    }
     
    26242650                pVCpu->nem.s.Event.fPending = false;
    26252651
     2652                Assert(!pVCpu->nem.s.fCtxChanged);
    26262653                hv_return_t hrc;
    26272654                if (hv_vcpu_run_until)
     
    26452672                        break;
    26462673                    }
     2674                    //Assert(!pVCpu->cpum.GstCtx.fExtrn);
    26472675                }
    26482676                else
     
    27712799    LogFlowFunc(("pVM=%p pVCpu=%p fFlags=%#x\n", pVM, pVCpu, fFlags));
    27722800
     2801    RT_NOREF(pVM, fFlags);
     2802
    27732803    hv_return_t hrc = hv_vcpu_interrupt(&pVCpu->nem.s.hVCpuId, 1);
    27742804    if (hrc != HV_SUCCESS)
     
    28132843                                                  void *pvRam, void *pvMmio2, uint8_t *pu2State, uint32_t *puNemRange)
    28142844{
    2815     RT_NOREF(pVM, puNemRange);
     2845    RT_NOREF(pVM, puNemRange, pvRam, fFlags);
    28162846
    28172847    Log5(("NEMR3NotifyPhysMmioExMapEarly: %RGp LB %RGp fFlags=%#x pvRam=%p pvMmio2=%p pu2State=%p (%d)\n",
     
    30693099    Log5(("nemHCNativeNotifyPhysPageAllocated: %RGp HCPhys=%RHp fPageProt=%#x enmType=%d *pu2State=%d\n",
    30703100          GCPhys, HCPhys, fPageProt, enmType, *pu2State));
    3071     RT_NOREF_PV(HCPhys); RT_NOREF_PV(enmType);
     3101    RT_NOREF(HCPhys, fPageProt, enmType);
    30723102
    30733103    return nemHCJustUnmapPage(pVM, GCPhys, pu2State);
     
    31063136VMM_INT_DECL(int) NEMImportStateOnDemand(PVMCPUCC pVCpu, uint64_t fWhat)
    31073137{
     3138    LogFlowFunc(("pVCpu=%p fWhat=%RX64\n", pVCpu, fWhat));
    31083139    STAM_REL_COUNTER_INC(&pVCpu->nem.s.StatImportOnDemand);
    31093140
     
    31633194    hv_return_t hrc = hv_vm_sync_tsc(uPausedTscValue);
    31643195    if (RT_LIKELY(hrc == HV_SUCCESS))
     3196    {
     3197        ASMAtomicUoAndU64(&pVCpu->nem.s.fCtxChanged, ~HM_CHANGED_GUEST_TSC_AUX);
    31653198        return VINF_SUCCESS;
     3199    }
    31663200
    31673201    return nemR3DarwinHvSts2Rc(hrc);
     
    31693203
    31703204
     3205/**
     3206 * Returns features supported by the NEM backend.
     3207 *
     3208 * @returns Flags of features supported by the native NEM backend.
     3209 * @param   pVM             The cross context VM structure.
     3210 */
     3211VMM_INT_DECL(uint32_t) NEMHCGetFeatures(PVMCC pVM)
     3212{
     3213    RT_NOREF(pVM);
     3214    /*
     3215     * Apple's Hypervisor.framework is not supported if the CPU doesn't support nested paging
     3216     * and unrestricted guest execution support so we can safely return these flags here always.
     3217     */
     3218    return NEM_FEAT_F_NESTED_PAGING | NEM_FEAT_F_FULL_GST_EXEC | NEM_FEAT_F_XSAVE_XRSTOR;
     3219}
     3220
     3221
    31713222/** @page pg_nem_darwin NEM/darwin - Native Execution Manager, macOS.
    31723223 *
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