Changeset 93515 in vbox for trunk/src/VBox/HostDrivers/Support

Timestamp:

Jan 31, 2022 10:17:19 PM (3 years ago)

Author:

vboxsync

Message:

iprt/asm-amd64-x86.h: Split out some non-assembly functions that related more to x86.h than to asm.h, changing the function prefix from ASM to RTX86. bugref:9898

Location:

trunk/src/VBox/HostDrivers/Support

Files:

• SUPDrv.cpp (modified) (7 diffs)
• SUPDrvGip.cpp (modified) (8 diffs)
• darwin/SUPDrv-darwin.cpp (modified) (1 diff)
• win/SUPLib-win.cpp (modified) (1 diff)

trunk/src/VBox/HostDrivers/Support/SUPDrv.cpp

@@ -4301 +4301 @@
         uint32_t uMaxLeaf, uVendorEbx, uVendorEcx, uVendorEdx;
         ASMCpuId(0, &uMaxLeaf, &uVendorEbx, &uVendorEcx, &uVendorEdx);
-        if (ASMIsValidStdRange(uMaxLeaf))
+        if (RTX86IsValidStdRange(uMaxLeaf))
         {
             /* Query the standard CPUID leaf. */
@@ -4308 +4308 @@
 
             /* Check if the vendor is Intel (or compatible). */
-            if (   ASMIsIntelCpuEx(uVendorEbx, uVendorEcx, uVendorEdx)
-                || ASMIsViaCentaurCpuEx(uVendorEbx, uVendorEcx, uVendorEdx)
-                || ASMIsShanghaiCpuEx(uVendorEbx, uVendorEcx, uVendorEdx))
+            if (   RTX86IsIntelCpu(uVendorEbx, uVendorEcx, uVendorEdx)
+                || RTX86IsViaCentaurCpu(uVendorEbx, uVendorEcx, uVendorEdx)
+                || RTX86IsShanghaiCpu(uVendorEbx, uVendorEcx, uVendorEdx))
             {
                 /* Check VT-x support. In addition, VirtualBox requires MSR and FXSAVE/FXRSTOR to function. */
@@ -4324 +4324 @@
 
             /* Check if the vendor is AMD (or compatible). */
-            if (   ASMIsAmdCpuEx(uVendorEbx, uVendorEcx, uVendorEdx)
-                || ASMIsHygonCpuEx(uVendorEbx, uVendorEcx, uVendorEdx))
+            if (   RTX86IsAmdCpu(uVendorEbx, uVendorEcx, uVendorEdx)
+                || RTX86IsHygonCpu(uVendorEbx, uVendorEcx, uVendorEdx))
             {
                 uint32_t fExtFeatEcx, uExtMaxId;
@@ -4332 +4332 @@
 
                 /* Check AMD-V support. In addition, VirtualBox requires MSR and FXSAVE/FXRSTOR to function. */
-                if (   ASMIsValidExtRange(uExtMaxId)
+                if (   RTX86IsValidExtRange(uExtMaxId)
                     && uExtMaxId >= 0x8000000a
                     && (fExtFeatEcx & X86_CPUID_AMD_FEATURE_ECX_SVM)
@@ -4428 +4428 @@
         uint32_t uMaxId, uVendorEBX, uVendorECX, uVendorEDX;
         ASMCpuId(0, &uMaxId, &uVendorEBX, &uVendorECX, &uVendorEDX);
-        Assert(ASMIsValidStdRange(uMaxId));
-        Assert(   ASMIsIntelCpuEx(     uVendorEBX, uVendorECX, uVendorEDX)
-               || ASMIsViaCentaurCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
-               || ASMIsShanghaiCpuEx(  uVendorEBX, uVendorECX, uVendorEDX));
+        Assert(RTX86IsValidStdRange(uMaxId));
+        Assert(   RTX86IsIntelCpu(     uVendorEBX, uVendorECX, uVendorEDX)
+               || RTX86IsViaCentaurCpu(uVendorEBX, uVendorECX, uVendorEDX)
+               || RTX86IsShanghaiCpu(  uVendorEBX, uVendorECX, uVendorEDX));
 #endif
         ASMCpuId(1, &uDummy, &uDummy, &fFeaturesECX, &uDummy);
@@ -4679 +4679 @@
         ASMCpuId(1, &uTFMSEAX, &uDummy, &uDummy, &uDummy);
 
-        if (ASMIsValidStdRange(uMaxId))
+        if (RTX86IsValidStdRange(uMaxId))
         {
             uint64_t    uRevMsr;
-            if (ASMIsIntelCpuEx(uVendorEBX, uVendorECX, uVendorEDX))
+            if (RTX86IsIntelCpu(uVendorEBX, uVendorECX, uVendorEDX))
             {
                 /* Architectural MSR available on Pentium Pro and later. */
-                if (ASMGetCpuFamily(uTFMSEAX) >= 6)
+                if (RTX86GetCpuFamily(uTFMSEAX) >= 6)
                 {
                     /* Revision is in the high dword. */
@@ -4693 +4693 @@
                 }
             }
-            else if (   ASMIsAmdCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
-                     || ASMIsHygonCpuEx(uVendorEBX, uVendorECX, uVendorEDX))
+            else if (   RTX86IsAmdCpu(uVendorEBX, uVendorECX, uVendorEDX)
+                     || RTX86IsHygonCpu(uVendorEBX, uVendorECX, uVendorEDX))
             {
                 /* Not well documented, but at least all AMD64 CPUs support this. */
-                if (ASMGetCpuFamily(uTFMSEAX) >= 15)
+                if (RTX86GetCpuFamily(uTFMSEAX) >= 15)
                 {
                     /* Revision is in the low dword. */

trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp

@@ -199 +199 @@
     /* The Intel CPU topology leaf: */
     uint32_t uOther = ASMCpuId_EAX(0);
-    if (uOther >= UINT32_C(0xb) && ASMIsValidStdRange(uOther))
+    if (uOther >= UINT32_C(0xb) && RTX86IsValidStdRange(uOther))
     {
         uint32_t uEax = 0;
@@ -220 +220 @@
     /* The AMD leaf: */
     uOther = ASMCpuId_EAX(UINT32_C(0x80000000));
-    if (uOther >= UINT32_C(0x8000001e) && ASMIsValidExtRange(uOther))
+    if (uOther >= UINT32_C(0x8000001e) && RTX86IsValidExtRange(uOther))
     {
         uOther = ASMGetApicIdExt8000001E();
@@ -371 +371 @@
             if (ASMHasCpuId())
             {
-                if (   ASMIsValidExtRange(ASMCpuId_EAX(UINT32_C(0x80000000)))
+                if (   RTX86IsValidExtRange(ASMCpuId_EAX(UINT32_C(0x80000000)))
                     && (ASMCpuId_EDX(UINT32_C(0x80000001)) & X86_CPUID_EXT_FEATURE_EDX_RDTSCP) )
                 {
@@ -406 +406 @@
     idApic = UINT32_MAX;
     uEax = ASMCpuId_EAX(0);
-    if (uEax >= UINT32_C(0xb) && ASMIsValidStdRange(uEax))
+    if (uEax >= UINT32_C(0xb) && RTX86IsValidStdRange(uEax))
     {
 #if defined(RT_OS_LINUX) || defined(RT_OS_FREEBSD)
@@ -430 +430 @@
 
     uEax = ASMCpuId_EAX(UINT32_C(0x80000000));
-    if (uEax >= UINT32_C(0x8000001e) && ASMIsValidExtRange(uEax))
+    if (uEax >= UINT32_C(0x8000001e) && RTX86IsValidExtRange(uEax))
     {
 #if defined(RT_OS_LINUX) || defined(RT_OS_FREEBSD)
@@ -1768 +1768 @@
     {
         uEAX = ASMCpuId_EAX(0x80000000);
-        if (ASMIsValidExtRange(uEAX) && uEAX >= 0x80000007)
+        if (RTX86IsValidExtRange(uEAX) && uEAX >= 0x80000007)
         {
             uEDX = ASMCpuId_EDX(0x80000007);
@@ -1814 +1814 @@
     /* (2) If it's an AMD CPU with power management, we won't trust its TSC. */
     ASMCpuId(0, &uEAX, &uEBX, &uECX, &uEDX);
-    if (   ASMIsValidStdRange(uEAX)
-        && (ASMIsAmdCpuEx(uEBX, uECX, uEDX) || ASMIsHygonCpuEx(uEBX, uECX, uEDX)) )
+    if (   RTX86IsValidStdRange(uEAX)
+        && (RTX86IsAmdCpu(uEBX, uECX, uEDX) || RTX86IsHygonCpu(uEBX, uECX, uEDX)) )
     {
         /* Check for APM support. */
         uEAX = ASMCpuId_EAX(0x80000000);
-        if (ASMIsValidExtRange(uEAX) && uEAX >= 0x80000007)
+        if (RTX86IsValidExtRange(uEAX) && uEAX >= 0x80000007)
         {
             uEDX = ASMCpuId_EDX(0x80000007);
@@ -4033 +4033 @@
             && pGip->cOnlineCpus > 2
             && ASMHasCpuId()
-            && ASMIsValidStdRange(ASMCpuId_EAX(0))
+            && RTX86IsValidStdRange(ASMCpuId_EAX(0))
             && (ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_HTT)
             && (   !ASMIsAmdCpu()
-                || ASMGetCpuFamily(u32Tmp = ASMCpuId_EAX(1)) > 0x15
-                || (   ASMGetCpuFamily(u32Tmp)   == 0x15           /* Piledriver+, not bulldozer (FX-4150 didn't like it). */
-                    && ASMGetCpuModelAMD(u32Tmp) >= 0x02) ) )
+                || RTX86GetCpuFamily(u32Tmp = ASMCpuId_EAX(1)) > 0x15
+                || (   RTX86GetCpuFamily(u32Tmp)   == 0x15           /* Piledriver+, not bulldozer (FX-4150 didn't like it). */
+                    && RTX86GetCpuModelAMD(u32Tmp) >= 0x02) ) )
         || !RTMpIsCpuOnline(idMaster) )
     {

trunk/src/VBox/HostDrivers/Support/darwin/SUPDrv-darwin.cpp

@@ -2008 +2008 @@
     uint32_t uMaxId, uEAX, uEBX, uECX, uEDX;
     ASMCpuId(0, &uMaxId, &uEBX, &uECX, &uEDX);
-    if (   ASMIsValidStdRange(uMaxId)
+    if (   RTX86IsValidStdRange(uMaxId)
         && uMaxId >= 0x00000007)
     {

trunk/src/VBox/HostDrivers/Support/win/SUPLib-win.cpp

@@ -840 +840 @@
     if (!ASMHasCpuId())
         return false;
-    if (!ASMIsValidStdRange(ASMCpuId_EAX(0)))
+    if (!RTX86IsValidStdRange(ASMCpuId_EAX(0)))
         return false;
     if (!(ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_HVP))