Changeset 93515 in vbox for trunk/src/VBox/VMM/tools

Timestamp:

Jan 31, 2022 10:17:19 PM (3 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

149642

Message:

iprt/asm-amd64-x86.h: Split out some non-assembly functions that related more to x86.h than to asm.h, changing the function prefix from ASM to RTX86. bugref:9898

File:

• trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (modified) (13 diffs)

trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp

@@ -176 +176 @@
     {
         uint32_t cMaxExt = ASMCpuId_EAX(0x80000000);
-        if (ASMIsValidExtRange(cMaxExt)&& cMaxExt >= 0x80000008)
+        if (RTX86IsValidExtRange(cMaxExt)&& cMaxExt >= 0x80000008)
             cMaxWidth = ASMCpuId_EAX(0x80000008) & 0xff;
-        else if (   ASMIsValidStdRange(ASMCpuId_EAX(0))
+        else if (   RTX86IsValidStdRange(ASMCpuId_EAX(0))
                  && (ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_PSE36))
             cMaxWidth = 36;
@@ -191 +191 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidStdRange(ASMCpuId_EAX(0))
+        && RTX86IsValidStdRange(ASMCpuId_EAX(0))
         && (ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_PAE);
 }
@@ -199 +199 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidExtRange(ASMCpuId_EAX(0x80000000))
+        && RTX86IsValidExtRange(ASMCpuId_EAX(0x80000000))
         && (ASMCpuId_EDX(0x80000001) & X86_CPUID_EXT_FEATURE_EDX_LONG_MODE);
 }
@@ -207 +207 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidExtRange(ASMCpuId_EAX(0x80000000))
+        && RTX86IsValidExtRange(ASMCpuId_EAX(0x80000000))
         && (ASMCpuId_EDX(0x80000001) & X86_CPUID_EXT_FEATURE_EDX_NX);
 }
@@ -215 +215 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidStdRange(ASMCpuId_EAX(0))
+        && RTX86IsValidStdRange(ASMCpuId_EAX(0))
         && (ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_X2APIC);
 }
@@ -4412 +4412 @@
      * Are MSRs supported by the CPU?
      */
-    if (   !ASMIsValidStdRange(ASMCpuId_EAX(0))
+    if (   !RTX86IsValidStdRange(ASMCpuId_EAX(0))
         || !(ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_MSR) )
     {
@@ -4458 +4458 @@
     uint32_t uEax, uEbx, uEcx, uEdx;
     ASMCpuIdExSlow(0, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-    if (!ASMIsValidStdRange(uEax))
+    if (!RTX86IsValidStdRange(uEax))
         return RTMsgErrorRc(VERR_NOT_SUPPORTED, "Invalid std CPUID range: %#x\n", uEax);
     g_enmVendor = CPUMR3CpuIdDetectVendorEx(uEax, uEbx, uEcx, uEdx);
@@ -4464 +4464 @@
     ASMCpuIdExSlow(1, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
     g_enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx(g_enmVendor,
-                                                     ASMGetCpuFamily(uEax),
-                                                     ASMGetCpuModel(uEax, g_enmVendor == CPUMCPUVENDOR_INTEL),
-                                                     ASMGetCpuStepping(uEax));
+                                                     RTX86GetCpuFamily(uEax),
+                                                     RTX86GetCpuModel(uEax, g_enmVendor == CPUMCPUVENDOR_INTEL),
+                                                     RTX86GetCpuStepping(uEax));
     g_fIntelNetBurst = CPUMMICROARCH_IS_INTEL_NETBURST(g_enmMicroarch);
 
@@ -4637 +4637 @@
     uint32_t uEax, uEbx, uEcx, uEdx;
     ASMCpuIdExSlow(0, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-    if (!ASMIsValidStdRange(uEax))
+    if (!RTX86IsValidStdRange(uEax))
         return RTMsgErrorRc(VERR_NOT_SUPPORTED, "Invalid std CPUID range: %#x\n", uEax);
 
@@ -4650 +4650 @@
     ASMCpuIdExSlow(1, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
     CPUMMICROARCH enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx(enmVendor,
-                                                                 ASMGetCpuFamily(uEax),
-                                                                 ASMGetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
-                                                                 ASMGetCpuStepping(uEax));
+                                                                 RTX86GetCpuFamily(uEax),
+                                                                 RTX86GetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
+                                                                 RTX86GetCpuStepping(uEax));
 
     /*
@@ -4664 +4664 @@
 
     ASMCpuIdExSlow(0x80000000, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-    if (ASMIsValidExtRange(uEax) && uEax >= UINT32_C(0x80000004))
+    if (RTX86IsValidExtRange(uEax) && uEax >= UINT32_C(0x80000004))
     {
         /* Get the raw name and strip leading spaces. */
@@ -4737 +4737 @@
     {
         ASMCpuIdExSlow(1, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-        RTStrPrintf(szNameC, sizeof(szNameC), "%s_%u_%u_%u", cpuVendorToString(enmVendor), ASMGetCpuFamily(uEax),
-                    ASMGetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL), ASMGetCpuStepping(uEax));
+        RTStrPrintf(szNameC, sizeof(szNameC), "%s_%u_%u_%u", cpuVendorToString(enmVendor), RTX86GetCpuFamily(uEax),
+                    RTX86GetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL), RTX86GetCpuStepping(uEax));
         pszCpuDesc = pszName = szNameC;
         vbCpuRepDebug("Name/NameC: %s\n", szNameC);
@@ -4843 +4843 @@
                    pszCpuDesc,
                    CPUMR3CpuVendorName(enmVendor),
-                   ASMGetCpuFamily(uEax),
-                   ASMGetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
-                   ASMGetCpuStepping(uEax),
+                   RTX86GetCpuFamily(uEax),
+                   RTX86GetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
+                   RTX86GetCpuStepping(uEax),
                    CPUMR3MicroarchName(enmMicroarch),
                    vbCpuRepGuessScalableBusFrequencyName(),