Index: trunk/src/VBox/HostDrivers/Support/SUPDrv.cpp
===================================================================
--- trunk/src/VBox/HostDrivers/Support/SUPDrv.cpp	(revision 93514)
+++ trunk/src/VBox/HostDrivers/Support/SUPDrv.cpp	(revision 93515)
@@ -4301,5 +4301,5 @@
         uint32_t uMaxLeaf, uVendorEbx, uVendorEcx, uVendorEdx;
         ASMCpuId(0, &uMaxLeaf, &uVendorEbx, &uVendorEcx, &uVendorEdx);
-        if (ASMIsValidStdRange(uMaxLeaf))
+        if (RTX86IsValidStdRange(uMaxLeaf))
         {
             /* Query the standard CPUID leaf. */
@@ -4308,7 +4308,7 @@
 
             /* Check if the vendor is Intel (or compatible). */
-            if (   ASMIsIntelCpuEx(uVendorEbx, uVendorEcx, uVendorEdx)
-                || ASMIsViaCentaurCpuEx(uVendorEbx, uVendorEcx, uVendorEdx)
-                || ASMIsShanghaiCpuEx(uVendorEbx, uVendorEcx, uVendorEdx))
+            if (   RTX86IsIntelCpu(uVendorEbx, uVendorEcx, uVendorEdx)
+                || RTX86IsViaCentaurCpu(uVendorEbx, uVendorEcx, uVendorEdx)
+                || RTX86IsShanghaiCpu(uVendorEbx, uVendorEcx, uVendorEdx))
             {
                 /* Check VT-x support. In addition, VirtualBox requires MSR and FXSAVE/FXRSTOR to function. */
@@ -4324,6 +4324,6 @@
 
             /* Check if the vendor is AMD (or compatible). */
-            if (   ASMIsAmdCpuEx(uVendorEbx, uVendorEcx, uVendorEdx)
-                || ASMIsHygonCpuEx(uVendorEbx, uVendorEcx, uVendorEdx))
+            if (   RTX86IsAmdCpu(uVendorEbx, uVendorEcx, uVendorEdx)
+                || RTX86IsHygonCpu(uVendorEbx, uVendorEcx, uVendorEdx))
             {
                 uint32_t fExtFeatEcx, uExtMaxId;
@@ -4332,5 +4332,5 @@
 
                 /* Check AMD-V support. In addition, VirtualBox requires MSR and FXSAVE/FXRSTOR to function. */
-                if (   ASMIsValidExtRange(uExtMaxId)
+                if (   RTX86IsValidExtRange(uExtMaxId)
                     && uExtMaxId >= 0x8000000a
                     && (fExtFeatEcx & X86_CPUID_AMD_FEATURE_ECX_SVM)
@@ -4428,8 +4428,8 @@
         uint32_t uMaxId, uVendorEBX, uVendorECX, uVendorEDX;
         ASMCpuId(0, &uMaxId, &uVendorEBX, &uVendorECX, &uVendorEDX);
-        Assert(ASMIsValidStdRange(uMaxId));
-        Assert(   ASMIsIntelCpuEx(     uVendorEBX, uVendorECX, uVendorEDX)
-               || ASMIsViaCentaurCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
-               || ASMIsShanghaiCpuEx(  uVendorEBX, uVendorECX, uVendorEDX));
+        Assert(RTX86IsValidStdRange(uMaxId));
+        Assert(   RTX86IsIntelCpu(     uVendorEBX, uVendorECX, uVendorEDX)
+               || RTX86IsViaCentaurCpu(uVendorEBX, uVendorECX, uVendorEDX)
+               || RTX86IsShanghaiCpu(  uVendorEBX, uVendorECX, uVendorEDX));
 #endif
         ASMCpuId(1, &uDummy, &uDummy, &fFeaturesECX, &uDummy);
@@ -4679,11 +4679,11 @@
         ASMCpuId(1, &uTFMSEAX, &uDummy, &uDummy, &uDummy);
 
-        if (ASMIsValidStdRange(uMaxId))
+        if (RTX86IsValidStdRange(uMaxId))
         {
             uint64_t    uRevMsr;
-            if (ASMIsIntelCpuEx(uVendorEBX, uVendorECX, uVendorEDX))
+            if (RTX86IsIntelCpu(uVendorEBX, uVendorECX, uVendorEDX))
             {
                 /* Architectural MSR available on Pentium Pro and later. */
-                if (ASMGetCpuFamily(uTFMSEAX) >= 6)
+                if (RTX86GetCpuFamily(uTFMSEAX) >= 6)
                 {
                     /* Revision is in the high dword. */
@@ -4693,9 +4693,9 @@
                 }
             }
-            else if (   ASMIsAmdCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
-                     || ASMIsHygonCpuEx(uVendorEBX, uVendorECX, uVendorEDX))
+            else if (   RTX86IsAmdCpu(uVendorEBX, uVendorECX, uVendorEDX)
+                     || RTX86IsHygonCpu(uVendorEBX, uVendorECX, uVendorEDX))
             {
                 /* Not well documented, but at least all AMD64 CPUs support this. */
-                if (ASMGetCpuFamily(uTFMSEAX) >= 15)
+                if (RTX86GetCpuFamily(uTFMSEAX) >= 15)
                 {
                     /* Revision is in the low dword. */
Index: trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp
===================================================================
--- trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp	(revision 93514)
+++ trunk/src/VBox/HostDrivers/Support/SUPDrvGip.cpp	(revision 93515)
@@ -199,5 +199,5 @@
     /* The Intel CPU topology leaf: */
     uint32_t uOther = ASMCpuId_EAX(0);
-    if (uOther >= UINT32_C(0xb) && ASMIsValidStdRange(uOther))
+    if (uOther >= UINT32_C(0xb) && RTX86IsValidStdRange(uOther))
     {
         uint32_t uEax = 0;
@@ -220,5 +220,5 @@
     /* The AMD leaf: */
     uOther = ASMCpuId_EAX(UINT32_C(0x80000000));
-    if (uOther >= UINT32_C(0x8000001e) && ASMIsValidExtRange(uOther))
+    if (uOther >= UINT32_C(0x8000001e) && RTX86IsValidExtRange(uOther))
     {
         uOther = ASMGetApicIdExt8000001E();
@@ -371,5 +371,5 @@
             if (ASMHasCpuId())
             {
-                if (   ASMIsValidExtRange(ASMCpuId_EAX(UINT32_C(0x80000000)))
+                if (   RTX86IsValidExtRange(ASMCpuId_EAX(UINT32_C(0x80000000)))
                     && (ASMCpuId_EDX(UINT32_C(0x80000001)) & X86_CPUID_EXT_FEATURE_EDX_RDTSCP) )
                 {
@@ -406,5 +406,5 @@
     idApic = UINT32_MAX;
     uEax = ASMCpuId_EAX(0);
-    if (uEax >= UINT32_C(0xb) && ASMIsValidStdRange(uEax))
+    if (uEax >= UINT32_C(0xb) && RTX86IsValidStdRange(uEax))
     {
 #if defined(RT_OS_LINUX) || defined(RT_OS_FREEBSD)
@@ -430,5 +430,5 @@
 
     uEax = ASMCpuId_EAX(UINT32_C(0x80000000));
-    if (uEax >= UINT32_C(0x8000001e) && ASMIsValidExtRange(uEax))
+    if (uEax >= UINT32_C(0x8000001e) && RTX86IsValidExtRange(uEax))
     {
 #if defined(RT_OS_LINUX) || defined(RT_OS_FREEBSD)
@@ -1768,5 +1768,5 @@
     {
         uEAX = ASMCpuId_EAX(0x80000000);
-        if (ASMIsValidExtRange(uEAX) && uEAX >= 0x80000007)
+        if (RTX86IsValidExtRange(uEAX) && uEAX >= 0x80000007)
         {
             uEDX = ASMCpuId_EDX(0x80000007);
@@ -1814,10 +1814,10 @@
     /* (2) If it's an AMD CPU with power management, we won't trust its TSC. */
     ASMCpuId(0, &uEAX, &uEBX, &uECX, &uEDX);
-    if (   ASMIsValidStdRange(uEAX)
-        && (ASMIsAmdCpuEx(uEBX, uECX, uEDX) || ASMIsHygonCpuEx(uEBX, uECX, uEDX)) )
+    if (   RTX86IsValidStdRange(uEAX)
+        && (RTX86IsAmdCpu(uEBX, uECX, uEDX) || RTX86IsHygonCpu(uEBX, uECX, uEDX)) )
     {
         /* Check for APM support. */
         uEAX = ASMCpuId_EAX(0x80000000);
-        if (ASMIsValidExtRange(uEAX) && uEAX >= 0x80000007)
+        if (RTX86IsValidExtRange(uEAX) && uEAX >= 0x80000007)
         {
             uEDX = ASMCpuId_EDX(0x80000007);
@@ -4033,10 +4033,10 @@
             && pGip->cOnlineCpus > 2
             && ASMHasCpuId()
-            && ASMIsValidStdRange(ASMCpuId_EAX(0))
+            && RTX86IsValidStdRange(ASMCpuId_EAX(0))
             && (ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_HTT)
             && (   !ASMIsAmdCpu()
-                || ASMGetCpuFamily(u32Tmp = ASMCpuId_EAX(1)) > 0x15
-                || (   ASMGetCpuFamily(u32Tmp)   == 0x15           /* Piledriver+, not bulldozer (FX-4150 didn't like it). */
-                    && ASMGetCpuModelAMD(u32Tmp) >= 0x02) ) )
+                || RTX86GetCpuFamily(u32Tmp = ASMCpuId_EAX(1)) > 0x15
+                || (   RTX86GetCpuFamily(u32Tmp)   == 0x15           /* Piledriver+, not bulldozer (FX-4150 didn't like it). */
+                    && RTX86GetCpuModelAMD(u32Tmp) >= 0x02) ) )
         || !RTMpIsCpuOnline(idMaster) )
     {
Index: trunk/src/VBox/HostDrivers/Support/darwin/SUPDrv-darwin.cpp
===================================================================
--- trunk/src/VBox/HostDrivers/Support/darwin/SUPDrv-darwin.cpp	(revision 93514)
+++ trunk/src/VBox/HostDrivers/Support/darwin/SUPDrv-darwin.cpp	(revision 93515)
@@ -2008,5 +2008,5 @@
     uint32_t uMaxId, uEAX, uEBX, uECX, uEDX;
     ASMCpuId(0, &uMaxId, &uEBX, &uECX, &uEDX);
-    if (   ASMIsValidStdRange(uMaxId)
+    if (   RTX86IsValidStdRange(uMaxId)
         && uMaxId >= 0x00000007)
     {
Index: trunk/src/VBox/HostDrivers/Support/win/SUPLib-win.cpp
===================================================================
--- trunk/src/VBox/HostDrivers/Support/win/SUPLib-win.cpp	(revision 93514)
+++ trunk/src/VBox/HostDrivers/Support/win/SUPLib-win.cpp	(revision 93515)
@@ -840,5 +840,5 @@
     if (!ASMHasCpuId())
         return false;
-    if (!ASMIsValidStdRange(ASMCpuId_EAX(0)))
+    if (!RTX86IsValidStdRange(ASMCpuId_EAX(0)))
         return false;
     if (!(ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_HVP))
Index: trunk/src/VBox/Main/src-server/HostImpl.cpp
===================================================================
--- trunk/src/VBox/Main/src-server/HostImpl.cpp	(revision 93514)
+++ trunk/src/VBox/Main/src-server/HostImpl.cpp	(revision 93515)
@@ -337,5 +337,5 @@
         uint32_t uMaxId, uVendorEBX, uVendorECX, uVendorEDX;
         ASMCpuId(0, &uMaxId, &uVendorEBX, &uVendorECX, &uVendorEDX);
-        if (ASMIsValidStdRange(uMaxId))
+        if (RTX86IsValidStdRange(uMaxId))
         {
             /* PAE? */
@@ -348,5 +348,5 @@
             ASMCpuId(0x80000000, &uExtMaxId, &uDummy, &uDummy, &uDummy);
             ASMCpuId(0x80000001, &uDummy, &uDummy, &fExtFeaturesEcx, &fExtFeaturesEdx);
-            m->fLongModeSupported = ASMIsValidExtRange(uExtMaxId)
+            m->fLongModeSupported = RTX86IsValidExtRange(uExtMaxId)
                                  && (fExtFeaturesEdx & X86_CPUID_EXT_FEATURE_EDX_LONG_MODE);
 
@@ -359,7 +359,7 @@
 
             /* VT-x? */
-            if (   ASMIsIntelCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
-                || ASMIsViaCentaurCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
-                || ASMIsShanghaiCpuEx(uVendorEBX, uVendorECX, uVendorEDX))
+            if (   RTX86IsIntelCpu(uVendorEBX, uVendorECX, uVendorEDX)
+                || RTX86IsViaCentaurCpu(uVendorEBX, uVendorECX, uVendorEDX)
+                || RTX86IsShanghaiCpu(uVendorEBX, uVendorECX, uVendorEDX))
             {
                 if (    (fFeaturesEcx & X86_CPUID_FEATURE_ECX_VMX)
@@ -375,11 +375,11 @@
             }
             /* AMD-V */
-            else if (   ASMIsAmdCpuEx(uVendorEBX, uVendorECX, uVendorEDX)
-                     || ASMIsHygonCpuEx(uVendorEBX, uVendorECX, uVendorEDX))
+            else if (   RTX86IsAmdCpu(uVendorEBX, uVendorECX, uVendorEDX)
+                     || RTX86IsHygonCpu(uVendorEBX, uVendorECX, uVendorEDX))
             {
                 if (   (fExtFeaturesEcx & X86_CPUID_AMD_FEATURE_ECX_SVM)
                     && (fFeaturesEdx    & X86_CPUID_FEATURE_EDX_MSR)
                     && (fFeaturesEdx    & X86_CPUID_FEATURE_EDX_FXSR)
-                    && ASMIsValidExtRange(uExtMaxId)
+                    && RTX86IsValidExtRange(uExtMaxId)
                    )
                 {
Index: trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp
===================================================================
--- trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp	(revision 93514)
+++ trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp	(revision 93515)
@@ -409,5 +409,5 @@
                   "Support:                         0-%u\n",
                   &s.uEBX, &s.uEDX, &s.uECX, s.uEAX);
-    bool const fIntel = ASMIsIntelCpuEx(s.uEBX, s.uECX, s.uEDX);
+    bool const fIntel = RTX86IsIntelCpu(s.uEBX, s.uECX, s.uEDX);
 
     /*
@@ -427,7 +427,7 @@
                       "CLFLUSH Size:                    %d\n"
                       "Brand ID:                        %#04x\n",
-                      (s.uEAX >> 8) & 0xf, (s.uEAX >> 20) & 0x7f, ASMGetCpuFamily(s.uEAX),
-                      (s.uEAX >> 4) & 0xf, (s.uEAX >> 16) & 0x0f, ASMGetCpuModel(s.uEAX, fIntel),
-                      ASMGetCpuStepping(s.uEAX),
+                      (s.uEAX >> 8) & 0xf, (s.uEAX >> 20) & 0x7f, RTX86GetCpuFamily(s.uEAX),
+                      (s.uEAX >> 4) & 0xf, (s.uEAX >> 16) & 0x0f, RTX86GetCpuModel(s.uEAX, fIntel),
+                      RTX86GetCpuStepping(s.uEAX),
                       (s.uEAX >> 12) & 0x3, s_apszTypes[(s.uEAX >> 12) & 0x3],
                       (s.uEBX >> 24) & 0xff,
@@ -558,7 +558,7 @@
                       "Stepping:                        %d\n"
                       "Brand ID:                        %#05x\n",
-                      (s.uEAX >> 8) & 0xf, (s.uEAX >> 20) & 0x7f, ASMGetCpuFamily(s.uEAX),
-                      (s.uEAX >> 4) & 0xf, (s.uEAX >> 16) & 0x0f, ASMGetCpuModel(s.uEAX, fIntel),
-                      ASMGetCpuStepping(s.uEAX),
+                      (s.uEAX >> 8) & 0xf, (s.uEAX >> 20) & 0x7f, RTX86GetCpuFamily(s.uEAX),
+                      (s.uEAX >> 4) & 0xf, (s.uEAX >> 16) & 0x0f, RTX86GetCpuModel(s.uEAX, fIntel),
+                      RTX86GetCpuStepping(s.uEAX),
                       s.uEBX & 0xfff);
 
@@ -2893,5 +2893,5 @@
     uint32_t uAux;
     if (   ASMHasCpuId()
-        && ASMIsValidExtRange(ASMCpuId_EAX(0x80000000))
+        && RTX86IsValidExtRange(ASMCpuId_EAX(0x80000000))
         && (ASMCpuId_EDX(0x80000001) & X86_CPUID_EXT_FEATURE_EDX_RDTSCP) )
     {
Index: trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/VMMR0/CPUMR0.cpp	(revision 93515)
@@ -249,5 +249,5 @@
         uint32_t cExt = 0;
         ASMCpuId(0x80000000, &cExt, &u32Dummy, &u32Dummy, &u32Dummy);
-        if (ASMIsValidExtRange(cExt))
+        if (RTX86IsValidExtRange(cExt))
         {
             uint32_t fExtFeaturesEDX = ASMCpuId_EDX(0x80000001);
@@ -279,5 +279,5 @@
         pVM->cpum.s.HostFeatures.fArchMdsNo              = 0;
         uint32_t const cStdRange = ASMCpuId_EAX(0);
-        if (   ASMIsValidStdRange(cStdRange)
+        if (   RTX86IsValidStdRange(cStdRange)
             && cStdRange >= 7)
         {
@@ -728,10 +728,10 @@
     uint32_t uMaxLeaf, u32EBX, u32ECX, u32EDX;
     ASMCpuId(0, &uMaxLeaf, &u32EBX, &u32ECX, &u32EDX);
-    if (   (   ASMIsIntelCpuEx(u32EBX, u32ECX, u32EDX)
-            || ASMIsAmdCpuEx(u32EBX, u32ECX, u32EDX)
-            || ASMIsViaCentaurCpuEx(u32EBX, u32ECX, u32EDX)
-            || ASMIsShanghaiCpuEx(u32EBX, u32ECX, u32EDX)
-            || ASMIsHygonCpuEx(u32EBX, u32ECX, u32EDX))
-        && ASMIsValidStdRange(uMaxLeaf))
+    if (   (   RTX86IsIntelCpu(u32EBX, u32ECX, u32EDX)
+            || RTX86IsAmdCpu(u32EBX, u32ECX, u32EDX)
+            || RTX86IsViaCentaurCpu(u32EBX, u32ECX, u32EDX)
+            || RTX86IsShanghaiCpu(u32EBX, u32ECX, u32EDX)
+            || RTX86IsHygonCpu(u32EBX, u32ECX, u32EDX))
+        && RTX86IsValidStdRange(uMaxLeaf))
     {
         uint32_t uDummy;
@@ -750,5 +750,5 @@
             ASMCpuId(0x80000000, &uMaxExtLeaf, &u32EBX, &u32ECX, &u32EDX);
             if (   uMaxExtLeaf >= UINT32_C(0x80000008)
-                && ASMIsValidExtRange(uMaxExtLeaf))
+                && RTX86IsValidExtRange(uMaxExtLeaf))
             {
                 uint32_t u32PhysBits;
Index: trunk/src/VBox/VMM/VMMR0/HMR0.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR0/HMR0.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/VMMR0/HMR0.cpp	(revision 93515)
@@ -1253,5 +1253,5 @@
     uint32_t fWorldSwitcher = 0;
     uint32_t cLastStdLeaf   = ASMCpuId_EAX(0);
-    if (cLastStdLeaf >= 0x00000007 && ASMIsValidStdRange(cLastStdLeaf))
+    if (cLastStdLeaf >= 0x00000007 && RTX86IsValidStdRange(cLastStdLeaf))
     {
         uint32_t uEdx = 0;
Index: trunk/src/VBox/VMM/VMMR3/CPUM.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/CPUM.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/VMMR3/CPUM.cpp	(revision 93515)
@@ -127,5 +127,7 @@
 #include <VBox/err.h>
 #include <VBox/log.h>
-#include <iprt/asm-amd64-x86.h>
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
+# include <iprt/asm-amd64-x86.h>
+#endif
 #include <iprt/assert.h>
 #include <iprt/cpuset.h>
@@ -972,4 +974,5 @@
 
 
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
 /**
  * Checks for partial/leaky FXSAVE/FXRSTOR handling on AMD CPUs.
@@ -993,5 +996,5 @@
     {
         uint32_t cExt = ASMCpuId_EAX(0x80000000);
-        if (ASMIsValidExtRange(cExt))
+        if (RTX86IsValidExtRange(cExt))
         {
             uint32_t fExtFeaturesEDX = ASMCpuId_EDX(0x80000001);
@@ -1008,4 +1011,5 @@
     }
 }
+#endif
 
 
@@ -2010,4 +2014,5 @@
      * Gather info about the host CPU.
      */
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
     if (!ASMHasCpuId())
     {
@@ -2015,4 +2020,5 @@
         return VERR_UNSUPPORTED_CPU;
     }
+#endif
 
     pVM->cpum.s.fHostMxCsrMask = CPUMR3DeterminHostMxCsrMask();
@@ -2054,4 +2060,5 @@
     uint64_t fXcr0Host = 0;
     uint64_t fXStateHostMask = 0;
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
     if (   pVM->cpum.s.HostFeatures.fXSaveRstor
         && pVM->cpum.s.HostFeatures.fOpSysXSaveRstor)
@@ -2062,4 +2069,5 @@
                             ("%#llx\n", fXStateHostMask), fXStateHostMask = 0);
     }
+#endif
     pVM->cpum.s.fXStateHostMask = fXStateHostMask;
     LogRel(("CPUM: fXStateHostMask=%#llx; initial: %#llx; host XCR0=%#llx\n",
@@ -2117,8 +2125,10 @@
         return rc;
 
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
     /*
      * Check if we need to workaround partial/leaky FPU handling.
      */
     cpumR3CheckLeakyFpu(pVM);
+#endif
 
     /*
Index: trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp	(revision 93515)
@@ -31,5 +31,7 @@
 
 #include <VBox/err.h>
-#include <iprt/asm-amd64-x86.h>
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
+# include <iprt/asm-amd64-x86.h>
+#endif
 #include <iprt/ctype.h>
 #include <iprt/mem.h>
@@ -690,6 +692,7 @@
 VMMR3DECL(uint32_t) CPUMR3DeterminHostMxCsrMask(void)
 {
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
     if (   ASMHasCpuId()
-        && ASMIsValidStdRange(ASMCpuId_EAX(0))
+        && RTX86IsValidStdRange(ASMCpuId_EAX(0))
         && ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_FXSR)
     {
@@ -702,4 +705,5 @@
         return pState->MXCSR_MASK;
     }
+#endif
     return 0;
 }
@@ -1087,4 +1091,5 @@
 
 
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
 /**
  * Checks if ECX make a difference when reading a given CPUID leaf.
@@ -1177,5 +1182,5 @@
         if (uSubLeaf >= 128)
         {
-#ifndef IN_VBOX_CPU_REPORT
+# ifndef IN_VBOX_CPU_REPORT
             /* Ok, limit it according to the documentation if possible just to
                avoid annoying users with these detection issues. */
@@ -1195,5 +1200,5 @@
                 return true;
             }
-#endif
+# endif
             *pcSubLeaves = UINT32_MAX;
             return true;
@@ -1212,4 +1217,5 @@
     return true;
 }
+#endif /* RT_ARCH_X86 || RT_ARCH_AMD64 */
 
 
@@ -1287,4 +1293,5 @@
 }
 
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
 
 /**
@@ -1358,6 +1365,6 @@
                              || uEbx
                              || uEdx
-                             || ASMIsAmdCpuEx((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)
-                             || ASMIsHygonCpuEx((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)) )
+                             || RTX86IsAmdCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)
+                             || RTX86IsHygonCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)) )
                     fFlags |= CPUMCPUIDLEAF_F_CONTAINS_APIC_ID;
 
@@ -1367,6 +1374,6 @@
                 else if (   uLeaf == UINT32_C(0x80000001)
                          && (   (uEdx & X86_CPUID_AMD_FEATURE_EDX_APIC)
-                             || ASMIsAmdCpuEx((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)
-                             || ASMIsHygonCpuEx((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)) )
+                             || RTX86IsAmdCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)
+                             || RTX86IsHygonCpu((*ppaLeaves)[0].uEbx, (*ppaLeaves)[0].uEcx, (*ppaLeaves)[0].uEdx)) )
                     fFlags |= CPUMCPUIDLEAF_F_CONTAINS_APIC;
 
@@ -1480,5 +1487,5 @@
     uint32_t uLastStd = ASMCpuId_EAX(0);
     uint32_t uLastExt = ASMCpuId_EAX(0x80000000);
-    if (!ASMIsValidExtRange(uLastExt))
+    if (!RTX86IsValidExtRange(uLastExt))
         uLastExt = 0x80000000;
 
@@ -1624,4 +1631,5 @@
 }
 
+#endif /* RT_ARCH_X86 || RT_ARCH_AMD64 */
 
 /**
@@ -1649,4 +1657,5 @@
 
 
+#if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64)
 /**
  * Detect the CPU vendor give n the
@@ -1660,16 +1669,16 @@
 VMMR3DECL(CPUMCPUVENDOR) CPUMR3CpuIdDetectVendorEx(uint32_t uEAX, uint32_t uEBX, uint32_t uECX, uint32_t uEDX)
 {
-    if (ASMIsValidStdRange(uEAX))
-    {
-        if (ASMIsAmdCpuEx(uEBX, uECX, uEDX))
+    if (RTX86IsValidStdRange(uEAX))
+    {
+        if (RTX86IsAmdCpu(uEBX, uECX, uEDX))
             return CPUMCPUVENDOR_AMD;
 
-        if (ASMIsIntelCpuEx(uEBX, uECX, uEDX))
+        if (RTX86IsIntelCpu(uEBX, uECX, uEDX))
             return CPUMCPUVENDOR_INTEL;
 
-        if (ASMIsViaCentaurCpuEx(uEBX, uECX, uEDX))
+        if (RTX86IsViaCentaurCpu(uEBX, uECX, uEDX))
             return CPUMCPUVENDOR_VIA;
 
-        if (ASMIsShanghaiCpuEx(uEBX, uECX, uEDX))
+        if (RTX86IsShanghaiCpu(uEBX, uECX, uEDX))
             return CPUMCPUVENDOR_SHANGHAI;
 
@@ -1679,5 +1688,5 @@
             return CPUMCPUVENDOR_CYRIX;
 
-        if (ASMIsHygonCpuEx(uEBX, uECX, uEDX))
+        if (RTX86IsHygonCpu(uEBX, uECX, uEDX))
             return CPUMCPUVENDOR_HYGON;
 
@@ -1689,4 +1698,5 @@
     return CPUMCPUVENDOR_UNKNOWN;
 }
+#endif /* RT_ARCH_X86 || RT_ARCH_AMD64 */
 
 
@@ -1892,7 +1902,7 @@
                                                             pStd0Leaf->uEcx,
                                                             pStd0Leaf->uEdx);
-        pFeatures->uFamily      = ASMGetCpuFamily(pStd1Leaf->uEax);
-        pFeatures->uModel       = ASMGetCpuModel(pStd1Leaf->uEax, pFeatures->enmCpuVendor == CPUMCPUVENDOR_INTEL);
-        pFeatures->uStepping    = ASMGetCpuStepping(pStd1Leaf->uEax);
+        pFeatures->uFamily      = RTX86GetCpuFamily(pStd1Leaf->uEax);
+        pFeatures->uModel       = RTX86GetCpuModel(pStd1Leaf->uEax, pFeatures->enmCpuVendor == CPUMCPUVENDOR_INTEL);
+        pFeatures->uStepping    = RTX86GetCpuStepping(pStd1Leaf->uEax);
         pFeatures->enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx((CPUMCPUVENDOR)pFeatures->enmCpuVendor,
                                                                   pFeatures->uFamily,
@@ -2595,7 +2605,7 @@
     {
         PCPUMCPUIDLEAF pStdFeatureLeaf = cpumR3CpuIdGetExactLeaf(pCpum, 1, 0);
-        uint32_t uCurIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(ASMGetCpuStepping(pStdFeatureLeaf->uEax),
-                                                                ASMGetCpuModelIntel(pStdFeatureLeaf->uEax),
-                                                                ASMGetCpuFamily(pStdFeatureLeaf->uEax),
+        uint32_t uCurIntelFamilyModelStep = RT_MAKE_U32_FROM_U8(RTX86GetCpuStepping(pStdFeatureLeaf->uEax),
+                                                                RTX86GetCpuModelIntel(pStdFeatureLeaf->uEax),
+                                                                RTX86GetCpuFamily(pStdFeatureLeaf->uEax),
                                                                 0);
         uint32_t uMaxIntelFamilyModelStep = pConfig->uMaxIntelFamilyModelStep;
@@ -5397,5 +5407,5 @@
             PCPUMCPUIDLEAF pLeaf = cpumR3CpuIdGetLeaf(*ppaLeaves, *pcLeaves, 0, 0);
             if (   pLeaf
-                && ASMIsIntelCpuEx(pLeaf->uEbx, pLeaf->uEcx, pLeaf->uEdx))
+                && RTX86IsIntelCpu(pLeaf->uEbx, pLeaf->uEcx, pLeaf->uEdx))
             {
                 CPUMCPUIDLEAF Leaf;
@@ -5772,8 +5782,8 @@
     {
         /** @todo deal with no 0x80000001 on the host. */
-        bool const fHostAmd  = ASMIsAmdCpuEx(aHostRawStd[0].uEbx, aHostRawStd[0].uEcx, aHostRawStd[0].uEdx)
-                            || ASMIsHygonCpuEx(aHostRawStd[0].uEbx, aHostRawStd[0].uEcx, aHostRawStd[0].uEdx);
-        bool const fGuestAmd = ASMIsAmdCpuEx(aGuestCpuIdExt[0].uEbx, aGuestCpuIdExt[0].uEcx, aGuestCpuIdExt[0].uEdx)
-                            || ASMIsHygonCpuEx(aGuestCpuIdExt[0].uEbx, aGuestCpuIdExt[0].uEcx, aGuestCpuIdExt[0].uEdx);
+        bool const fHostAmd  = RTX86IsAmdCpu(aHostRawStd[0].uEbx, aHostRawStd[0].uEcx, aHostRawStd[0].uEdx)
+                            || RTX86IsHygonCpu(aHostRawStd[0].uEbx, aHostRawStd[0].uEcx, aHostRawStd[0].uEdx);
+        bool const fGuestAmd = RTX86IsAmdCpu(aGuestCpuIdExt[0].uEbx, aGuestCpuIdExt[0].uEcx, aGuestCpuIdExt[0].uEdx)
+                            || RTX86IsHygonCpu(aGuestCpuIdExt[0].uEbx, aGuestCpuIdExt[0].uEcx, aGuestCpuIdExt[0].uEdx);
 
         /* CPUID(0x80000001).ecx */
@@ -6610,7 +6620,7 @@
                     "%36s %#04x\n"
                     ,
-                    "Family:",      (uEAX >> 8) & 0xf, (uEAX >> 20) & 0x7f, ASMGetCpuFamily(uEAX),
-                    "Model:",       (uEAX >> 4) & 0xf, (uEAX >> 16) & 0x0f, ASMGetCpuModel(uEAX, fIntel),
-                    "Stepping:",    ASMGetCpuStepping(uEAX),
+                    "Family:",      (uEAX >> 8) & 0xf, (uEAX >> 20) & 0x7f, RTX86GetCpuFamily(uEAX),
+                    "Model:",       (uEAX >> 4) & 0xf, (uEAX >> 16) & 0x0f, RTX86GetCpuModel(uEAX, fIntel),
+                    "Stepping:",    RTX86GetCpuStepping(uEAX),
                     "Type:",        (uEAX >> 12) & 3, s_apszTypes[(uEAX >> 12) & 3],
                     "APIC ID:",     (uEBX >> 24) & 0xff,
@@ -6843,7 +6853,7 @@
     PCCPUMCPUIDLEAF pCurLeaf;
     PCCPUMCPUIDLEAF pNextLeaf;
-    bool const      fIntel = ASMIsIntelCpuEx(pVM->cpum.s.aGuestCpuIdPatmStd[0].uEbx,
-                                             pVM->cpum.s.aGuestCpuIdPatmStd[0].uEcx,
-                                             pVM->cpum.s.aGuestCpuIdPatmStd[0].uEdx);
+    bool const      fIntel = RTX86IsIntelCpu(pVM->cpum.s.aGuestCpuIdPatmStd[0].uEbx,
+                                               pVM->cpum.s.aGuestCpuIdPatmStd[0].uEcx,
+                                               pVM->cpum.s.aGuestCpuIdPatmStd[0].uEdx);
 
     /*
@@ -6952,5 +6962,5 @@
 
     ASMCpuIdExSlow(UINT32_C(0x80000000), 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx);
-    cHstMax  = ASMIsValidExtRange(Host.uEax) ? RT_MIN(Host.uEax, UINT32_C(0x80000fff)) : 0;
+    cHstMax  = RTX86IsValidExtRange(Host.uEax) ? RT_MIN(Host.uEax, UINT32_C(0x80000fff)) : 0;
     cGstMax  = (uintptr_t)(pCurLeaf - paLeaves) < cLeaves && pCurLeaf->uLeaf == UINT32_C(0x80000000)
              ? RT_MIN(pCurLeaf->uEax, UINT32_C(0x80000fff)) : 0;
@@ -7017,7 +7027,7 @@
                             "Stepping:                        %d\n"
                             "Brand ID:                        %#05x\n",
-                            (uEAX >> 8) & 0xf, (uEAX >> 20) & 0x7f, ASMGetCpuFamily(uEAX),
-                            (uEAX >> 4) & 0xf, (uEAX >> 16) & 0x0f, ASMGetCpuModel(uEAX, fIntel),
-                            ASMGetCpuStepping(uEAX),
+                            (uEAX >> 8) & 0xf, (uEAX >> 20) & 0x7f, RTX86GetCpuFamily(uEAX),
+                            (uEAX >> 4) & 0xf, (uEAX >> 16) & 0x0f, RTX86GetCpuModel(uEAX, fIntel),
+                            RTX86GetCpuStepping(uEAX),
                             pCurLeaf->uEbx & 0xfff);
 
Index: trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp	(revision 93515)
@@ -897,7 +897,7 @@
                                                                      pInfo->paCpuIdLeavesR3[0].uEdx);
         uint32_t      const uStd1Eax     = pInfo->paCpuIdLeavesR3[1].uEax;
-        uint8_t       const uFamily      = ASMGetCpuFamily(uStd1Eax);
-        uint8_t       const uModel       = ASMGetCpuModel(uStd1Eax, enmVendor == CPUMCPUVENDOR_INTEL);
-        uint8_t       const uStepping    = ASMGetCpuStepping(uStd1Eax);
+        uint8_t       const uFamily      = RTX86GetCpuFamily(uStd1Eax);
+        uint8_t       const uModel       = RTX86GetCpuModel(uStd1Eax, enmVendor == CPUMCPUVENDOR_INTEL);
+        uint8_t       const uStepping    = RTX86GetCpuStepping(uStd1Eax);
         CPUMMICROARCH const enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx(enmVendor, uFamily, uModel, uStepping);
 
Index: trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/VMMR3/NEMR3Native-win.cpp	(revision 93515)
@@ -467,5 +467,5 @@
     if (!ASMHasCpuId())
         return RTErrInfoSet(pErrInfo, VERR_NEM_NOT_AVAILABLE, "No CPUID support");
-    if (!ASMIsValidStdRange(ASMCpuId_EAX(0)))
+    if (!RTX86IsValidStdRange(ASMCpuId_EAX(0)))
         return RTErrInfoSet(pErrInfo, VERR_NEM_NOT_AVAILABLE, "No CPUID leaf #1");
     if (!(ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_HVP))
@@ -477,5 +477,5 @@
     uint32_t uEdx = 0;
     ASMCpuIdExSlow(0x40000000, 0, 0, 0, &cMaxHyperLeaf, &uEbx, &uEcx, &uEdx);
-    if (!ASMIsValidHypervisorRange(cMaxHyperLeaf))
+    if (!RTX86IsValidHypervisorRange(cMaxHyperLeaf))
         return RTErrInfoSetF(pErrInfo, VERR_NEM_NOT_AVAILABLE, "Invalid hypervisor CPUID range (%#x %#x %#x %#x)",
                              cMaxHyperLeaf, uEbx, uEcx, uEdx);
Index: trunk/src/VBox/VMM/VMMR3/TM.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMR3/TM.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/VMMR3/TM.cpp	(revision 93515)
@@ -887,5 +887,5 @@
          */
         ASMCpuId(0x80000000, &uEAX, &uEBX, &uECX, &uEDX);
-        if (uEAX >= 0x80000007 && ASMIsValidExtRange(uEAX))
+        if (uEAX >= 0x80000007 && RTX86IsValidExtRange(uEAX))
         {
             ASMCpuId(0x80000007, &uEAX, &uEBX, &uECX, &uEDX);
@@ -927,5 +927,5 @@
              * as the AMD test above.
              */
-            /** @todo use ASMGetCpuFamily() and ASMGetCpuModel() here. */
+            /** @todo use RTX86GetCpuFamily() and RTX86GetCpuModel() here. */
             ASMCpuId(1, &uEAX, &uEBX, &uECX, &uEDX);
             unsigned uModel  = (uEAX >> 4) & 0x0f;
@@ -947,5 +947,5 @@
              * Eden X2 and QuadCore.
              */
-            /** @todo use ASMGetCpuFamily() and ASMGetCpuModel() here. */
+            /** @todo use RTX86GetCpuFamily() and RTX86GetCpuModel() here. */
             ASMCpuId(1, &uEAX, &uEBX, &uECX, &uEDX);
             unsigned uStepping = (uEAX & 0x0f);
@@ -963,5 +963,5 @@
              * Shanghai - Check the model, family and stepping.
              */
-            /** @todo use ASMGetCpuFamily() and ASMGetCpuModel() here. */
+            /** @todo use RTX86GetCpuFamily() and RTX86GetCpuModel() here. */
             ASMCpuId(1, &uEAX, &uEBX, &uECX, &uEDX);
             unsigned uFamily   = (uEAX >> 8) & 0x0f;
Index: trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp
===================================================================
--- trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp	(revision 93514)
+++ trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp	(revision 93515)
@@ -176,7 +176,7 @@
     {
         uint32_t cMaxExt = ASMCpuId_EAX(0x80000000);
-        if (ASMIsValidExtRange(cMaxExt)&& cMaxExt >= 0x80000008)
+        if (RTX86IsValidExtRange(cMaxExt)&& cMaxExt >= 0x80000008)
             cMaxWidth = ASMCpuId_EAX(0x80000008) & 0xff;
-        else if (   ASMIsValidStdRange(ASMCpuId_EAX(0))
+        else if (   RTX86IsValidStdRange(ASMCpuId_EAX(0))
                  && (ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_PSE36))
             cMaxWidth = 36;
@@ -191,5 +191,5 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidStdRange(ASMCpuId_EAX(0))
+        && RTX86IsValidStdRange(ASMCpuId_EAX(0))
         && (ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_PAE);
 }
@@ -199,5 +199,5 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidExtRange(ASMCpuId_EAX(0x80000000))
+        && RTX86IsValidExtRange(ASMCpuId_EAX(0x80000000))
         && (ASMCpuId_EDX(0x80000001) & X86_CPUID_EXT_FEATURE_EDX_LONG_MODE);
 }
@@ -207,5 +207,5 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidExtRange(ASMCpuId_EAX(0x80000000))
+        && RTX86IsValidExtRange(ASMCpuId_EAX(0x80000000))
         && (ASMCpuId_EDX(0x80000001) & X86_CPUID_EXT_FEATURE_EDX_NX);
 }
@@ -215,5 +215,5 @@
 {
     return ASMHasCpuId()
-        && ASMIsValidStdRange(ASMCpuId_EAX(0))
+        && RTX86IsValidStdRange(ASMCpuId_EAX(0))
         && (ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_X2APIC);
 }
@@ -4412,5 +4412,5 @@
      * Are MSRs supported by the CPU?
      */
-    if (   !ASMIsValidStdRange(ASMCpuId_EAX(0))
+    if (   !RTX86IsValidStdRange(ASMCpuId_EAX(0))
         || !(ASMCpuId_EDX(1) & X86_CPUID_FEATURE_EDX_MSR) )
     {
@@ -4458,5 +4458,5 @@
     uint32_t uEax, uEbx, uEcx, uEdx;
     ASMCpuIdExSlow(0, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-    if (!ASMIsValidStdRange(uEax))
+    if (!RTX86IsValidStdRange(uEax))
         return RTMsgErrorRc(VERR_NOT_SUPPORTED, "Invalid std CPUID range: %#x\n", uEax);
     g_enmVendor = CPUMR3CpuIdDetectVendorEx(uEax, uEbx, uEcx, uEdx);
@@ -4464,7 +4464,7 @@
     ASMCpuIdExSlow(1, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
     g_enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx(g_enmVendor,
-                                                     ASMGetCpuFamily(uEax),
-                                                     ASMGetCpuModel(uEax, g_enmVendor == CPUMCPUVENDOR_INTEL),
-                                                     ASMGetCpuStepping(uEax));
+                                                     RTX86GetCpuFamily(uEax),
+                                                     RTX86GetCpuModel(uEax, g_enmVendor == CPUMCPUVENDOR_INTEL),
+                                                     RTX86GetCpuStepping(uEax));
     g_fIntelNetBurst = CPUMMICROARCH_IS_INTEL_NETBURST(g_enmMicroarch);
 
@@ -4637,5 +4637,5 @@
     uint32_t uEax, uEbx, uEcx, uEdx;
     ASMCpuIdExSlow(0, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-    if (!ASMIsValidStdRange(uEax))
+    if (!RTX86IsValidStdRange(uEax))
         return RTMsgErrorRc(VERR_NOT_SUPPORTED, "Invalid std CPUID range: %#x\n", uEax);
 
@@ -4650,7 +4650,7 @@
     ASMCpuIdExSlow(1, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
     CPUMMICROARCH enmMicroarch = CPUMR3CpuIdDetermineMicroarchEx(enmVendor,
-                                                                 ASMGetCpuFamily(uEax),
-                                                                 ASMGetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
-                                                                 ASMGetCpuStepping(uEax));
+                                                                 RTX86GetCpuFamily(uEax),
+                                                                 RTX86GetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
+                                                                 RTX86GetCpuStepping(uEax));
 
     /*
@@ -4664,5 +4664,5 @@
 
     ASMCpuIdExSlow(0x80000000, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-    if (ASMIsValidExtRange(uEax) && uEax >= UINT32_C(0x80000004))
+    if (RTX86IsValidExtRange(uEax) && uEax >= UINT32_C(0x80000004))
     {
         /* Get the raw name and strip leading spaces. */
@@ -4737,6 +4737,6 @@
     {
         ASMCpuIdExSlow(1, 0, 0, 0, &uEax, &uEbx, &uEcx, &uEdx);
-        RTStrPrintf(szNameC, sizeof(szNameC), "%s_%u_%u_%u", cpuVendorToString(enmVendor), ASMGetCpuFamily(uEax),
-                    ASMGetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL), ASMGetCpuStepping(uEax));
+        RTStrPrintf(szNameC, sizeof(szNameC), "%s_%u_%u_%u", cpuVendorToString(enmVendor), RTX86GetCpuFamily(uEax),
+                    RTX86GetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL), RTX86GetCpuStepping(uEax));
         pszCpuDesc = pszName = szNameC;
         vbCpuRepDebug("Name/NameC: %s\n", szNameC);
@@ -4843,7 +4843,7 @@
                    pszCpuDesc,
                    CPUMR3CpuVendorName(enmVendor),
-                   ASMGetCpuFamily(uEax),
-                   ASMGetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
-                   ASMGetCpuStepping(uEax),
+                   RTX86GetCpuFamily(uEax),
+                   RTX86GetCpuModel(uEax, enmVendor == CPUMCPUVENDOR_INTEL),
+                   RTX86GetCpuStepping(uEax),
                    CPUMR3MicroarchName(enmMicroarch),
                    vbCpuRepGuessScalableBusFrequencyName(),
Index: trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-GetCpuVendor.c
===================================================================
--- trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-GetCpuVendor.c	(revision 93514)
+++ trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-GetCpuVendor.c	(revision 93515)
@@ -37,13 +37,13 @@
         uint32_t uEbx, uEcx, uEdx;
         ASMCpuIdExSlow(0, 0, 0, 0, NULL, &uEbx, &uEcx, &uEdx);
-        if (ASMIsIntelCpuEx(uEbx, uEcx, uEdx))
+        if (RTX86IsIntelCpu(uEbx, uEcx, uEdx))
             return BS3CPUVENDOR_INTEL;
-        if (ASMIsAmdCpuEx(uEbx, uEcx, uEdx))
+        if (RTX86IsAmdCpu(uEbx, uEcx, uEdx))
             return BS3CPUVENDOR_AMD;
-        if (ASMIsViaCentaurCpuEx(uEbx, uEcx, uEdx))
+        if (RTX86IsViaCentaurCpu(uEbx, uEcx, uEdx))
             return BS3CPUVENDOR_VIA;
-        if (ASMIsShanghaiCpuEx(uEbx, uEcx, uEdx))
+        if (RTX86IsShanghaiCpu(uEbx, uEcx, uEdx))
             return BS3CPUVENDOR_SHANGHAI;
-        if (ASMIsHygonCpuEx(uEbx, uEcx, uEdx))
+        if (RTX86IsHygonCpu(uEbx, uEcx, uEdx))
             return BS3CPUVENDOR_HYGON;
         return BS3CPUVENDOR_UNKNOWN;
Index: trunk/src/VBox/ValidationKit/testboxscript/TestBoxHelper.cpp
===================================================================
--- trunk/src/VBox/ValidationKit/testboxscript/TestBoxHelper.cpp	(revision 93514)
+++ trunk/src/VBox/ValidationKit/testboxscript/TestBoxHelper.cpp	(revision 93515)
@@ -467,5 +467,5 @@
     /* VT-x */
     ASMCpuId(0x00000000, &uEax, &uEbx, &uEcx, &uEdx);
-    if (ASMIsValidStdRange(uEax))
+    if (RTX86IsValidStdRange(uEax))
     {
         ASMCpuId(0x00000001, &uEax, &uEbx, &uEcx, &uEdx);
@@ -476,5 +476,5 @@
     /* AMD-V */
     ASMCpuId(0x80000000, &uEax, &uEbx, &uEcx, &uEdx);
-    if (ASMIsValidExtRange(uEax))
+    if (RTX86IsValidExtRange(uEax))
     {
         ASMCpuId(0x80000001, &uEax, &uEbx, &uEcx, &uEdx);
@@ -509,5 +509,5 @@
         uint32_t uEax, uEbx, uEcx, uEdx;
         ASMCpuId(0x80000000, &uEax, &uEbx, &uEcx, &uEdx);
-        if (ASMIsValidExtRange(uEax) && uEax >= 0x8000000a)
+        if (RTX86IsValidExtRange(uEax) && uEax >= 0x8000000a)
         {
             ASMCpuId(0x8000000a, &uEax, &uEbx, &uEcx, &uEdx);
@@ -617,5 +617,5 @@
             uint32_t uEax, uEbx, uEcx, uEdx;
             ASMCpuId(0x00000000, &uEax, &uEbx, &uEcx, &uEdx);
-            if (ASMIsValidStdRange(uEax))
+            if (RTX86IsValidStdRange(uEax))
             {
                 ASMCpuId(0x00000001, &uEax, &uEbx, &uEcx, &uEdx);
@@ -625,5 +625,5 @@
                        won't necessarily do so. */
                     ASMCpuId(0x80000000, &uEax, &uEbx, &uEcx, &uEdx);
-                    if (ASMIsValidExtRange(uEax))
+                    if (RTX86IsValidExtRange(uEax))
                     {
                         ASMCpuId(0x80000001, &uEax, &uEbx, &uEcx, &uEdx);
@@ -652,10 +652,10 @@
     uint32_t uEax, uEbx, uEcx, uEdx;
     ASMCpuId(0, &uEax, &uEbx, &uEcx, &uEdx);
-    if (ASMIsValidStdRange(uEax) && uEax >= 1)
+    if (RTX86IsValidStdRange(uEax) && uEax >= 1)
     {
         uint32_t uEax1 = ASMCpuId_EAX(1);
-        uint32_t uVersion = (ASMGetCpuFamily(uEax1) << 24)
-                          | (ASMGetCpuModel(uEax1, ASMIsIntelCpuEx(uEbx, uEcx, uEdx)) << 8)
-                          | ASMGetCpuStepping(uEax1);
+        uint32_t uVersion = (RTX86GetCpuFamily(uEax1) << 24)
+                          | (RTX86GetCpuModel(uEax1, RTX86IsIntelCpu(uEbx, uEcx, uEdx)) << 8)
+                          | RTX86GetCpuStepping(uEax1);
         int cch = RTPrintf("%#x\n", uVersion);
         return cch > 0 ? RTEXITCODE_SUCCESS : RTEXITCODE_FAILURE;
