Changeset 93519 in vbox for trunk/src/VBox/VMM/VMMR3
- Timestamp:
- Jan 31, 2022 10:45:35 PM (3 years ago)
- Location:
- trunk/src/VBox/VMM/VMMR3
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp
r93515 r93519 37 37 #include <iprt/mem.h> 38 38 #include <iprt/string.h> 39 #include <iprt/x86-helpers.h> 39 40 40 41 … … 822 823 823 824 825 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 824 826 /** 825 827 * Append a CPUID leaf or sub-leaf. … … 866 868 return VINF_SUCCESS; 867 869 } 870 #endif /* RT_ARCH_X86 || RT_ARCH_AMD64 */ 868 871 869 872 … … 5278 5281 * handy when validating features for raw mode. 5279 5282 */ 5283 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 5280 5284 CPUMCPUID aRawStd[16]; 5281 5285 for (unsigned i = 0; i < RT_ELEMENTS(aRawStd); i++) … … 5289 5293 SSMR3PutU32(pSSM, RT_ELEMENTS(aRawExt)); 5290 5294 SSMR3PutMem(pSSM, &aRawExt[0], sizeof(aRawExt)); 5295 5296 #else 5297 /* Two zero counts on non-x86 hosts. */ 5298 SSMR3PutU32(pSSM, 0); 5299 SSMR3PutU32(pSSM, 0); 5300 #endif 5291 5301 } 5292 5302 … … 5478 5488 AssertRCReturn(rc, rc); 5479 5489 for (uint32_t i = cRawStd; i < RT_ELEMENTS(aRawStd); i++) 5490 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 5480 5491 ASMCpuIdExSlow(i, 0, 0, 0, &aRawStd[i].uEax, &aRawStd[i].uEbx, &aRawStd[i].uEcx, &aRawStd[i].uEdx); 5492 #else 5493 RT_ZERO(aRawStd[i]); 5494 #endif 5481 5495 5482 5496 CPUMCPUID aRawExt[32]; … … 5488 5502 AssertRCReturn(rc, rc); 5489 5503 for (uint32_t i = cRawExt; i < RT_ELEMENTS(aRawExt); i++) 5504 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 5490 5505 ASMCpuIdExSlow(i | UINT32_C(0x80000000), 0, 0, 0, &aRawExt[i].uEax, &aRawExt[i].uEbx, &aRawExt[i].uEcx, &aRawExt[i].uEdx); 5506 #else 5507 RT_ZERO(aRawExt[i]); 5508 #endif 5491 5509 5492 5510 /* … … 5494 5512 */ 5495 5513 CPUMCPUID aHostRawStd[16]; 5514 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 5496 5515 for (unsigned i = 0; i < RT_ELEMENTS(aHostRawStd); i++) 5497 5516 ASMCpuIdExSlow(i, 0, 0, 0, &aHostRawStd[i].uEax, &aHostRawStd[i].uEbx, &aHostRawStd[i].uEcx, &aHostRawStd[i].uEdx); 5517 #else 5518 RT_ZERO(aHostRawStd); 5519 #endif 5498 5520 5499 5521 CPUMCPUID aHostRawExt[32]; 5522 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 5500 5523 for (unsigned i = 0; i < RT_ELEMENTS(aHostRawExt); i++) 5501 5524 ASMCpuIdExSlow(i | UINT32_C(0x80000000), 0, 0, 0, 5502 5525 &aHostRawExt[i].uEax, &aHostRawExt[i].uEbx, &aHostRawExt[i].uEcx, &aHostRawExt[i].uEdx); 5526 #else 5527 RT_ZERO(aHostRawExt); 5528 #endif 5503 5529 5504 5530 /* … … 5903 5929 5904 5930 5931 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 5905 5932 for (uint32_t uSubLeaf = 2; uSubLeaf < 64; uSubLeaf++) 5906 5933 { … … 5922 5949 } 5923 5950 } 5951 #endif 5924 5952 } 5925 5953 /* Clear leaf 0xd just in case we're loading an old state... */ … … 6056 6084 /** @todo we should check the 64 bits capabilities too! */ 6057 6085 uint32_t au32CpuId[8] = {0,0,0,0, 0,0,0,0}; 6086 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6058 6087 ASMCpuIdExSlow(0, 0, 0, 0, &au32CpuId[0], &au32CpuId[1], &au32CpuId[2], &au32CpuId[3]); 6059 6088 ASMCpuIdExSlow(1, 0, 0, 0, &au32CpuId[4], &au32CpuId[5], &au32CpuId[6], &au32CpuId[7]); 6089 #endif 6060 6090 uint32_t au32CpuIdSaved[8]; 6061 6091 rc = SSMR3GetMem(pSSM, &au32CpuIdSaved[0], sizeof(au32CpuIdSaved)); … … 6630 6660 if (fVerbose) 6631 6661 { 6632 CPUMCPUID Host; 6662 CPUMCPUID Host = {0}; 6663 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6633 6664 ASMCpuIdExSlow(1, 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 6665 #endif 6634 6666 pHlp->pfnPrintf(pHlp, "Features\n"); 6635 6667 pHlp->pfnPrintf(pHlp, " Mnemonic - Description = guest (host)\n"); … … 6661 6693 for (;;) 6662 6694 { 6663 CPUMCPUID Host; 6695 CPUMCPUID Host = {0}; 6696 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6664 6697 ASMCpuIdExSlow(pCurLeaf->uLeaf, 0, pCurLeaf->uSubLeaf, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 6698 #endif 6665 6699 6666 6700 switch (pCurLeaf->uSubLeaf) … … 6718 6752 for (uint32_t uSubLeaf = 0; uSubLeaf < 64; uSubLeaf++) 6719 6753 { 6720 CPUMCPUID Host; 6754 CPUMCPUID Host = {0}; 6755 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6721 6756 ASMCpuIdExSlow(UINT32_C(0x0000000d), 0, uSubLeaf, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 6757 #endif 6722 6758 6723 6759 switch (uSubLeaf) … … 6810 6846 && pCurLeaf->uLeaf <= uUpToLeaf) 6811 6847 { 6812 CPUMCPUID Host; 6848 CPUMCPUID Host = {0}; 6849 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6813 6850 ASMCpuIdExSlow(pCurLeaf->uLeaf, 0, pCurLeaf->uSubLeaf, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 6851 #endif 6814 6852 pHlp->pfnPrintf(pHlp, 6815 6853 "Gst: %08x/%04x %08x %08x %08x %08x\n" … … 6848 6886 6849 6887 uint32_t uLeaf; 6850 CPUMCPUID Host ;6888 CPUMCPUID Host = {0}; 6851 6889 uint32_t cLeaves = pVM->cpum.s.GuestInfo.cCpuIdLeaves; 6852 6890 PCPUMCPUIDLEAF paLeaves = pVM->cpum.s.GuestInfo.paCpuIdLeavesR3; … … 6860 6898 * Standard leaves. Custom raw dump here due to ECX sub-leaves host handling. 6861 6899 */ 6900 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6862 6901 uint32_t cHstMax = ASMCpuId_EAX(0); 6902 #else 6903 uint32_t cHstMax = 0; 6904 #endif 6863 6905 uint32_t cGstMax = paLeaves[0].uLeaf == 0 ? paLeaves[0].uEax : 0; 6864 6906 uint32_t cMax = RT_MAX(cGstMax, cHstMax); … … 6876 6918 for (uint32_t uSubLeaf = 0; uSubLeaf < cMaxSubLeaves; uSubLeaf++) 6877 6919 { 6920 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6878 6921 ASMCpuIdExSlow(uLeaf, 0, uSubLeaf, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 6922 #endif 6879 6923 if ( (uintptr_t)(pCurLeaf - paLeaves) < cLeaves 6880 6924 && pCurLeaf->uLeaf == uLeaf … … 6940 6984 pCurLeaf = cpumR3CpuIdInfoRawRange(pHlp, paLeaves, cLeaves, pCurLeaf, UINT32_C(0x3fffffff), "Unknown CPUID Leaves"); 6941 6985 6986 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6942 6987 ASMCpuIdExSlow(UINT32_C(0x40000000), 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 6988 #endif 6943 6989 cHstMax = Host.uEax >= UINT32_C(0x40000001) && Host.uEax <= UINT32_C(0x40000fff) ? Host.uEax : 0; 6944 6990 cGstMax = (uintptr_t)(pCurLeaf - paLeaves) < cLeaves && pCurLeaf->uLeaf == UINT32_C(0x40000000) … … 6961 7007 pCurLeaf = cpumR3CpuIdInfoRawRange(pHlp, paLeaves, cLeaves, pCurLeaf, UINT32_C(0x7fffffff), "Unknown CPUID Leaves"); 6962 7008 7009 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6963 7010 ASMCpuIdExSlow(UINT32_C(0x80000000), 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7011 #endif 6964 7012 cHstMax = RTX86IsValidExtRange(Host.uEax) ? RT_MIN(Host.uEax, UINT32_C(0x80000fff)) : 0; 6965 7013 cGstMax = (uintptr_t)(pCurLeaf - paLeaves) < cLeaves && pCurLeaf->uLeaf == UINT32_C(0x80000000) … … 6981 7029 for (uint32_t uSubLeaf = 0; uSubLeaf < cMaxSubLeaves; uSubLeaf++) 6982 7030 { 7031 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 6983 7032 ASMCpuIdExSlow(uLeaf, 0, uSubLeaf, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7033 #endif 6984 7034 if ( (uintptr_t)(pCurLeaf - paLeaves) < cLeaves 6985 7035 && pCurLeaf->uLeaf == uLeaf … … 7039 7089 else 7040 7090 { 7091 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 7041 7092 ASMCpuIdExSlow(0x80000001, 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7093 #endif 7042 7094 pHlp->pfnPrintf(pHlp, "Ext Features\n"); 7043 7095 pHlp->pfnPrintf(pHlp, " Mnemonic - Description = guest (host)\n"); … … 7047 7099 { 7048 7100 pHlp->pfnPrintf(pHlp, "SVM Feature Identification (leaf A):\n"); 7101 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 7049 7102 ASMCpuIdExSlow(0x8000000a, 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7103 #endif 7050 7104 pCurLeaf = cpumR3CpuIdGetLeaf(paLeaves, cLeaves, UINT32_C(0x8000000a), 0); 7051 7105 uint32_t const uGstEdx = pCurLeaf ? pCurLeaf->uEdx : 0; … … 7149 7203 if (iVerbosity && (pCurLeaf = cpumR3CpuIdGetLeaf(paLeaves, cLeaves, UINT32_C(0x80000007), 0)) != NULL) 7150 7204 { 7205 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 7151 7206 ASMCpuIdExSlow(UINT32_C(0x80000007), 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7207 #endif 7152 7208 if (pCurLeaf->uEdx || (Host.uEdx && iVerbosity)) 7153 7209 { … … 7162 7218 if (pCurLeaf != NULL) 7163 7219 { 7220 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 7164 7221 ASMCpuIdExSlow(UINT32_C(0x80000008), 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7222 #endif 7165 7223 if (pCurLeaf->uEbx || (Host.uEbx && iVerbosity)) 7166 7224 { … … 7206 7264 pCurLeaf = cpumR3CpuIdInfoRawRange(pHlp, paLeaves, cLeaves, pCurLeaf, UINT32_C(0xbfffffff), "Unknown CPUID Leaves"); 7207 7265 7266 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 7208 7267 ASMCpuIdExSlow(UINT32_C(0xc0000000), 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7268 #endif 7209 7269 cHstMax = Host.uEax >= UINT32_C(0xc0000001) && Host.uEax <= UINT32_C(0xc0000fff) 7210 7270 ? RT_MIN(Host.uEax, UINT32_C(0xc0000fff)) : 0; … … 7226 7286 if (iVerbosity && (pCurLeaf = cpumR3CpuIdGetLeaf(paLeaves, cLeaves, UINT32_C(0xc0000001), 0)) != NULL) 7227 7287 { 7288 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 7228 7289 ASMCpuIdExSlow(0xc0000001, 0, 0, 0, &Host.uEax, &Host.uEbx, &Host.uEcx, &Host.uEdx); 7290 #endif 7229 7291 uint32_t uEdxGst = pCurLeaf->uEdx; 7230 7292 uint32_t uEdxHst = Host.uEdx; -
trunk/src/VBox/VMM/VMMR3/CPUMR3Db.cpp
r93515 r93519 752 752 } 753 753 754 #if defined(RT_ARCH_X86) || defined(RT_ARCH_AMD64) 754 755 755 756 /** … … 869 870 } 870 871 872 #endif /* RT_ARCH_X86 || RT_ARCH_AMD64 */ 871 873 872 874 int cpumR3DbGetCpuInfo(const char *pszName, PCPUMINFO pInfo)
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