Changeset 93728 in vbox for trunk/src/VBox
- Timestamp:
- Feb 14, 2022 2:32:18 PM (3 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMR3/NEMR3Native-darwin.cpp
r93723 r93728 1132 1132 READ_MSR(MSR_K8_SF_MASK, pVCpu->cpum.GstCtx.msrSFMASK); 1133 1133 } 1134 if (fWhat & CPUMCTX_EXTRN_ OTHER_MSRS)1134 if (fWhat & CPUMCTX_EXTRN_TSC_AUX) 1135 1135 { 1136 1136 PCPUMCTXMSRS pCtxMsrs = CPUMQueryGuestCtxMsrsPtr(pVCpu); 1137 1137 READ_MSR(MSR_K8_TSC_AUX, pCtxMsrs->msr.TscAux); 1138 1138 } 1139 if (fWhat & CPUMCTX_EXTRN_OTHER_MSRS) 1140 { 1139 1141 /* Last Branch Record. */ 1140 1142 if (pVM->nem.s.fLbr) … … 1143 1145 uint32_t const idFromIpMsrStart = pVM->nem.s.idLbrFromIpMsrFirst; 1144 1146 uint32_t const idToIpMsrStart = pVM->nem.s.idLbrToIpMsrFirst; 1147 uint32_t const idInfoMsrStart = pVM->nem.s.idLbrInfoMsrFirst; 1145 1148 uint32_t const cLbrStack = pVM->nem.s.idLbrFromIpMsrLast - pVM->nem.s.idLbrFromIpMsrFirst + 1; 1146 1149 Assert(cLbrStack <= 32); … … 1152 1155 if (idToIpMsrStart != 0) 1153 1156 READ_MSR(idToIpMsrStart + i, pVmcsInfoShared->au64LbrToIpMsr[i]); 1157 if (idInfoMsrStart != 0) 1158 READ_MSR(idInfoMsrStart + i, pVmcsInfoShared->au64LbrInfoMsr[i]); 1154 1159 } 1155 1160 1156 1161 READ_MSR(pVM->nem.s.idLbrTosMsr, pVmcsInfoShared->u64LbrTosMsr); 1162 1163 if (pVM->nem.s.idLerFromIpMsr) 1164 READ_MSR(pVM->nem.s.idLerFromIpMsr, pVmcsInfoShared->u64LerFromIpMsr); 1165 if (pVM->nem.s.idLerToIpMsr) 1166 READ_MSR(pVM->nem.s.idLerToIpMsr, pVmcsInfoShared->u64LerToIpMsr); 1157 1167 } 1158 1168 } … … 1749 1759 uint32_t const idFromIpMsrStart = pVM->nem.s.idLbrFromIpMsrFirst; 1750 1760 uint32_t const idToIpMsrStart = pVM->nem.s.idLbrToIpMsrFirst; 1761 uint32_t const idInfoMsrStart = pVM->nem.s.idLbrInfoMsrFirst; 1751 1762 uint32_t const cLbrStack = pVM->nem.s.idLbrFromIpMsrLast - pVM->nem.s.idLbrFromIpMsrFirst + 1; 1752 1763 Assert(cLbrStack <= 32); … … 1758 1769 if (idToIpMsrStart != 0) 1759 1770 WRITE_MSR(idToIpMsrStart + i, pVmcsInfoShared->au64LbrToIpMsr[i]); 1771 if (idInfoMsrStart != 0) 1772 WRITE_MSR(idInfoMsrStart + i, pVmcsInfoShared->au64LbrInfoMsr[i]); 1760 1773 } 1761 1774 1762 1775 WRITE_MSR(pVM->nem.s.idLbrTosMsr, pVmcsInfoShared->u64LbrTosMsr); 1776 if (pVM->nem.s.idLerFromIpMsr) 1777 WRITE_MSR(pVM->nem.s.idLerFromIpMsr, pVmcsInfoShared->u64LerFromIpMsr); 1778 if (pVM->nem.s.idLerToIpMsr) 1779 WRITE_MSR(pVM->nem.s.idLerToIpMsr, pVmcsInfoShared->u64LerToIpMsr); 1763 1780 } 1764 1781 … … 1984 2001 uint32_t idLbrToIpMsrFirst; 1985 2002 uint32_t idLbrToIpMsrLast; 2003 uint32_t idLbrInfoMsrFirst; 2004 uint32_t idLbrInfoMsrLast; 1986 2005 uint32_t idLbrTosMsr; 2006 uint32_t idLbrSelectMsr; 2007 uint32_t idLerFromIpMsr; 2008 uint32_t idLerToIpMsr; 1987 2009 1988 2010 /* … … 2001 2023 idLbrToIpMsrFirst = 0x0; 2002 2024 idLbrToIpMsrLast = 0x0; 2025 idLbrInfoMsrFirst = 0x0; 2026 idLbrInfoMsrLast = 0x0; 2003 2027 idLbrTosMsr = MSR_P4_LASTBRANCH_TOS; 2028 idLbrSelectMsr = 0x0; 2029 idLerFromIpMsr = 0x0; 2030 idLerToIpMsr = 0x0; 2004 2031 break; 2005 2032 … … 2011 2038 idLbrToIpMsrFirst = MSR_LASTBRANCH_0_TO_IP; 2012 2039 idLbrToIpMsrLast = MSR_LASTBRANCH_31_TO_IP; 2040 idLbrInfoMsrFirst = MSR_LASTBRANCH_0_INFO; 2041 idLbrInfoMsrLast = MSR_LASTBRANCH_31_INFO; 2013 2042 idLbrTosMsr = MSR_LASTBRANCH_TOS; 2043 idLbrSelectMsr = MSR_LASTBRANCH_SELECT; 2044 idLerFromIpMsr = MSR_LER_FROM_IP; 2045 idLerToIpMsr = MSR_LER_TO_IP; 2014 2046 break; 2015 2047 … … 2022 2054 idLbrToIpMsrFirst = MSR_LASTBRANCH_0_TO_IP; 2023 2055 idLbrToIpMsrLast = MSR_LASTBRANCH_15_TO_IP; 2056 idLbrInfoMsrFirst = MSR_LASTBRANCH_0_INFO; 2057 idLbrInfoMsrLast = MSR_LASTBRANCH_15_INFO; 2024 2058 idLbrTosMsr = MSR_LASTBRANCH_TOS; 2059 idLbrSelectMsr = MSR_LASTBRANCH_SELECT; 2060 idLerFromIpMsr = MSR_LER_FROM_IP; 2061 idLerToIpMsr = MSR_LER_TO_IP; 2025 2062 break; 2026 2063 … … 2030 2067 idLbrToIpMsrFirst = MSR_CORE2_LASTBRANCH_0_TO_IP; 2031 2068 idLbrToIpMsrLast = MSR_CORE2_LASTBRANCH_3_TO_IP; 2069 idLbrInfoMsrFirst = 0x0; 2070 idLbrInfoMsrLast = 0x0; 2032 2071 idLbrTosMsr = MSR_CORE2_LASTBRANCH_TOS; 2072 idLbrSelectMsr = 0x0; 2073 idLerFromIpMsr = 0x0; 2074 idLerToIpMsr = 0x0; 2033 2075 break; 2034 2076 … … 2053 2095 AssertCompile( RT_ELEMENTS(pVCpu0->nem.s.vmx.VmcsInfo.au64LbrFromIpMsr) 2054 2096 == RT_ELEMENTS(pVCpu0->nem.s.vmx.VmcsInfo.au64LbrToIpMsr)); 2097 AssertCompile( RT_ELEMENTS(pVCpu0->nem.s.vmx.VmcsInfo.au64LbrFromIpMsr) 2098 == RT_ELEMENTS(pVCpu0->nem.s.vmx.VmcsInfo.au64LbrInfoMsr)); 2055 2099 if (cLbrStack > RT_ELEMENTS(pVCpu0->nem.s.vmx.VmcsInfo.au64LbrFromIpMsr)) 2056 2100 { … … 2064 2108 * Update the LBR info. to the VM struct. for use later. 2065 2109 */ 2066 pVM->nem.s.idLbrTosMsr = idLbrTosMsr; 2110 pVM->nem.s.idLbrTosMsr = idLbrTosMsr; 2111 pVM->nem.s.idLbrSelectMsr = idLbrSelectMsr; 2067 2112 2068 2113 pVM->nem.s.idLbrFromIpMsrFirst = idLbrFromIpMsrFirst; … … 2071 2116 pVM->nem.s.idLbrToIpMsrFirst = idLbrToIpMsrFirst; 2072 2117 pVM->nem.s.idLbrToIpMsrLast = idLbrToIpMsrLast; 2118 2119 pVM->nem.s.idLbrInfoMsrFirst = idLbrInfoMsrFirst; 2120 pVM->nem.s.idLbrInfoMsrLast = idLbrInfoMsrLast; 2121 2122 pVM->nem.s.idLerFromIpMsr = idLerFromIpMsr; 2123 pVM->nem.s.idLerToIpMsr = idLerToIpMsr; 2073 2124 return VINF_SUCCESS; 2074 2125 } … … 2317 2368 uint32_t const idFromIpMsrStart = pVM->nem.s.idLbrFromIpMsrFirst; 2318 2369 uint32_t const idToIpMsrStart = pVM->nem.s.idLbrToIpMsrFirst; 2370 uint32_t const idInfoMsrStart = pVM->nem.s.idLbrInfoMsrFirst; 2319 2371 uint32_t const cLbrStack = pVM->nem.s.idLbrFromIpMsrLast - pVM->nem.s.idLbrFromIpMsrFirst + 1; 2320 2372 Assert(cLbrStack <= 32); 2321 2373 for (uint32_t i = 0; i < cLbrStack; i++) 2322 2374 { 2323 rc = nemR3DarwinMsrSetManaged(pVCpu, idFromIpMsrStart + i, HV_MSR_READ); AssertRCReturn(rc, rc); 2375 rc = nemR3DarwinMsrSetManaged(pVCpu, idFromIpMsrStart + i, HV_MSR_READ | HV_MSR_WRITE); 2376 AssertRCReturn(rc, rc); 2324 2377 2325 2378 /* Some CPUs don't have a Branch-To-IP MSR (P4 and related Xeons). */ 2326 2379 if (idToIpMsrStart != 0) 2327 2380 { 2328 rc = nemR3DarwinMsrSetManaged(pVCpu, idToIpMsrStart + i, HV_MSR_READ); AssertRCReturn(rc, rc); 2381 rc = nemR3DarwinMsrSetManaged(pVCpu, idToIpMsrStart + i, HV_MSR_READ | HV_MSR_WRITE); 2382 AssertRCReturn(rc, rc); 2329 2383 } 2330 } 2331 2332 rc = nemR3DarwinMsrSetManaged(pVCpu, pVM->nem.s.idLbrTosMsr, HV_MSR_READ); AssertRCReturn(rc, rc); 2384 2385 if (idInfoMsrStart != 0) 2386 { 2387 rc = nemR3DarwinMsrSetManaged(pVCpu, idInfoMsrStart + i, HV_MSR_READ | HV_MSR_WRITE); 2388 AssertRCReturn(rc, rc); 2389 } 2390 } 2391 2392 rc = nemR3DarwinMsrSetManaged(pVCpu, pVM->nem.s.idLbrTosMsr, HV_MSR_READ | HV_MSR_WRITE); 2393 AssertRCReturn(rc, rc); 2394 2395 if (pVM->nem.s.idLerFromIpMsr) 2396 { 2397 rc = nemR3DarwinMsrSetManaged(pVCpu, pVM->nem.s.idLerFromIpMsr, HV_MSR_READ | HV_MSR_WRITE); 2398 AssertRCReturn(rc, rc); 2399 } 2400 2401 if (pVM->nem.s.idLerToIpMsr) 2402 { 2403 rc = nemR3DarwinMsrSetManaged(pVCpu, pVM->nem.s.idLerToIpMsr, HV_MSR_READ | HV_MSR_WRITE); 2404 AssertRCReturn(rc, rc); 2405 } 2406 2407 if (pVM->nem.s.idLbrSelectMsr) 2408 { 2409 rc = nemR3DarwinMsrSetManaged(pVCpu, pVM->nem.s.idLbrSelectMsr, HV_MSR_READ | HV_MSR_WRITE); 2410 AssertRCReturn(rc, rc); 2411 } 2333 2412 } 2334 2413 … … 2603 2682 */ 2604 2683 pHlp->pfnPrintf(pHlp, "CPU[%u]: LBRs (most-recent first)\n", pVCpu->idCpu); 2684 if (pVM->nem.s.idLerFromIpMsr) 2685 pHlp->pfnPrintf(pHlp, "LER: From IP=%#016RX64 - To IP=%#016RX64\n", 2686 pVmcsInfoShared->u64LerFromIpMsr, pVmcsInfoShared->u64LerToIpMsr); 2605 2687 uint32_t idxCurrent = idxTopOfStack; 2606 2688 Assert(idxTopOfStack < cLbrStack); … … 2610 2692 { 2611 2693 if (pVM->nem.s.idLbrToIpMsrFirst) 2612 pHlp->pfnPrintf(pHlp, " Branch (%2u): From IP=%#016RX64 - To IP=%#016RX64\n", idxCurrent, 2613 pVmcsInfoShared->au64LbrFromIpMsr[idxCurrent], pVmcsInfoShared->au64LbrToIpMsr[idxCurrent]); 2694 pHlp->pfnPrintf(pHlp, " Branch (%2u): From IP=%#016RX64 - To IP=%#016RX64 (Info: %#016RX64)\n", idxCurrent, 2695 pVmcsInfoShared->au64LbrFromIpMsr[idxCurrent], 2696 pVmcsInfoShared->au64LbrToIpMsr[idxCurrent], 2697 pVmcsInfoShared->au64LbrInfoMsr[idxCurrent]); 2614 2698 else 2615 2699 pHlp->pfnPrintf(pHlp, " Branch (%2u): LBR=%#RX64\n", idxCurrent, pVmcsInfoShared->au64LbrFromIpMsr[idxCurrent]); -
trunk/src/VBox/VMM/include/HMVMXCommon.h
r93115 r93728 251 251 /** List of LastBranch-To-IP MSRs. */ 252 252 uint64_t au64LbrToIpMsr[32]; 253 /** List of LastBranch-Info MSRs. */ 254 uint64_t au64LbrInfoMsr[32]; 253 255 /** The MSR containing the index to the most recent branch record. */ 254 256 uint64_t u64LbrTosMsr; 257 /** The MSR containing the last event record from IP value. */ 258 uint64_t u64LerFromIpMsr; 259 /** The MSR containing the last event record to IP value. */ 260 uint64_t u64LerToIpMsr; 255 261 /** @} */ 256 262 } VMXVMCSINFOSHARED; -
trunk/src/VBox/VMM/include/NEMInternal.h
r93722 r93728 279 279 /** The host LBR TOS (top-of-stack) MSR id. */ 280 280 uint32_t idLbrTosMsr; 281 /** The host LBR select MSR id. */ 282 uint32_t idLbrSelectMsr; 283 /** The host last event record from IP MSR id. */ 284 uint32_t idLerFromIpMsr; 285 /** The host last event record to IP MSR id. */ 286 uint32_t idLerToIpMsr; 281 287 282 288 /** The first valid host LBR branch-from-IP stack range. */ … … 289 295 /** The last valid host LBR branch-to-IP stack range. */ 290 296 uint32_t idLbrToIpMsrLast; 297 298 /** The first valid host LBR info stack range. */ 299 uint32_t idLbrInfoMsrFirst; 300 /** The last valid host LBR info stack range. */ 301 uint32_t idLbrInfoMsrLast; 291 302 292 303 STAMCOUNTER StatMapPage;
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