Index: trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
===================================================================
--- trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp	(revision 93887)
+++ trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp	(revision 93888)
@@ -1567,5 +1567,5 @@
 
 # define DIV_STORE(a_Quotient, a_uReminder)    *puA  = (a_Quotient),    *puD = (a_uReminder)
-# define DIV_STORE_U8(a_Quotient, a_uReminder) *puAX = (a_Quotient) | ((uint16_t)(a_uReminder) << 8)
+# define DIV_STORE_U8(a_Quotient, a_uReminder) *puAX = (uint8_t)(a_Quotient) | ((uint16_t)(a_uReminder) << 8)
 
 # define MUL_LOAD_F1()                         *puA
@@ -1603,10 +1603,11 @@
     \
     /* MUL EFLAGS according to Skylake (similar to IMUL). */ \
-    *pfEFlags &= ~(X86_EFL_SF | X86_EFL_CF | X86_EFL_OF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_PF); \
+    uint32_t fEfl = *pfEFlags & ~(X86_EFL_SF | X86_EFL_CF | X86_EFL_OF | X86_EFL_AF | X86_EFL_ZF | X86_EFL_PF); \
     if (Result.s.Lo & RT_BIT_64(a_cBitsWidth - 1)) \
-        *pfEFlags |= X86_EFL_SF; \
-    *pfEFlags |= g_afParity[Result.s.Lo & 0xff]; /* (Skylake behaviour) */ \
+        fEfl |= X86_EFL_SF; \
+    fEfl |= g_afParity[Result.s.Lo & 0xff]; /* (Skylake behaviour) */ \
     if (Result.s.Hi != 0) \
-        *pfEFlags |= X86_EFL_CF | X86_EFL_OF; \
+        fEfl |= X86_EFL_CF | X86_EFL_OF; \
+    *pfEFlags = fEfl; \
     return 0; \
 }
@@ -1627,6 +1628,7 @@
     RTUINT ## a_cBitsWidth2x ## U Result; \
     /* The SF, ZF, AF and PF flags are "undefined". AMD (3990x) leaves these \
-       flags as is. Whereas Intel skylake always clear AF and ZF and calculates \
-       SF and PF as per the lower half of the result. */ \
+       flags as is - at least for the two op version. Whereas Intel skylake \
+       always clear AF and ZF and calculates SF and PF as per the lower half \
+       of the result. */ \
     uint32_t fEfl = *pfEFlags & ~(X86_EFL_CF | X86_EFL_OF); \
     \
@@ -1642,5 +1644,6 @@
         else \
         { \
-            a_fnMul(Result, uFactor1, UINT ## a_cBitsWidth ## _C(0) - uFactor2, a_cBitsWidth2x); \
+            uint ## a_cBitsWidth ## _t const uPositiveFactor2 = UINT ## a_cBitsWidth ## _C(0) - uFactor2; \
+            a_fnMul(Result, uFactor1, uPositiveFactor2, a_cBitsWidth2x); \
             if (Result.s.Hi != 0 || Result.s.Lo > RT_BIT_64(a_cBitsWidth - 1)) \
                 fEfl |= X86_EFL_CF | X86_EFL_OF; \
@@ -1652,5 +1655,6 @@
         if (!(uFactor2 & RT_BIT_64(a_cBitsWidth - 1))) \
         { \
-            a_fnMul(Result, UINT ## a_cBitsWidth ## _C(0) - uFactor1, uFactor2, a_cBitsWidth2x); \
+            uint ## a_cBitsWidth ## _t const uPositiveFactor1 = UINT ## a_cBitsWidth ## _C(0) - uFactor1; \
+            a_fnMul(Result, uPositiveFactor1, uFactor2, a_cBitsWidth2x); \
             if (Result.s.Hi != 0 || Result.s.Lo > RT_BIT_64(a_cBitsWidth - 1)) \
                 fEfl |= X86_EFL_CF | X86_EFL_OF; \
@@ -1659,6 +1663,7 @@
         else \
         { \
-            /*a_fnMul(Result, UINT ## a_cBitsWidth ## _C(0) - uFactor1, UINT ## a_cBitsWidth ## _C(0) - uFactor2, a_cBitsWidth2x);*/ \
-            a_fnMul(Result, uFactor1, uFactor2, a_cBitsWidth2x); \
+            uint ## a_cBitsWidth ## _t const uPositiveFactor1 = UINT ## a_cBitsWidth ## _C(0) - uFactor1; \
+            uint ## a_cBitsWidth ## _t const uPositiveFactor2 = UINT ## a_cBitsWidth ## _C(0) - uFactor2; \
+            a_fnMul(Result, uPositiveFactor1, uPositiveFactor2, a_cBitsWidth2x); \
             if (Result.s.Hi != 0 || Result.s.Lo >= RT_BIT_64(a_cBitsWidth - 1)) \
                 fEfl |= X86_EFL_CF | X86_EFL_OF; \
@@ -1723,5 +1728,5 @@
     { \
         RTUINT ## a_cBitsWidth2x ## U Remainder, Quotient; \
-        a_fnDivRem(Remainder, Quotient, Dividend, uDivisor); \
+        a_fnDivRem(Quotient, Remainder, Dividend, uDivisor); \
         a_fnStore(Quotient.s.Lo, Remainder.s.Lo); \
         /** @todo research the undefined DIV flags. */ \
@@ -1756,9 +1761,10 @@
         RTUINT ## a_cBitsWidth2x ## U Dividend; \
         a_fnLoad(Dividend); \
-        if ((int ## a_cBitsWidth ## _t)Dividend.s.Hi < 0) \
+        bool const fSignedDividend = RT_BOOL(Dividend.s.Hi & RT_BIT_64(a_cBitsWidth - 1)); \
+        if (fSignedDividend) \
             a_fnNeg(Dividend, a_cBitsWidth2x); \
         \
         uint ## a_cBitsWidth ## _t uDivisorPositive; \
-        if ((int ## a_cBitsWidth ## _t)uDivisor >= 0) \
+        if (!(uDivisor & RT_BIT_64(a_cBitsWidth - 1))) \
             uDivisorPositive = uDivisor; \
         else \
@@ -1766,12 +1772,12 @@
         \
         RTUINT ## a_cBitsWidth2x ## U Remainder, Quotient; \
-        a_fnDivRem(Remainder, Quotient, Dividend, uDivisorPositive); \
+        a_fnDivRem(Quotient, Remainder, Dividend, uDivisorPositive); \
         \
         /* \
          * Setup the result, checking for overflows. \
          */ \
-        if ((int ## a_cBitsWidth ## _t)uDivisor >= 0) \
+        if (!(uDivisor & RT_BIT_64(a_cBitsWidth - 1))) \
         { \
-            if ((int ## a_cBitsWidth ## _t)Dividend.s.Hi >= 0) \
+            if (!fSignedDividend) \
             { \
                 /* Positive divisor, positive dividend => result positive. */ \
@@ -1784,5 +1790,5 @@
             else \
             { \
-                /* Positive divisor, positive dividend => result negative. */ \
+                /* Positive divisor, negative dividend => result negative. */ \
                 if (Quotient.s.Hi == 0 && Quotient.s.Lo <= RT_BIT_64(a_cBitsWidth - 1)) \
                 { \
@@ -1794,5 +1800,5 @@
         else \
         { \
-            if ((int ## a_cBitsWidth ## _t)Dividend.s.Hi >= 0) \
+            if (!fSignedDividend) \
             { \
                 /* Negative divisor, positive dividend => negative quotient, positive remainder. */ \
