VirtualBox

Changeset 9407 in vbox


Ignore:
Timestamp:
Jun 5, 2008 9:42:13 AM (17 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
31641
Message:

HWACCM updates.

Location:
trunk/src/VBox/VMM
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/HWACCMInternal.h

    r9383 r9407  
    125125 */
    126126#define HWACCM_SSM_VERSION                  3
     127
     128/* Per-cpu information. */
     129typedef struct
     130{
     131    RTCPUID     idCpu;
     132
     133    RTR0MEMOBJ  pMemObj;
     134    /* Current ASID (AMD-V only) */
     135    uint32_t    uCurrentASID;
     136    /* TLB flush count */
     137    uint32_t    cTLBFlushes;
     138
     139    bool        fConfigured;
     140} HWACCM_CPUINFO;
     141typedef HWACCM_CPUINFO *PHWACCM_CPUINFO;
    127142
    128143/**
     
    347362typedef HWACCM *PHWACCM;
    348363
    349 typedef struct
    350 {
    351     RTCPUID     idCpu;
    352 
    353     RTR0MEMOBJ  pMemObj;
    354     /* Current ASID (AMD-V only) */
    355     uint32_t    uCurrentASID;
    356     /* TLB flush count */
    357     uint32_t    cTLBFlushes;
    358 
    359     bool        fVMXConfigured;
    360     bool        fSVMConfigured;
    361 } HWACCM_CPUINFO;
    362 typedef HWACCM_CPUINFO *PHWACCM_CPUINFO;
    363 
    364364#ifdef IN_RING0
    365365
     
    372372#endif
    373373
     374/* Dummy callback handlers. */
     375HWACCMR0DECL(int) HWACCMR0DummyEnter(PVM pVM, PHWACCM_CPUINFO pCpu);
     376HWACCMR0DECL(int) HWACCMR0DummyLeave(PVM pVM);
     377HWACCMR0DECL(int) HWACCMR0DummyEnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
     378HWACCMR0DECL(int) HWACCMR0DummyDisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys);
     379HWACCMR0DECL(int) HWACCMR0DummyInitVM(PVM pVM);
     380HWACCMR0DECL(int) HWACCMR0DummyTermVM(PVM pVM);
     381HWACCMR0DECL(int) HWACCMR0DummySetupVM(PVM pVM);
     382HWACCMR0DECL(int) HWACCMR0DummyRunGuestCode(PVM pVM, CPUMCTX *pCtx, PHWACCM_CPUINFO pCpu);
     383HWACCMR0DECL(int) HWACCMR0DummySaveHostState(PVM pVM);
     384HWACCMR0DECL(int) HWACCMR0DummyLoadGuestState(PVM pVM, CPUMCTX *pCtx);
     385
    374386#endif
    375387
  • trunk/src/VBox/VMM/VMMR0/HWACCMR0.cpp

    r9008 r9407  
    6262    HWACCM_CPUINFO aCpuInfo[RTCPUSET_MAX_CPUS];
    6363
     64    /** Ring 0 handlers for VT-x and AMD-V. */
     65    DECLR0CALLBACKMEMBER(int, pfnEnterSession,(PVM pVM, PHWACCM_CPUINFO pCpu));
     66    DECLR0CALLBACKMEMBER(int, pfnLeaveSession,(PVM pVM));
     67    DECLR0CALLBACKMEMBER(int, pfnSaveHostState,(PVM pVM));
     68    DECLR0CALLBACKMEMBER(int, pfnLoadGuestState,(PVM pVM, CPUMCTX *pCtx));
     69    DECLR0CALLBACKMEMBER(int, pfnRunGuestCode,(PVM pVM, CPUMCTX *pCtx, PHWACCM_CPUINFO pCpu));
     70    DECLR0CALLBACKMEMBER(int, pfnEnableCpu, (PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys));
     71    DECLR0CALLBACKMEMBER(int, pfnDisableCpu, (PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys));
     72    DECLR0CALLBACKMEMBER(int, pfnInitVM, (PVM pVM));
     73    DECLR0CALLBACKMEMBER(int, pfnTermVM, (PVM pVM));
     74    DECLR0CALLBACKMEMBER(int, pfnSetupVM, (PVM pVM));
     75
    6476    struct
    6577    {
     
    129141    HWACCMR0Globals.enmHwAccmState = HWACCMSTATE_UNINITIALIZED;
    130142
     143    /* Fill in all callbacks with placeholders. */
     144    HWACCMR0Globals.pfnEnterSession     = HWACCMR0DummyEnter;
     145    HWACCMR0Globals.pfnLeaveSession     = HWACCMR0DummyLeave;
     146    HWACCMR0Globals.pfnSaveHostState    = HWACCMR0DummySaveHostState;
     147    HWACCMR0Globals.pfnLoadGuestState   = HWACCMR0DummyLoadGuestState;
     148    HWACCMR0Globals.pfnRunGuestCode     = HWACCMR0DummyRunGuestCode;
     149    HWACCMR0Globals.pfnEnableCpu        = HWACCMR0DummyEnableCpu;
     150    HWACCMR0Globals.pfnDisableCpu       = HWACCMR0DummyDisableCpu;
     151    HWACCMR0Globals.pfnInitVM           = HWACCMR0DummyInitVM;
     152    HWACCMR0Globals.pfnTermVM           = HWACCMR0DummyTermVM;
     153    HWACCMR0Globals.pfnSetupVM          = HWACCMR0DummySetupVM;
     154
    131155#ifndef VBOX_WITH_HYBIRD_32BIT_KERNEL /* paranoia */
    132156
     
    185209                        RTHCPHYS   pScatchPagePhys;
    186210
    187                         HWACCMR0Globals.vmx.fSupported          = true;
    188211                        HWACCMR0Globals.vmx.msr.vmx_basic_info  = ASMRdMsr(MSR_IA32_VMX_BASIC_INFO);
    189212                        HWACCMR0Globals.vmx.msr.vmx_pin_ctls    = ASMRdMsr(MSR_IA32_VMX_PINBASED_CTLS);
     
    235258                             */
    236259                            HWACCMR0Globals.lLastError = VERR_VMX_IN_VMX_ROOT_MODE;
    237                             HWACCMR0Globals.vmx.fSupported = false;
    238260                        }
    239261                        else
     262                        {
     263                            HWACCMR0Globals.vmx.fSupported = true;
    240264                            VMXDisable();
     265                        }
    241266
    242267                        /* Restore CR4 again; don't leave the X86_CR4_VMXE flag set if it wasn't so before (some software could incorrectly think it's in VMX mode) */
     
    246271                        RTR0MemObjFree(pScatchMemObj, false);
    247272                        if (VBOX_FAILURE(HWACCMR0Globals.lLastError))
    248                             return HWACCMR0Globals.lLastError ;
     273                            return HWACCMR0Globals.lLastError;
    249274                    }
    250275                    else
     
    312337#endif /* !VBOX_WITH_HYBIRD_32BIT_KERNEL */
    313338
     339    if (HWACCMR0Globals.vmx.fSupported)
     340    {
     341        HWACCMR0Globals.pfnEnterSession     = VMXR0Enter;
     342        HWACCMR0Globals.pfnLeaveSession     = VMXR0Leave;
     343        HWACCMR0Globals.pfnSaveHostState    = VMXR0SaveHostState;
     344        HWACCMR0Globals.pfnLoadGuestState   = VMXR0LoadGuestState;
     345        HWACCMR0Globals.pfnRunGuestCode     = VMXR0RunGuestCode;
     346        HWACCMR0Globals.pfnEnableCpu        = VMXR0EnableCpu;
     347        HWACCMR0Globals.pfnDisableCpu       = VMXR0DisableCpu;
     348        HWACCMR0Globals.pfnInitVM           = VMXR0InitVM;
     349        HWACCMR0Globals.pfnTermVM           = VMXR0TermVM;
     350        HWACCMR0Globals.pfnSetupVM          = VMXR0SetupVM;
     351    }
     352    else
     353    if (HWACCMR0Globals.svm.fSupported)
     354    {
     355        HWACCMR0Globals.pfnEnterSession     = SVMR0Enter;
     356        HWACCMR0Globals.pfnLeaveSession     = SVMR0Leave;
     357        HWACCMR0Globals.pfnSaveHostState    = SVMR0SaveHostState;
     358        HWACCMR0Globals.pfnLoadGuestState   = SVMR0LoadGuestState;
     359        HWACCMR0Globals.pfnRunGuestCode     = SVMR0RunGuestCode;
     360        HWACCMR0Globals.pfnEnableCpu        = SVMR0EnableCpu;
     361        HWACCMR0Globals.pfnDisableCpu       = SVMR0DisableCpu;
     362        HWACCMR0Globals.pfnInitVM           = SVMR0InitVM;
     363        HWACCMR0Globals.pfnTermVM           = SVMR0TermVM;
     364        HWACCMR0Globals.pfnSetupVM          = SVMR0SetupVM;
     365    }
     366
    314367    return VINF_SUCCESS;
    315368}
     
    527580    {
    528581        AssertFailed();
     582        paRc[idCpu] = VERR_INTERNAL_ERROR;
    529583        return;
    530584    }
     
    533587    pPageCpuPhys = RTR0MemObjGetPagePhysAddr(HWACCMR0Globals.aCpuInfo[idCpu].pMemObj, 0);
    534588
    535     if (pVM->hwaccm.s.vmx.fSupported)
    536     {
    537         paRc[idCpu] = VMXR0EnableCpu(pCpu, pVM, pvPageCpu, pPageCpuPhys);
    538         AssertRC(paRc[idCpu]);
    539         if (VBOX_SUCCESS(paRc[idCpu]))
    540             HWACCMR0Globals.aCpuInfo[idCpu].fVMXConfigured = true;
    541     }
    542     else
    543     if (pVM->hwaccm.s.svm.fSupported)
    544     {
    545         paRc[idCpu] = SVMR0EnableCpu(pCpu, pVM, pvPageCpu, pPageCpuPhys);
    546         AssertRC(paRc[idCpu]);
    547         if (VBOX_SUCCESS(paRc[idCpu]))
    548             HWACCMR0Globals.aCpuInfo[idCpu].fSVMConfigured = true;
    549     }
     589    paRc[idCpu]  = HWACCMR0Globals.pfnEnableCpu(pCpu, pVM, pvPageCpu, pPageCpuPhys);
     590    AssertRC(paRc[idCpu]);
     591    if (VBOX_SUCCESS(paRc[idCpu]))
     592        HWACCMR0Globals.aCpuInfo[idCpu].fConfigured = true;
     593
    550594    return;
    551595}
     
    574618    pPageCpuPhys = RTR0MemObjGetPagePhysAddr(HWACCMR0Globals.aCpuInfo[idCpu].pMemObj, 0);
    575619
    576     if (HWACCMR0Globals.aCpuInfo[idCpu].fVMXConfigured)
    577     {
    578         paRc[idCpu] = VMXR0DisableCpu(&HWACCMR0Globals.aCpuInfo[idCpu], pvPageCpu, pPageCpuPhys);
    579         AssertRC(paRc[idCpu]);
    580         HWACCMR0Globals.aCpuInfo[idCpu].fVMXConfigured = false;
    581     }
    582     else
    583     if (HWACCMR0Globals.aCpuInfo[idCpu].fSVMConfigured)
    584     {
    585         paRc[idCpu] = SVMR0DisableCpu(&HWACCMR0Globals.aCpuInfo[idCpu], pvPageCpu, pPageCpuPhys);
    586         AssertRC(paRc[idCpu]);
    587         HWACCMR0Globals.aCpuInfo[idCpu].fSVMConfigured = false;
    588     }
     620    paRc[idCpu] = HWACCMR0Globals.pfnDisableCpu(&HWACCMR0Globals.aCpuInfo[idCpu], pvPageCpu, pPageCpuPhys);
     621    AssertRC(paRc[idCpu]);
     622    HWACCMR0Globals.aCpuInfo[idCpu].fConfigured = false;
    589623    return;
    590624}
     
    634668
    635669    /* Init a VT-x or AMD-V VM. */
    636     if (pVM->hwaccm.s.vmx.fSupported)
    637         rc = VMXR0InitVM(pVM);
    638     else
    639     if (pVM->hwaccm.s.svm.fSupported)
    640         rc = SVMR0InitVM(pVM);
    641 
    642     return rc;
     670    return HWACCMR0Globals.pfnInitVM(pVM);
    643671}
    644672
     
    661689
    662690    /* Terminate a VT-x or AMD-V VM. */
    663     if (pVM->hwaccm.s.vmx.fSupported)
    664         rc = VMXR0TermVM(pVM);
    665     else
    666     if (pVM->hwaccm.s.svm.fSupported)
    667         rc = SVMR0TermVM(pVM);
    668 
    669     return rc;
     691    return HWACCMR0Globals.pfnTermVM(pVM);
    670692}
    671693
     
    688710
    689711    /* Setup VT-x or AMD-V. */
    690     if (pVM->hwaccm.s.vmx.fSupported)
    691         rc = VMXR0SetupVM(pVM);
    692     else
    693     if (pVM->hwaccm.s.svm.fSupported)
    694         rc = SVMR0SetupVM(pVM);
    695 
    696     return rc;
     712    return HWACCMR0Globals.pfnSetupVM(pVM);
    697713}
    698714
     
    710726    RTCPUID  idCpu = RTMpCpuId();
    711727
     728    AssertReturn(HWACCMR0Globals.pfnEnterSession, VERR_INTERNAL_ERROR);
     729
    712730    rc = CPUMQueryGuestCtxPtr(pVM, &pCtx);
    713731    if (VBOX_FAILURE(rc))
     
    720738    pVM->hwaccm.s.fContextUseFlags |= HWACCM_CHANGED_GUEST_CR0 | HWACCM_CHANGED_HOST_CONTEXT;
    721739
    722     if (pVM->hwaccm.s.vmx.fSupported)
    723     {
    724         rc  = VMXR0Enter(pVM);
    725         AssertRC(rc);
    726         rc |= VMXR0SaveHostState(pVM);
    727         AssertRC(rc);
    728         rc |= VMXR0LoadGuestState(pVM, pCtx);
    729         AssertRC(rc);
    730         if (rc != VINF_SUCCESS)
    731             return rc;
    732     }
    733     else
    734     {
    735         Assert(pVM->hwaccm.s.svm.fSupported);
    736         rc  = SVMR0Enter(pVM, &HWACCMR0Globals.aCpuInfo[idCpu]);
    737         AssertRC(rc);
    738         rc |= SVMR0LoadGuestState(pVM, pCtx);
    739         AssertRC(rc);
    740         if (rc != VINF_SUCCESS)
    741             return rc;
    742 
    743     }
    744     return VINF_SUCCESS;
     740    rc  = HWACCMR0Globals.pfnEnterSession(pVM, &HWACCMR0Globals.aCpuInfo[idCpu]);
     741    AssertRC(rc);
     742    rc |= HWACCMR0Globals.pfnSaveHostState(pVM);
     743    AssertRC(rc);
     744    rc |= HWACCMR0Globals.pfnLoadGuestState(pVM, pCtx);
     745    AssertRC(rc);
     746    return rc;
    745747}
    746748
     
    776778    }
    777779
    778     if (pVM->hwaccm.s.vmx.fSupported)
    779     {
    780         return VMXR0Leave(pVM);
    781     }
    782     else
    783     {
    784         Assert(pVM->hwaccm.s.svm.fSupported);
    785         return SVMR0Leave(pVM);
    786     }
     780    return HWACCMR0Globals.pfnLeaveSession(pVM);
    787781}
    788782
     
    803797        return rc;
    804798
    805     if (pVM->hwaccm.s.vmx.fSupported)
    806     {
    807         return VMXR0RunGuestCode(pVM, pCtx, &HWACCMR0Globals.aCpuInfo[idCpu]);
    808     }
    809     else
    810     {
    811         Assert(pVM->hwaccm.s.svm.fSupported);
    812         return SVMR0RunGuestCode(pVM, pCtx, &HWACCMR0Globals.aCpuInfo[idCpu]);
    813     }
     799    return HWACCMR0Globals.pfnRunGuestCode(pVM, pCtx, &HWACCMR0Globals.aCpuInfo[idCpu]);
    814800}
    815801
     
    10211007}
    10221008#endif
     1009
     1010/* Dummy callback handlers. */
     1011HWACCMR0DECL(int) HWACCMR0DummyEnter(PVM pVM, PHWACCM_CPUINFO pCpu)
     1012{
     1013    return VERR_INTERNAL_ERROR;
     1014}
     1015
     1016HWACCMR0DECL(int) HWACCMR0DummyLeave(PVM pVM)
     1017{
     1018    return VERR_INTERNAL_ERROR;
     1019}
     1020
     1021HWACCMR0DECL(int) HWACCMR0DummyEnableCpu(PHWACCM_CPUINFO pCpu, PVM pVM, void *pvPageCpu, RTHCPHYS pPageCpuPhys)
     1022{
     1023    return VERR_INTERNAL_ERROR;
     1024}
     1025
     1026HWACCMR0DECL(int) HWACCMR0DummyDisableCpu(PHWACCM_CPUINFO pCpu, void *pvPageCpu, RTHCPHYS pPageCpuPhys)
     1027{
     1028    return VERR_INTERNAL_ERROR;
     1029}
     1030
     1031HWACCMR0DECL(int) HWACCMR0DummyInitVM(PVM pVM)
     1032{
     1033    return VERR_INTERNAL_ERROR;
     1034}
     1035
     1036HWACCMR0DECL(int) HWACCMR0DummyTermVM(PVM pVM)
     1037{
     1038    return VERR_INTERNAL_ERROR;
     1039}
     1040
     1041HWACCMR0DECL(int) HWACCMR0DummySetupVM(PVM pVM)
     1042{
     1043    return VERR_INTERNAL_ERROR;
     1044}
     1045
     1046HWACCMR0DECL(int) HWACCMR0DummyRunGuestCode(PVM pVM, CPUMCTX *pCtx, PHWACCM_CPUINFO pCpu)
     1047{
     1048    return VERR_INTERNAL_ERROR;
     1049}
     1050
     1051HWACCMR0DECL(int) HWACCMR0DummySaveHostState(PVM pVM)
     1052{
     1053    return VERR_INTERNAL_ERROR;
     1054}
     1055
     1056HWACCMR0DECL(int) HWACCMR0DummyLoadGuestState(PVM pVM, CPUMCTX *pCtx)
     1057{
     1058    return VERR_INTERNAL_ERROR;
     1059}
  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp

    r9385 r9407  
    499499}
    500500
     501/**
     502 * Save the host state
     503 *
     504 * @returns VBox status code.
     505 * @param   pVM         The VM to operate on.
     506 */
     507HWACCMR0DECL(int) SVMR0SaveHostState(PVM pVM)
     508{
     509    /* Nothing to do here. */
     510    return VINF_SUCCESS;
     511}
    501512
    502513/**
     
    742753    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x);
    743754
    744     AssertReturn(pCpu->fSVMConfigured, VERR_EM_INTERNAL_ERROR);
     755    AssertReturn(pCpu->fConfigured, VERR_EM_INTERNAL_ERROR);
    745756
    746757    pVMCB = (SVM_VMCB *)pVM->hwaccm.s.svm.pVMCB;
  • trunk/src/VBox/VMM/VMMR0/HWSVMR0.h

    r9008 r9407  
    119119
    120120/**
     121 * Save the host state
     122 *
     123 * @returns VBox status code.
     124 * @param   pVM         The VM to operate on.
     125 */
     126HWACCMR0DECL(int) SVMR0SaveHostState(PVM pVM);
     127
     128/**
    121129 * Loads the guest state
    122130 *
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp

    r9385 r9407  
    991991    Log2(("\nE"));
    992992
    993     AssertReturn(pCpu->fVMXConfigured, VERR_EM_INTERNAL_ERROR);
     993    AssertReturn(pCpu->fConfigured, VERR_EM_INTERNAL_ERROR);
    994994
    995995    STAM_PROFILE_ADV_START(&pVM->hwaccm.s.StatEntry, x);
     
    20582058 * @returns VBox status code.
    20592059 * @param   pVM         The VM to operate on.
     2060 * @param   pCpu        CPU info struct
    20602061 */
    2061 HWACCMR0DECL(int) VMXR0Enter(PVM pVM)
     2062HWACCMR0DECL(int) VMXR0Enter(PVM pVM, PHWACCM_CPUINFO pCpu)
    20622063{
    20632064    Assert(pVM->hwaccm.s.vmx.fSupported);
  • trunk/src/VBox/VMM/VMMR0/HWVMXR0.h

    r8876 r9407  
    4747 * @returns VBox status code.
    4848 * @param   pVM         The VM to operate on.
     49 * @param   pCpu        CPU info struct
    4950 */
    50 HWACCMR0DECL(int) VMXR0Enter(PVM pVM);
     51HWACCMR0DECL(int) VMXR0Enter(PVM pVMm, PHWACCM_CPUINFO pCpu);
    5152
    5253/**
Note: See TracChangeset for help on using the changeset viewer.

© 2025 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette