Changeset 94091 in vbox for trunk/src/VBox/Runtime/r3/darwin

Timestamp:

Mar 4, 2022 9:28:14 PM (3 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

150336

Message:

IPRT: Better RTMpGetDescription for darwin.arm (first M1 has two clusters of 4 cores with different energy characteristics and names). bugref:9898

File:

• trunk/src/VBox/Runtime/r3/darwin/RTMpGetDescription-generic.cpp (modified) (3 diffs)

trunk/src/VBox/Runtime/r3/darwin/RTMpGetDescription-generic.cpp

@@ -35 +35 @@
 
 #include <sys/sysctl.h>
+#if defined(RT_ARCH_ARM64)
+# include <IOKit/IOKitLib.h>
+#endif
 
 
@@ -48 +51 @@
 
     /*
+     * For ARM there are typically two different types of cores, so look up the
+     * processor in the IODeviceTree and get the core name and type from there
+     * if we can.
+     */
+    char   szExtra[256];
+    size_t cchExtra = 0;
+
+#if defined(RT_ARCH_ARM64)
+    char szArmCpuPath[64];
+    RTStrPrintf(szArmCpuPath, sizeof(szArmCpuPath), "IODeviceTree:/cpus/cpu%u", idCpu);
+    io_registry_entry_t hIoRegEntry = IORegistryEntryFromPath(kIOMasterPortDefault, szArmCpuPath);
+    if (hIoRegEntry != MACH_PORT_NULL)
+    {
+        /* This property is typically "E" or "P".  Don't know why it's mapped
+           to a CFDataRef rather than a CFStringRef... */
+        CFTypeRef hValRef = IORegistryEntryCreateCFProperty(hIoRegEntry, CFSTR("cluster-type"), kCFAllocatorDefault, kNilOptions);
+        if (hValRef)
+        {
+            if (CFGetTypeID(hValRef) == CFDataGetTypeID())
+            {
+                size_t const          cbData = CFDataGetLength((CFDataRef)hValRef);
+                uint8_t const * const pbData = (uint8_t const *)CFDataGetBytePtr((CFDataRef)hValRef);
+                if (cbData > 0 && pbData != NULL)
+                {
+                    int rc = RTStrValidateEncodingEx((const char *)pbData, cbData, RTSTR_VALIDATE_ENCODING_ZERO_TERMINATED);
+                    AssertMsgRC(rc, ("%p LB %#zx: %.*Rhxs\n", pbData, cbData, cbData, pbData));
+                    if (RT_SUCCESS(rc))
+                    {
+                        RTStrCopy(&szExtra[1], sizeof(szExtra) - 1, (const char *)pbData);
+                        szExtra[0] = ' ';
+                        cchExtra = strlen(szExtra);
+                    }
+                }
+            }
+            else
+                AssertMsgFailed(("%p=%#lx\n", hValRef, CFGetTypeID(hValRef)));
+
+            CFRelease(hValRef);
+        }
+
+        /* The compatible property is an "array" of zero terminated strings.
+           For the M1 mini the first entry is either "apple,firestorm" (P cores)
+           or "apple,icestorm" (E cores).  We extract the bits after the comma
+           and append it to the extra string. (Again, dunno why it's a CFDataRef.) */
+        hValRef = IORegistryEntryCreateCFProperty(hIoRegEntry, CFSTR("compatible"), kCFAllocatorDefault, 0);
+        if (hValRef)
+        {
+            if (CFGetTypeID(hValRef) == CFDataGetTypeID())
+            {
+                size_t const          cbData = CFDataGetLength((CFDataRef)hValRef);
+                uint8_t const * const pbData = (uint8_t const *)CFDataGetBytePtr((CFDataRef)hValRef);
+                if (cbData > 0 && pbData != NULL)
+                {
+                    Assert(pbData[cbData - 1] == '\0');
+                    if (pbData[cbData - 1] == '\0')
+                    {
+                        size_t offData = 0;
+                        while (offData < cbData)
+                        {
+                            const char  *psz = (const char *)&pbData[offData];
+                            size_t const cch = strlen(psz);
+
+                            if (RTStrStartsWith(psz, "apple,"))
+                            {
+                                psz += sizeof("apple,") - 1;
+                                psz = RTStrStripL(psz);
+                                if (*psz)
+                                {
+                                    if (RTStrIsValidEncoding(psz))
+                                        cchExtra += RTStrPrintf(&szExtra[cchExtra], sizeof(szExtra) - cchExtra, " (%s)", psz);
+                                    else
+                                        AssertFailed();
+                                }
+                            }
+
+                            /* advance */
+                            offData += cch + 1;
+                        }
+                    }
+                }
+            }
+            else
+                AssertMsgFailed(("%p=%#lx\n", hValRef, CFGetTypeID(hValRef)));
+            CFRelease(hValRef);
+        }
+
+        IOObjectRelease(hIoRegEntry);
+    }
+#endif
+    szExtra[cchExtra] = '\0';
+
+    /*
      * Just use the sysctl machdep.cpu.brand_string value for now.
      */
-    /** @todo on arm this is very boring and there are two different types of
-     *        cores in the system, "E" and "P" cores. The I/O registry can
-     *        be used to find out which @a idCpu is.  There are also codename
-     *        available there. */
     char szBrand[128] = {0};
     size_t cb = sizeof(szBrand);
@@ -61 +152 @@
 
     char *pszStripped = RTStrStrip(szBrand);
-    if (*pszStripped)
-        return RTStrCopy(pszBuf, cbBuf, pszStripped);
-    return RTStrCopy(pszBuf, cbBuf, "Unknown");
+    if (*pszStripped == '\0')
+        pszStripped = strcpy(szBrand, "Unknown");
+
+    rc = RTStrCopy(pszBuf, cbBuf, pszStripped);
+    if (cchExtra > 0 && RT_SUCCESS(rc))
+        rc = RTStrCat(pszBuf, cbBuf, szExtra);
+    return rc;
 }
 RT_EXPORT_SYMBOL(RTMpGetDescription);