Index: /trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm	(revision 94177)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm	(revision 94178)
@@ -1489,8 +1489,8 @@
 ; Makes ASSUMPTIONS about A0, A1, A2 and A3 assignments.
 ;
+; @note the _intel and _amd variants are implemented in C.
+;
 %macro IEMIMPL_SHIFT_DBL_OP 3
 BEGINCODE
-BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u16_intel, 16
-BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u16_amd, 16
 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u16, 16
         PROLOGUE_4_ARGS
@@ -1508,6 +1508,4 @@
 ENDPROC iemAImpl_ %+ %1 %+ _u16
 
-BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u32_intel, 16
-BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u32_amd, 16
 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u32, 16
         PROLOGUE_4_ARGS
@@ -1526,6 +1524,4 @@
 
  %ifdef RT_ARCH_AMD64
-BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u64_intel, 20
-BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u64_amd, 20
 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u64, 20
         PROLOGUE_4_ARGS
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp	(revision 94177)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp	(revision 94178)
@@ -2546,4 +2546,6 @@
 # endif
 
+#endif /* !defined(RT_ARCH_AMD64) || defined(IEM_WITHOUT_ASSEMBLY) */
+
 
 /*
@@ -2557,7 +2559,7 @@
  *  - ZF, SF and PF are calculated according to the result by both vendors.
  */
-#define EMIT_SHLD(a_cBitsWidth) \
-IEM_DECL_IMPL_DEF(void, iemAImpl_shld_u ## a_cBitsWidth,(uint ## a_cBitsWidth ## _t *puDst, \
-                                                         uint ## a_cBitsWidth ## _t uSrc, uint8_t cShift, uint32_t *pfEFlags)) \
+#define EMIT_SHLD(a_cBitsWidth, a_uType, a_Suffix, a_fIntelFlags) \
+IEM_DECL_IMPL_DEF(void, RT_CONCAT3(iemAImpl_shld_u,a_cBitsWidth,a_Suffix),(a_uType *puDst, a_uType uSrc, uint8_t cShift, \
+                                                                           uint32_t *pfEFlags)) \
 { \
     /** @todo this ain't right for 16-bit. Apparently it should use 0x1f instead \
@@ -2566,42 +2568,19 @@
     if (cShift) \
     { \
-        uint ## a_cBitsWidth ## _t const uDst    = *puDst; \
-        uint ## a_cBitsWidth ## _t       uResult = uDst << cShift; \
+        a_uType const uDst    = *puDst; \
+        a_uType       uResult = uDst << cShift; \
         uResult |= uSrc >> (a_cBitsWidth - cShift); \
         *puDst = uResult; \
         \
+        /* CALC EFLAGS: */ \
         uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS; \
-        AssertCompile(X86_EFL_CF_BIT == 0); \
-        fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth(uDst ^ (uDst << 1)); /* Set according to the first shift. */ \
-        fEfl |= (uDst >> (a_cBitsWidth - cShift)) & X86_EFL_CF; /* CF = last bit shifted out */ \
-        fEfl |= g_afParity[uResult & 0xff]; \
-        fEfl |= X86_EFL_CALC_SF(uResult, a_cBitsWidth); \
-        fEfl |= X86_EFL_CALC_ZF(uResult); \
-        *pfEFlags = fEfl; \
-    } \
-}\
-\
-IEM_DECL_IMPL_DEF(void, iemAImpl_shld_u ## a_cBitsWidth ## _intel,(uint ## a_cBitsWidth ## _t *puDst, \
-                                                                   uint ## a_cBitsWidth ## _t uSrc, uint8_t cShift, \
-                                                                   uint32_t *pfEFlags)) \
-{ \
-    iemAImpl_shld_u ## a_cBitsWidth(puDst, uSrc, cShift, pfEFlags); \
-} \
-\
-IEM_DECL_IMPL_DEF(void, iemAImpl_shld_u ## a_cBitsWidth ## _amd,(uint ## a_cBitsWidth ## _t *puDst, \
-                                                                 uint ## a_cBitsWidth ## _t uSrc, uint8_t cShift, \
-                                                                 uint32_t *pfEFlags)) \
-{ \
-    cShift &= a_cBitsWidth - 1; \
-    if (cShift) \
-    { \
-        uint ## a_cBitsWidth ## _t const uDst    = *puDst; \
-        uint ## a_cBitsWidth ## _t       uResult = uDst << cShift; \
-        uResult |= uSrc >> (a_cBitsWidth - cShift); \
-        *puDst = uResult; \
-        \
-        uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS; \
-        fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth((uDst << (cShift - 1)) ^ uResult); /* Set according to last shift. */ \
-        fEfl |= X86_EFL_AF; \
+        if (a_fIntelFlags) \
+            /* Intel 6700K & 10980XE: Set according to the first shift. AF always cleared. */ \
+            fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth(uDst ^ (uDst << 1));  \
+        else \
+        {   /* AMD 3990X: Set according to last shift. AF always set. */ \
+            fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth((uDst << (cShift - 1)) ^ uResult); \
+            fEfl |= X86_EFL_AF; \
+        } \
         AssertCompile(X86_EFL_CF_BIT == 0); \
         fEfl |= (uDst >> (a_cBitsWidth - cShift)) & X86_EFL_CF; /* CF = last bit shifted out */ \
@@ -2612,10 +2591,19 @@
     } \
 }
-
-EMIT_SHLD(64)
-# if !defined(RT_ARCH_X86) || defined(IEM_WITHOUT_ASSEMBLY)
-EMIT_SHLD(32)
-EMIT_SHLD(16)
-# endif
+#if !defined(RT_ARCH_AMD64) || defined(IEM_WITHOUT_ASSEMBLY)
+EMIT_SHLD(64, uint64_t, RT_NOTHING, 1)
+#endif /* !defined(RT_ARCH_AMD64) || defined(IEM_WITHOUT_ASSEMBLY) */
+EMIT_SHLD(64, uint64_t, _intel,     1)
+EMIT_SHLD(64, uint64_t, _amd,       0)
+#if (!defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)) || defined(IEM_WITHOUT_ASSEMBLY)
+EMIT_SHLD(32, uint32_t, RT_NOTHING, 1)
+#endif
+EMIT_SHLD(32, uint32_t, _intel,     1)
+EMIT_SHLD(32, uint32_t, _amd,       0)
+#if (!defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)) || defined(IEM_WITHOUT_ASSEMBLY)
+EMIT_SHLD(16, uint16_t, RT_NOTHING, 1)
+#endif
+EMIT_SHLD(16, uint16_t, _intel,     1)
+EMIT_SHLD(16, uint16_t, _amd,       0)
 
 
@@ -2631,7 +2619,6 @@
  *  - ZF, SF and PF are calculated according to the result by both vendors.
  */
-#define EMIT_SHRD(a_cBitsWidth) \
-IEM_DECL_IMPL_DEF(void, iemAImpl_shrd_u ## a_cBitsWidth,(uint ## a_cBitsWidth ## _t *puDst, \
-                                                         uint ## a_cBitsWidth ## _t uSrc, uint8_t cShift, uint32_t *pfEFlags)) \
+#define EMIT_SHRD(a_cBitsWidth, a_uType, a_Suffix, a_fIntelFlags) \
+IEM_DECL_IMPL_DEF(void, RT_CONCAT3(iemAImpl_shrd_u,a_cBitsWidth,a_Suffix),(a_uType *puDst, a_uType uSrc, uint8_t cShift, uint32_t *pfEFlags)) \
 { \
     /** @todo this is wrong for 16-bit, where it should be 0x1f not 0xf and \
@@ -2640,11 +2627,21 @@
     if (cShift) \
     { \
-        uint ## a_cBitsWidth ## _t const uDst    = *puDst; \
-        uint ## a_cBitsWidth ## _t       uResult = uDst >> cShift; \
+        a_uType const uDst    = *puDst; \
+        a_uType       uResult = uDst >> cShift; \
         uResult |= uSrc << (a_cBitsWidth - cShift); \
         *puDst = uResult; \
         \
         uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS; \
-        fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth(uDst ^ (uSrc << (a_cBitsWidth - 1))); \
+        if (a_fIntelFlags) \
+            /* Intel 6700K & 10980XE: Set according to the first shift. AF always cleared. */ \
+            fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth(uDst ^ (uSrc << (a_cBitsWidth - 1))); \
+        else \
+        {   /* AMD 3990X: Set according to last shift. AF always set. */ \
+            if (cShift > 1) /* Set according to last shift. */ \
+                fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth((uSrc << (a_cBitsWidth - cShift + 1)) ^ uResult); \
+            else \
+                fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth(uDst ^ uResult); \
+            fEfl |= X86_EFL_AF; \
+        } \
         AssertCompile(X86_EFL_CF_BIT == 0); \
         fEfl |= (uDst >> (cShift - 1)) & X86_EFL_CF; \
@@ -2654,45 +2651,23 @@
         *pfEFlags = fEfl; \
     } \
-} \
-\
-IEM_DECL_IMPL_DEF(void, iemAImpl_shrd_u ## a_cBitsWidth ## _intel,(uint ## a_cBitsWidth ## _t *puDst, \
-                                                                   uint ## a_cBitsWidth ## _t uSrc, uint8_t cShift, \
-                                                                   uint32_t *pfEFlags)) \
-{ \
-    iemAImpl_shrd_u ## a_cBitsWidth(puDst, uSrc, cShift, pfEFlags); \
-} \
-\
-IEM_DECL_IMPL_DEF(void, iemAImpl_shrd_u ## a_cBitsWidth ## _amd,(uint ## a_cBitsWidth ## _t *puDst, \
-                                                                 uint ## a_cBitsWidth ## _t uSrc, uint8_t cShift, \
-                                                                 uint32_t *pfEFlags)) \
-{ \
-    cShift &= a_cBitsWidth - 1; \
-    if (cShift) \
-    { \
-        uint ## a_cBitsWidth ## _t const uDst    = *puDst; \
-        uint ## a_cBitsWidth ## _t       uResult = uDst >> cShift; \
-        uResult |= uSrc << (a_cBitsWidth - cShift); \
-        *puDst = uResult; \
-        \
-        uint32_t fEfl = *pfEFlags & ~X86_EFL_STATUS_BITS; \
-        if (cShift > 1) /* Set according to last shift. */ \
-            fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth((uSrc << (a_cBitsWidth - cShift + 1)) ^ uResult); \
-        else \
-            fEfl |= X86_EFL_GET_OF_ ## a_cBitsWidth(uDst ^ uResult); \
-        fEfl |= X86_EFL_AF; \
-        AssertCompile(X86_EFL_CF_BIT == 0); \
-        fEfl |= (uDst >> (cShift - 1)) & X86_EFL_CF; \
-        fEfl |= X86_EFL_CALC_SF(uResult, a_cBitsWidth); \
-        fEfl |= X86_EFL_CALC_ZF(uResult); \
-        fEfl |= g_afParity[uResult & 0xff]; \
-        *pfEFlags = fEfl; \
-    } \
-}
-EMIT_SHRD(64)
-# if !defined(RT_ARCH_X86) || defined(IEM_WITHOUT_ASSEMBLY)
-EMIT_SHRD(32)
-EMIT_SHRD(16)
-# endif
-
+}
+#if !defined(RT_ARCH_AMD64) || defined(IEM_WITHOUT_ASSEMBLY)
+EMIT_SHRD(64, uint64_t, RT_NOTHING, 1)
+#endif /* !defined(RT_ARCH_AMD64) || defined(IEM_WITHOUT_ASSEMBLY) */
+EMIT_SHRD(64, uint64_t, _intel,     1)
+EMIT_SHRD(64, uint64_t, _amd,       0)
+#if (!defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)) || defined(IEM_WITHOUT_ASSEMBLY)
+EMIT_SHRD(32, uint32_t, RT_NOTHING, 1)
+#endif
+EMIT_SHRD(32, uint32_t, _intel,     1)
+EMIT_SHRD(32, uint32_t, _amd,       0)
+#if (!defined(RT_ARCH_X86) && !defined(RT_ARCH_AMD64)) || defined(IEM_WITHOUT_ASSEMBLY)
+EMIT_SHRD(16, uint16_t, RT_NOTHING, 1)
+#endif
+EMIT_SHRD(16, uint16_t, _intel,     1)
+EMIT_SHRD(16, uint16_t, _amd,       0)
+
+
+#if !defined(RT_ARCH_AMD64) || defined(IEM_WITHOUT_ASSEMBLY)
 
 # if !defined(RT_ARCH_X86) || defined(IEM_WITHOUT_ASSEMBLY)
