Changeset 94383 in vbox
- Timestamp:
- Mar 28, 2022 2:52:44 PM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 150692
- Location:
- trunk
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/iprt/x86.h
r94337 r94383 2978 2978 #define X86_INVPCID_TYPE_MAX_VALID X86_INVPCID_TYPE_ALL_CONTEXT_EXCL_GLOBAL 2979 2979 2980 2981 /** @name Special FPU integer values. 2982 * @{ */ 2983 #define X86_FPU_INT64_INDEFINITE INT64_MIN 2984 #define X86_FPU_INT32_INDEFINITE INT32_MIN 2985 #define X86_FPU_INT16_INDEFINITE INT16_MIN 2986 /** @} */ 2987 2980 2988 /** 2981 2989 * 32-bit protected mode FSTENV image. -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r94364 r94383 3161 3161 IEM_DECL_IMPL_DEF(void, iemAImpl_fldz,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes)) 3162 3162 { 3163 pFpuRes->r80Result.sj64.fSign = 0; 3164 pFpuRes->r80Result.sj64.uExponent = 0; 3165 pFpuRes->r80Result.sj64.fInteger = 0; 3166 pFpuRes->r80Result.sj64.uFraction = 0; 3163 pFpuRes->r80Result.s.fSign = 0; 3164 pFpuRes->r80Result.s.uExponent = 0; 3165 pFpuRes->r80Result.s.uMantissa = 0; 3167 3166 pFpuRes->FSW = (7 << X86_FSW_TOP_SHIFT) | (pFpuState->FSW & (X86_FSW_C0 | X86_FSW_C2 | X86_FSW_C3)); /* see iemAImpl_fld1 */ 3168 3167 } 3169 3168 3169 #define EMIT_FILD(a_cBits) \ 3170 IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i ## a_cBits,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, \ 3171 int ## a_cBits ## _t const *piVal)) \ 3172 { \ 3173 int ## a_cBits ## _t iVal = *piVal; \ 3174 if (iVal == 0) \ 3175 { \ 3176 pFpuRes->r80Result.s.fSign = 0; \ 3177 pFpuRes->r80Result.s.uExponent = 0; \ 3178 pFpuRes->r80Result.s.uMantissa = 0; \ 3179 } \ 3180 else \ 3181 { \ 3182 if (iVal > 0) \ 3183 pFpuRes->r80Result.s.fSign = 0; \ 3184 else \ 3185 { \ 3186 pFpuRes->r80Result.s.fSign = 1; \ 3187 iVal = -iVal; \ 3188 } \ 3189 unsigned const cBits = ASMBitLastSetU ## a_cBits((uint ## a_cBits ## _t)iVal); \ 3190 pFpuRes->r80Result.s.uExponent = cBits - 1 + RTFLOAT80U_EXP_BIAS; \ 3191 pFpuRes->r80Result.s.uMantissa = (uint64_t)iVal << (RTFLOAT80U_FRACTION_BITS + 1 - cBits); \ 3192 } \ 3193 pFpuRes->FSW = (7 << X86_FSW_TOP_SHIFT) | (pFpuState->FSW & (X86_FSW_C0 | X86_FSW_C2 | X86_FSW_C3)); /* see iemAImpl_fld1 */ \ 3194 } 3195 EMIT_FILD(16) 3196 EMIT_FILD(32) 3197 EMIT_FILD(64) 3198 3170 3199 3171 3200 IEM_DECL_IMPL_DEF(void, iemAImpl_fld_r80_from_d80,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, PCRTPBCD80U pd80Val)) 3172 3201 { 3173 RT_NOREF(pFpuState, pFpuRes, pd80Val); 3174 AssertReleaseFailed(); 3175 } 3176 3177 3178 IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i16,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int16_t const *pi16Val)) 3179 { 3180 RT_NOREF(pFpuState, pFpuRes, pi16Val); 3181 AssertReleaseFailed(); 3182 } 3183 3184 3185 IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i32,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int32_t const *pi32Val)) 3186 { 3187 RT_NOREF(pFpuState, pFpuRes, pi32Val); 3188 AssertReleaseFailed(); 3189 } 3190 3191 3192 IEM_DECL_IMPL_DEF(void, iemAImpl_fild_r80_from_i64,(PCX86FXSTATE pFpuState, PIEMFPURESULT pFpuRes, int64_t const *pi64Val)) 3193 { 3194 RT_NOREF(pFpuState, pFpuRes, pi64Val); 3195 AssertReleaseFailed(); 3202 pFpuRes->FSW = (7 << X86_FSW_TOP_SHIFT) | (pFpuState->FSW & (X86_FSW_C0 | X86_FSW_C2 | X86_FSW_C3)); /* see iemAImpl_fld1 */ 3203 if ( pd80Val->s.abPairs[0] == 0 3204 && pd80Val->s.abPairs[1] == 0 3205 && pd80Val->s.abPairs[2] == 0 3206 && pd80Val->s.abPairs[3] == 0 3207 && pd80Val->s.abPairs[4] == 0 3208 && pd80Val->s.abPairs[5] == 0 3209 && pd80Val->s.abPairs[6] == 0 3210 && pd80Val->s.abPairs[7] == 0 3211 && pd80Val->s.abPairs[8] == 0) 3212 { 3213 pFpuRes->r80Result.s.fSign = pd80Val->s.fSign; 3214 pFpuRes->r80Result.s.uExponent = 0; 3215 pFpuRes->r80Result.s.uMantissa = 0; 3216 } 3217 else 3218 { 3219 pFpuRes->r80Result.s.fSign = pd80Val->s.fSign; 3220 3221 size_t cPairs = RT_ELEMENTS(pd80Val->s.abPairs); 3222 while (cPairs > 0 && pd80Val->s.abPairs[cPairs - 1] == 0) 3223 cPairs--; 3224 3225 uint64_t uVal = 0; 3226 uint64_t uFactor = 1; 3227 for (size_t iPair = 0; iPair < cPairs; iPair++, uFactor *= 100) 3228 uVal += RTPBCD80U_LO_DIGIT(pd80Val->s.abPairs[iPair]) * uFactor 3229 + RTPBCD80U_HI_DIGIT(pd80Val->s.abPairs[iPair]) * uFactor * 10; 3230 3231 unsigned const cBits = ASMBitLastSetU64(uVal); 3232 pFpuRes->r80Result.s.uExponent = cBits - 1 + RTFLOAT80U_EXP_BIAS; 3233 pFpuRes->r80Result.s.uMantissa = uVal << (RTFLOAT80U_FRACTION_BITS + 1 - cBits); 3234 } 3196 3235 } 3197 3236 … … 3221 3260 uint16_t fFcw, uint16_t fFsw, PRTFLOAT32U pr32Dst) 3222 3261 { 3223 uint64_t const fRound edOffMask = RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT32U_FRACTION_BITS) - 1; /* 0x7ff */3224 uint64_t const uRoundingAdd = (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST3225 ? RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT32U_FRACTION_BITS - 1) /* 0x400 */3226 : (fFcw & X86_FCW_RC_MASK) == (fSignIn ? X86_FCW_RC_DOWN : X86_FCW_RC_UP)3227 ? fRoundedOffMask3228 : 0;3229 uint64_t fRoundedOff = uMantissaIn & fRoundedOffMask;3262 uint64_t const fRoundingOffMask = RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT32U_FRACTION_BITS) - 1; /* 0x7ff */ 3263 uint64_t const uRoundingAdd = (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST 3264 ? RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT32U_FRACTION_BITS - 1) /* 0x400 */ 3265 : (fFcw & X86_FCW_RC_MASK) == (fSignIn ? X86_FCW_RC_DOWN : X86_FCW_RC_UP) 3266 ? fRoundingOffMask 3267 : 0; 3268 uint64_t fRoundedOff = uMantissaIn & fRoundingOffMask; 3230 3269 3231 3270 /* … … 3253 3292 ? uMantissaIn != 0 3254 3293 : (uMantissaIn >> (-iExponentOut + 1)) | ((uMantissaIn & (RT_BIT_64(-iExponentOut + 1) - 1)) != 0); 3255 fRoundedOff = uMantissaIn & fRound edOffMask;3294 fRoundedOff = uMantissaIn & fRoundingOffMask; 3256 3295 if (fRoundedOff && fIsTiny) 3257 3296 fFsw |= X86_FSW_UE; … … 3304 3343 iExponentOut++; 3305 3344 Assert(iExponentOut < RTFLOAT32U_EXP_MAX); /* checked above */ 3345 fFsw |= X86_FSW_C1; 3306 3346 } 3307 3347 /** @todo not sure if this is applied correctly, with the above carry check. */ … … 3441 3481 uint16_t fFcw, uint16_t fFsw, PRTFLOAT64U pr64Dst) 3442 3482 { 3443 uint64_t const fRound edOffMask = RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT64U_FRACTION_BITS) - 1; /* 0x7ff */3444 uint32_t const uRoundingAdd = (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST3445 ? RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT64U_FRACTION_BITS - 1) /* 0x400 */3446 : (fFcw & X86_FCW_RC_MASK) == (fSignIn ? X86_FCW_RC_DOWN : X86_FCW_RC_UP)3447 ? fRoundedOffMask3448 : 0;3449 uint32_t fRoundedOff = uMantissaIn & fRoundedOffMask;3483 uint64_t const fRoundingOffMask = RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT64U_FRACTION_BITS) - 1; /* 0x7ff */ 3484 uint32_t const uRoundingAdd = (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST 3485 ? RT_BIT_64(RTFLOAT80U_FRACTION_BITS - RTFLOAT64U_FRACTION_BITS - 1) /* 0x400 */ 3486 : (fFcw & X86_FCW_RC_MASK) == (fSignIn ? X86_FCW_RC_DOWN : X86_FCW_RC_UP) 3487 ? fRoundingOffMask 3488 : 0; 3489 uint32_t fRoundedOff = uMantissaIn & fRoundingOffMask; 3450 3490 3451 3491 /* … … 3473 3513 ? uMantissaIn != 0 3474 3514 : (uMantissaIn >> (-iExponentOut + 1)) | ((uMantissaIn & (RT_BIT_64(-iExponentOut + 1) - 1)) != 0); 3475 fRoundedOff = uMantissaIn & fRound edOffMask;3515 fRoundedOff = uMantissaIn & fRoundingOffMask; 3476 3516 if (fRoundedOff && fIsTiny) 3477 3517 fFsw |= X86_FSW_UE; … … 3524 3564 iExponentOut++; 3525 3565 Assert(iExponentOut < RTFLOAT64U_EXP_MAX); /* checked above */ 3566 fFsw |= X86_FSW_C1; 3526 3567 } 3527 3568 /** @todo not sure if this is applied correctly, with the above carry check. */ … … 3655 3696 3656 3697 3698 /* 3699 * 3700 * Mantissa: 3701 * 1[.]111 0000 1111 0000 1111 0000 1111 0000 1111 0000 1111 0000 1111 0000 1111 0000 3702 * ^ ^ ^ ^ ^ ^ ^ ^ ^ 3703 * 63 56 48 40 32 24 16 8 0 3704 * 3705 * int64_t has the same width, only bit 63 is the sign bit. So, the max we can map over 3706 * are bits 1 thru 63, dropping off bit 0, with an exponent of 62. The number of bits we 3707 * drop off from the mantissa increases with decreasing exponent, till an exponent of 0 3708 * where we'll drop off all but bit 63. 3709 */ 3710 #define EMIT_FIST(a_cBits, a_iType, a_iTypeMin, a_iTypeMax, a_iTypeIndefinite) \ 3711 IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i ## a_cBits,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW, \ 3712 a_iType *piDst, PCRTFLOAT80U pr80Val)) \ 3713 { \ 3714 uint16_t const fFcw = pFpuState->FCW; \ 3715 uint16_t fFsw = (pFpuState->FSW & (X86_FSW_C0 | X86_FSW_C2 | X86_FSW_C3)); \ 3716 bool const fSignIn = pr80Val->s.fSign; \ 3717 \ 3718 /* \ 3719 * Deal with normal numbers first. \ 3720 */ \ 3721 if (RTFLOAT80U_IS_NORMAL(pr80Val)) \ 3722 { \ 3723 uint64_t uMantissa = pr80Val->s.uMantissa; \ 3724 int32_t iExponent = (int32_t)pr80Val->s.uExponent - RTFLOAT80U_EXP_BIAS; \ 3725 \ 3726 if ((uint32_t)iExponent <= a_cBits - 2) \ 3727 { \ 3728 unsigned const cShiftOff = a_cBits - 1 - iExponent; \ 3729 uint64_t const fRoundingOffMask = RT_BIT_64(cShiftOff) - 1; \ 3730 uint64_t const uRoundingAdd = (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST \ 3731 ? RT_BIT_64(cShiftOff - 1) \ 3732 : (fFcw & X86_FCW_RC_MASK) == (fSignIn ? X86_FCW_RC_DOWN : X86_FCW_RC_UP) \ 3733 ? fRoundingOffMask \ 3734 : 0; \ 3735 uint64_t fRoundedOff = uMantissa & fRoundingOffMask; \ 3736 \ 3737 uMantissa >>= cShiftOff; \ 3738 uint64_t const uRounding = (fRoundedOff + uRoundingAdd) >> cShiftOff; \ 3739 uMantissa += uRounding; \ 3740 if (!(uMantissa & RT_BIT_64(a_cBits - 1))) \ 3741 { \ 3742 if (fRoundedOff) \ 3743 { \ 3744 if ((uMantissa & 1) && iExponent == a_cBits - 2 && ((fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST)) \ 3745 uMantissa &= ~(uint64_t)1; \ 3746 else if (uRounding) \ 3747 fFsw |= X86_FSW_C1; \ 3748 fFsw |= X86_FSW_PE; \ 3749 if (!(fFcw & X86_FCW_PM)) \ 3750 fFsw |= X86_FSW_ES | X86_FSW_B; \ 3751 } \ 3752 \ 3753 if (!fSignIn) \ 3754 *piDst = (a_iType)uMantissa; \ 3755 else \ 3756 *piDst = -(a_iType)uMantissa; \ 3757 } \ 3758 else \ 3759 { \ 3760 Assert(iExponent == a_cBits - 2); \ 3761 /* Special case for the integer minimum value. */ \ 3762 if (fSignIn && uMantissa == RT_BIT_64(a_cBits - 1)) \ 3763 { \ 3764 *piDst = a_iTypeMin; \ 3765 fFsw |= X86_FSW_PE | X86_FSW_C1; \ 3766 if (!(fFcw & X86_FCW_PM)) \ 3767 fFsw |= X86_FSW_ES | X86_FSW_B; \ 3768 } \ 3769 else \ 3770 { \ 3771 /* overflowed after rounding. */ \ 3772 fFsw |= X86_FSW_IE; \ 3773 if (fFcw & X86_FCW_IM) \ 3774 { \ 3775 if ( (fSignIn && (fFcw & X86_FCW_RC_MASK) != X86_FCW_RC_DOWN) \ 3776 || (!fSignIn && uMantissa == RT_BIT_64(a_cBits - 1)) ) \ 3777 *piDst = a_iTypeMin; \ 3778 else if (!fSignIn && (fFcw & X86_FCW_RC_MASK) != X86_FCW_RC_UP) \ 3779 *piDst = a_iTypeMax; \ 3780 else \ 3781 { \ 3782 *piDst = 0; \ 3783 fFsw |= X86_FSW_C1; \ 3784 } \ 3785 } \ 3786 else \ 3787 fFsw |= X86_FSW_ES | X86_FSW_B | (7 << X86_FSW_TOP_SHIFT); \ 3788 } \ 3789 } \ 3790 } \ 3791 /* \ 3792 * Tiny sub-zero numbers. \ 3793 */ \ 3794 else if (iExponent < 0) \ 3795 { \ 3796 if (!fSignIn) \ 3797 { \ 3798 if ( (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_UP \ 3799 || (iExponent == -1 && (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST)) \ 3800 { \ 3801 *piDst = 1; \ 3802 fFsw |= X86_FSW_C1; \ 3803 } \ 3804 else \ 3805 *piDst = 0; \ 3806 } \ 3807 else \ 3808 { \ 3809 if ( (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_UP \ 3810 || (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_ZERO \ 3811 || (iExponent < -1 && (fFcw & X86_FCW_RC_MASK) == X86_FCW_RC_NEAREST)) \ 3812 *piDst = 0; \ 3813 else \ 3814 { \ 3815 *piDst = -1; \ 3816 fFsw |= X86_FSW_C1; \ 3817 } \ 3818 } \ 3819 fFsw |= X86_FSW_PE; \ 3820 if (!(fFcw & X86_FCW_PM)) \ 3821 fFsw |= X86_FSW_ES | X86_FSW_B; \ 3822 } \ 3823 /* \ 3824 * Too large/small number outside the target integer range. \ 3825 */ \ 3826 else \ 3827 { \ 3828 fFsw |= X86_FSW_IE; \ 3829 if (fFcw & X86_FCW_IM) \ 3830 *piDst = a_iTypeIndefinite; \ 3831 else \ 3832 fFsw |= X86_FSW_ES | X86_FSW_B | (7 << X86_FSW_TOP_SHIFT); \ 3833 } \ 3834 } \ 3835 /* \ 3836 * Map both +0 and -0 to integer zero (signless/+). \ 3837 */ \ 3838 else if (RTFLOAT80U_IS_ZERO(pr80Val)) \ 3839 *piDst = 0; \ 3840 /* \ 3841 * Denormals are just really tiny sub-zero numbers that are either rounded \ 3842 * to zero, 1 or -1 depending on sign and rounding control. \ 3843 */ \ 3844 else if (RTFLOAT80U_IS_PSEUDO_DENORMAL(pr80Val) || RTFLOAT80U_IS_DENORMAL(pr80Val)) \ 3845 { \ 3846 /* Really small numbers that are either rounded to zero, 1 or -1 \ 3847 depending on sign and rounding control. */ \ 3848 if ((fFcw & X86_FCW_RC_MASK) != (fSignIn ? X86_FCW_RC_DOWN : X86_FCW_RC_UP)) \ 3849 *piDst = 0; \ 3850 else \ 3851 { \ 3852 *piDst = fSignIn ? -1 : 1; \ 3853 fFsw |= X86_FSW_C1; \ 3854 } \ 3855 fFsw |= X86_FSW_PE; \ 3856 if (!(fFcw & X86_FCW_PM)) \ 3857 fFsw |= X86_FSW_ES | X86_FSW_B; \ 3858 } \ 3859 /* \ 3860 * All other special values are considered invalid arguments and result \ 3861 * in an IE exception and indefinite value if masked. \ 3862 */ \ 3863 else \ 3864 { \ 3865 fFsw |= X86_FSW_IE; \ 3866 if (fFcw & X86_FCW_IM) \ 3867 *piDst = a_iTypeIndefinite; \ 3868 else \ 3869 fFsw |= X86_FSW_ES | X86_FSW_B | (7 << X86_FSW_TOP_SHIFT); \ 3870 } \ 3871 *pu16FSW = fFsw; \ 3872 } 3873 EMIT_FIST(64, int64_t, INT64_MIN, INT64_MAX, X86_FPU_INT64_INDEFINITE) 3874 EMIT_FIST(32, int32_t, INT32_MIN, INT32_MAX, X86_FPU_INT32_INDEFINITE) 3875 EMIT_FIST(16, int16_t, INT16_MIN, INT16_MAX, X86_FPU_INT16_INDEFINITE) 3876 3877 3878 IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW, 3879 int16_t *pi16Val, PCRTFLOAT80U pr80Val)) 3880 { 3881 RT_NOREF(pFpuState, pu16FSW, pi16Val, pr80Val); 3882 AssertReleaseFailed(); 3883 } 3884 3885 IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW, 3886 int32_t *pi32Val, PCRTFLOAT80U pr80Val)) 3887 { 3888 RT_NOREF(pFpuState, pu16FSW, pi32Val, pr80Val); 3889 AssertReleaseFailed(); 3890 } 3891 3892 3893 IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW, 3894 int64_t *pi64Val, PCRTFLOAT80U pr80Val)) 3895 { 3896 RT_NOREF(pFpuState, pu16FSW, pi64Val, pr80Val); 3897 AssertReleaseFailed(); 3898 } 3899 3900 3657 3901 IEM_DECL_IMPL_DEF(void, iemAImpl_fst_r80_to_d80,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW, 3658 3902 PRTPBCD80U pd80Dst, PCRTFLOAT80U pr80Src)) 3659 3903 { 3660 3904 RT_NOREF(pFpuState, pu16FSW, pd80Dst, pr80Src); 3661 AssertReleaseFailed();3662 }3663 3664 3665 IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,3666 int16_t *pi16Val, PCRTFLOAT80U pr80Val))3667 {3668 RT_NOREF(pFpuState, pu16FSW, pi16Val, pr80Val);3669 AssertReleaseFailed();3670 }3671 3672 3673 IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,3674 int32_t *pi32Val, PCRTFLOAT80U pr80Val))3675 {3676 RT_NOREF(pFpuState, pu16FSW, pi32Val, pr80Val);3677 AssertReleaseFailed();3678 }3679 3680 3681 IEM_DECL_IMPL_DEF(void, iemAImpl_fist_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,3682 int64_t *pi64Val, PCRTFLOAT80U pr80Val))3683 {3684 RT_NOREF(pFpuState, pu16FSW, pi64Val, pr80Val);3685 AssertReleaseFailed();3686 }3687 3688 3689 IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i16,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,3690 int16_t *pi16Val, PCRTFLOAT80U pr80Val))3691 {3692 RT_NOREF(pFpuState, pu16FSW, pi16Val, pr80Val);3693 AssertReleaseFailed();3694 }3695 3696 3697 IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i32,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,3698 int32_t *pi32Val, PCRTFLOAT80U pr80Val))3699 {3700 RT_NOREF(pFpuState, pu16FSW, pi32Val, pr80Val);3701 AssertReleaseFailed();3702 }3703 3704 3705 IEM_DECL_IMPL_DEF(void, iemAImpl_fistt_r80_to_i64,(PCX86FXSTATE pFpuState, uint16_t *pu16FSW,3706 int64_t *pi64Val, PCRTFLOAT80U pr80Val))3707 {3708 RT_NOREF(pFpuState, pu16FSW, pi64Val, pr80Val);3709 3905 AssertReleaseFailed(); 3710 3906 }
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