Changeset 94677 in vbox

Timestamp:

Apr 21, 2022 11:51:12 PM (3 years ago)

Author:

vboxsync

Message:

lib/softfloat: Fixed one case of setting the C1 flag during rounding and amended the bias-adjust code to correctly handle the large exponents FSCALE can produce. bugref:9898

File:

• trunk/src/libs/softfloat-3e/source/s_roundPackToExtF80.c (modified) (4 diffs)

trunk/src/libs/softfloat-3e/source/s_roundPackToExtF80.c

@@ -217 +217 @@
             }
             if ( doIncrement ) {
-                softfloat_exceptionFlags |= softfloat_flag_c1;                                          /* VBox: C1 */
-                //RTAssertMsg2("softfloat_roundPackToExtF80: C1 #5\n");                                 /* VBox: C1 */
+                uint64_t const uOldSig = sig;                                                           /* VBox: C1 */
                 ++sig;
                 sig &=
@@ -224 +223 @@
                          (! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
                               & roundNearEven);
+                if (sig > uOldSig) {                                                                    /* VBox: C1 */
+                    softfloat_exceptionFlags |= softfloat_flag_c1;                                      /* VBox: C1 */
+                    //RTAssertMsg2("softfloat_roundPackToExtF80: C1 #5\n");                             /* VBox: C1 */
+                }                                                                                       /* VBox: C1 */
                 exp = ((sig & UINT64_C( 0x8000000000000000 )) != 0);
             }
@@ -296 +299 @@
 }
 
+/** 
+ * VBox: Wrapper for implementing underflow and overflow bias adjustment.
+ */
 extFloat80_t
  softfloat_roundPackToExtF80(
@@ -306 +312 @@
  )
 {
+    static union extF80M_extF80 const s_aExtF80Zero[2]     =
+    {
+        EXTF80M_EXTF80_INIT3_C( 0, 0, 0 ), EXTF80M_EXTF80_INIT3_C( 1, 0, 0 ),
+    };
+    static union extF80M_extF80 const s_aExtF80Infinity[2] =
+    {
+        EXTF80M_EXTF80_INIT3( 0, RT_BIT_64( 63 ), RTFLOAT80U_EXP_MAX ),
+        EXTF80M_EXTF80_INIT3( 1, RT_BIT_64( 63 ), RTFLOAT80U_EXP_MAX ),
+    };
+
     uint8_t const exceptionFlagsSaved = softfloat_exceptionFlags;
     softfloat_exceptionFlags = 0;
-    extFloat80_t r80Result = softfloat_roundPackToExtF80Inner(sign, exp, sig, sigExtra, roundingPrecision, pState);
+    extFloat80_t r80Result = softfloat_roundPackToExtF80Inner( sign, exp, sig, sigExtra, roundingPrecision, pState );
 
     if ( !(softfloat_exceptionFlags & ~pState->exceptionMask & (softfloat_flag_underflow | softfloat_flag_overflow)) ) {
         /* likely */
+    }
+    /* On Intel 10980XE the FSCALE instruction can cause really large exponents
+       and the rounding changes when we exceed the bias adjust. */
+    else if (exp >= RTFLOAT80U_EXP_BIAS_ADJUST + RTFLOAT80U_EXP_MAX) {
+        Assert( softfloat_exceptionFlags & softfloat_flag_overflow );
+        softfloat_exceptionFlags |= softfloat_flag_inexact | softfloat_flag_c1;
+        r80Result = s_aExtF80Infinity[sign].f;
+    } else if (exp <= -RTFLOAT80U_EXP_BIAS_ADJUST) {
+        Assert( softfloat_exceptionFlags & softfloat_flag_underflow );
+        softfloat_exceptionFlags &= ~softfloat_flag_c1;
+        softfloat_exceptionFlags |= softfloat_flag_inexact;
+        r80Result = s_aExtF80Zero[sign].f;
     } else {
+        /* Redo the conversion with the bias applied.  */
         softfloat_exceptionFlags &= softfloat_flag_underflow | softfloat_flag_overflow;
         if ( softfloat_exceptionFlags & softfloat_flag_underflow ) {
-            exp = (exp + RTFLOAT80U_EXP_BIAS_ADJUST) & RTFLOAT80U_EXP_MAX;
+            exp += RTFLOAT80U_EXP_BIAS_ADJUST;
+            Assert( exp > 0 );
         } else {
-            exp = (exp - RTFLOAT80U_EXP_BIAS_ADJUST) & RTFLOAT80U_EXP_MAX;
-        }
-        r80Result = softfloat_roundPackToExtF80Inner(sign, exp, sig, sigExtra, roundingPrecision, pState);
+            exp -= RTFLOAT80U_EXP_BIAS_ADJUST;
+            Assert( exp < RTFLOAT80U_EXP_MAX );
+        }
+        r80Result = softfloat_roundPackToExtF80Inner( sign, exp, sig, sigExtra, roundingPrecision, pState );
     }