Changeset 95023 in vbox for trunk/src/VBox/Devices/Graphics

Timestamp:

May 16, 2022 3:17:36 PM (3 years ago)

Author:

vboxsync

Message:

Devices/Graphics: shaders; render targets; removed a wrong ClearState call: bugref:9830

Location:

trunk/src/VBox/Devices/Graphics

Files:

• DevVGA-SVGA3d-dx-shader.cpp (modified) (5 diffs)
• DevVGA-SVGA3d-dx.cpp (modified) (1 diff)
• DevVGA-SVGA3d-win-dx.cpp (modified) (8 diffs)
• svgadump/svga_dump.c (modified) (1 diff)

trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-shader.cpp

@@ -68 +68 @@
 #define DXBC_BLOB_TYPE_ISGN RT_MAKE_U32_FROM_U8('I', 'S', 'G', 'N')
 #define DXBC_BLOB_TYPE_OSGN RT_MAKE_U32_FROM_U8('O', 'S', 'G', 'N')
+#define DXBC_BLOB_TYPE_PCSG RT_MAKE_U32_FROM_U8('P', 'C', 'S', 'G')
 #define DXBC_BLOB_TYPE_SHDR RT_MAKE_U32_FROM_U8('S', 'H', 'D', 'R')
 /** @todo More... */
@@ -2381 +2382 @@
 
     /* Create a DXBC container with ISGN, OSGN and SHDR blobs. */
-    uint32_t const cBlob = 3;
+    uint32_t cBlob = 3;
+    if (   pInfo->enmProgramType == VGPU10_HULL_SHADER
+        || pInfo->enmProgramType == VGPU10_DOMAIN_SHADER)
+        ++cBlob;
+
     uint32_t const cbHdr = RT_UOFFSETOF(DXBCHeader, aBlobOffset[cBlob]); /* Header with blob offsets. */
     if (!dxbcByteWriterCanWrite(w, cbHdr))
@@ -2396 +2401 @@
     dxbcByteWriterCommit(w, cbHdr);
 
+#ifdef LOG_ENABLED
+    if (pInfo->cInputSignature)
+    {
+        Log6(("Input signatures:\n"));
+        for (uint32_t i = 0; i < pInfo->cInputSignature; ++i)
+            Log6(("  [%u]: %u %u 0x%X\n", i, pInfo->aInputSignature[i].registerIndex, pInfo->aInputSignature[i].semanticName, pInfo->aInputSignature[i].mask));
+    }
+    if (pInfo->cOutputSignature)
+    {
+        Log6(("Output signatures:\n"));
+        for (uint32_t i = 0; i < pInfo->cOutputSignature; ++i)
+            Log6(("  [%u]: %u %u 0x%X\n", i, pInfo->aOutputSignature[i].registerIndex, pInfo->aOutputSignature[i].semanticName, pInfo->aOutputSignature[i].mask));
+    }
+    if (pInfo->cPatchConstantSignature)
+    {
+        Log6(("Patch constant signatures:\n"));
+        for (uint32_t i = 0; i < pInfo->cPatchConstantSignature; ++i)
+            Log6(("  [%u]: %u %u 0x%X\n", i, pInfo->aPatchConstantSignature[i].registerIndex, pInfo->aPatchConstantSignature[i].semanticName, pInfo->aPatchConstantSignature[i].mask));
+    }
+#endif
+
     /* Blobs. */
     uint32_t iBlob = 0;
@@ -2407 +2433 @@
     AssertRCReturn(rc, rc);
 
+    if (   pInfo->enmProgramType == VGPU10_HULL_SHADER
+        || pInfo->enmProgramType == VGPU10_DOMAIN_SHADER)
+    {
+        pHdr->aBlobOffset[iBlob++] = dxbcByteWriterSize(w);
+        rc = dxbcCreateIOSGNBlob(pInfo, pHdr, DXBC_BLOB_TYPE_PCSG, pInfo->cPatchConstantSignature, &pInfo->aPatchConstantSignature[0], w);
+        AssertRCReturn(rc, rc);
+    }
+
     pHdr->aBlobOffset[iBlob++] = dxbcByteWriterSize(w);
     rc = dxbcCreateSHDRBlob(pHdr, DXBC_BLOB_TYPE_SHDR, pvShader, cbShader, w);
     AssertRCReturn(rc, rc);
+
+    Assert(iBlob == cBlob);
 
     AssertCompile(RT_UOFFSETOF(DXBCHeader, u32Version) == 0x14);
@@ -2538 +2574 @@
         case SVGA3D_BC7_UNORM:                     return VGPU10_RETURN_TYPE_UNORM;
         case SVGA3D_BC7_UNORM_SRGB:                return VGPU10_RETURN_TYPE_UNORM;
+        case SVGA3D_R9G9B9E5_SHAREDEXP:            return VGPU10_RETURN_TYPE_FLOAT;
         default:
             break;

trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp

@@ -182 +182 @@
         u32TrackedState &= ~DX_STATE_SAMPLERS;
 
-        for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
+        for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_MAX; ++i)
         {
             SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;

trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp

@@ -947 +947 @@
     RT_NOREF(pBackend);
 
-    if (pDevice->pImmediateContext)
-    {
-        dxDeviceFlush(pDevice); /* Make sure that any pending draw calls are finished. */
-        pDevice->pImmediateContext->ClearState();
-    }
-
     D3D_RELEASE(pDevice->pStagingBuffer);
 
@@ -5002 +4996 @@
         VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
 
+        if (pBackendDXContext->dxDevice.pImmediateContext)
+            dxDeviceFlush(&pBackendDXContext->dxDevice); /* Make sure that any pending draw calls are finished. */
+
         if (pBackendDXContext->paRenderTargetView)
         {
@@ -5386 +5383 @@
 
     /* Make sure that the shader resource views exist. */
-    for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE_DX10 /** @todo SVGA3D_NUM_SHADERTYPE*/; ++idxShaderState)
+    for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
     {
         for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
@@ -5593 +5590 @@
      */
 
-    for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE_DX10 /** @todo SVGA3D_NUM_SHADERTYPE*/; ++idxShaderState)
+    for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
     {
         DXSHADER *pDXShader;
@@ -5605 +5602 @@
             {
                 /* Create a new shader. */
-                Log(("Shader: cid=%u shid=%u type=%d\n", pDXContext->cid, shaderId, pDXShader->enmShaderType));
+                Log(("Shader: cid=%u shid=%u type=%d, GuestSignatures %d\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures));
 
                 /* Apply resource types to a pixel shader. */
@@ -6280 +6277 @@
     }
 
+    UINT NumRTVs = 0;
     ID3D11RenderTargetView *apRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
     RT_ZERO(apRenderTargetViews);
@@ -6289 +6287 @@
             ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
             apRenderTargetViews[i] = pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId].u.pRenderTargetView;
+            ++NumRTVs;
         }
     }
@@ -6297 +6296 @@
         pDepthStencilView = pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId].u.pDepthStencilView;
 
-    pDevice->pImmediateContext->OMSetRenderTargets(pDXContext->cRenderTargets,
+    pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(NumRTVs,
                                                    apRenderTargetViews,
-                                                   pDepthStencilView);
-//    Assert(NumUAVs == 0);
-    if (NumUAVs != 0)
-        pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(D3D11_KEEP_RENDER_TARGETS_AND_DEPTH_STENCIL,
-                                                       NULL,
-                                                       NULL,
-                                                       pDXContext->svgaDXContext.uavSpliceIndex,
-                                                       NumUAVs,
-                                                       apUnorderedAccessViews,
-                                                       aUAVInitialCounts);
+                                                   pDepthStencilView,
+                                                   NumRTVs /*pDXContext->svgaDXContext.uavSpliceIndex*/,
+                                                   NumUAVs,
+                                                   apUnorderedAccessViews,
+                                                   aUAVInitialCounts);
     return VINF_SUCCESS;
 }

trunk/src/VBox/Devices/Graphics/svgadump/svga_dump.c

@@ -231 +231 @@
    case SVGA3D_SHADERTYPE_GS:
       return "SVGA3D_SHADERTYPE_GS";
+   case SVGA3D_SHADERTYPE_HS:
+      return "SVGA3D_SHADERTYPE_HS";
+   case SVGA3D_SHADERTYPE_DS:
+      return "SVGA3D_SHADERTYPE_DS";
+   case SVGA3D_SHADERTYPE_CS:
+      return "SVGA3D_SHADERTYPE_CS";
    default:
       return "unknown shader type!";