Changeset 95256 in vbox
- Timestamp:
- Jun 13, 2022 10:44:19 AM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 151814
- Location:
- trunk
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/cpum.h
r95248 r95256 1591 1591 VMMR3_INT_DECL(void) CPUMR3ClearGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature); 1592 1592 VMMR3_INT_DECL(bool) CPUMR3GetGuestCpuIdFeature(PVM pVM, CPUMCPUIDFEATURE enmFeature); 1593 VMMR3_INT_DECL(void) CPUMR3CpuIdEnable64BitGuests(PVM pVM);1594 1593 VMMDECL(bool) CPUMSetGuestCpuIdPerCpuApicFeature(PVMCPU pVCpu, bool fVisible); 1595 1594 VMMDECL(void) CPUMSetGuestCtx(PVMCPU pVCpu, const PCPUMCTX pCtx); -
trunk/src/VBox/Main/src-client/ConsoleImpl2.cpp
r95254 r95256 853 853 hrc = pMachine->COMGETTER(CPUProfile)(bstrCpuProfile.asOutParam()); H(); 854 854 855 /* Check if long mode is enabled. */ 856 BOOL fIsGuest64Bit; 857 hrc = pMachine->GetCPUProperty(CPUPropertyType_LongMode, &fIsGuest64Bit); H(); 858 855 859 /* 856 860 * Figure out the IOMMU config. … … 1108 1112 BOOL fEnablePAE = false; 1109 1113 hrc = pMachine->GetCPUProperty(CPUPropertyType_PAE, &fEnablePAE); H(); 1114 fEnablePAE |= fIsGuest64Bit; 1110 1115 InsertConfigInteger(pRoot, "EnablePAE", fEnablePAE); 1116 1117 /* 64-bit guests (long mode) */ 1118 InsertConfigInteger(pCPUM, "Enable64bit", fIsGuest64Bit); 1111 1119 1112 1120 /* APIC/X2APIC configuration */ … … 1170 1178 * Hardware virtualization extensions. 1171 1179 */ 1172 BOOL fIsGuest64Bit;1173 hrc = pMachine->GetCPUProperty(CPUPropertyType_LongMode, &fIsGuest64Bit); H();1174 1175 1180 /* Sanitize valid/useful APIC combinations, see @bugref{8868}. */ 1176 1181 if (!fEnableAPIC) -
trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp
r95248 r95256 3153 3153 * unrestricted-guest execution, CR4 feature bits and possibly more in the future. 3154 3154 */ 3155 /** @todo r=bird: given that long mode never used to be enabled before the 3156 * VMINITCOMPLETED_RING0 state, and we're a lot earlier here in ring-3 3157 * init, the above comment cannot be entirely accurate. */ 3155 3158 if (pVM->cpum.s.GuestFeatures.fVmx) 3156 3159 { … … 3172 3175 */ 3173 3176 3177 /* Check if 64-bit guest supported was enabled. */ 3178 bool fEnable64bit; 3179 rc = CFGMR3QueryBoolDef(pCpumCfg, "Enable64bit", &fEnable64bit, false); 3180 AssertRCReturn(rc, rc); 3181 if (fEnable64bit) 3182 { 3183 /* In case of a CPU upgrade: */ 3184 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SEP); 3185 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SYSCALL); /* (Long mode only on Intel CPUs.) */ 3186 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_PAE); 3187 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LAHF); 3188 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_NX); 3189 3190 /* The actual feature: */ 3191 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LONG_MODE); 3192 } 3193 3174 3194 /* Check if PAE was explicitely enabled by the user. */ 3175 3195 bool fEnable; 3176 rc = CFGMR3QueryBoolDef(CFGMR3GetRoot(pVM), "EnablePAE", &fEnable, f alse);3196 rc = CFGMR3QueryBoolDef(CFGMR3GetRoot(pVM), "EnablePAE", &fEnable, fEnable64bit); 3177 3197 AssertRCReturn(rc, rc); 3178 if (fEnable )3198 if (fEnable && !pVM->cpum.s.GuestFeatures.fPae) 3179 3199 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_PAE); 3180 3200 3181 3201 /* We don't normally enable NX for raw-mode, so give the user a chance to force it on. */ 3182 rc = CFGMR3QueryBoolDef(pCpumCfg, "EnableNX", &fEnable, f alse);3202 rc = CFGMR3QueryBoolDef(pCpumCfg, "EnableNX", &fEnable, fEnable64bit); 3183 3203 AssertRCReturn(rc, rc); 3184 if (fEnable )3204 if (fEnable && !pVM->cpum.s.GuestFeatures.fNoExecute) 3185 3205 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_NX); 3186 3206 … … 3706 3726 pVCpu->cpum.s.fChanged |= CPUM_CHANGED_CPUID; 3707 3727 } 3708 }3709 3710 3711 /**3712 * Enables 64-bit guest support for the CPU.3713 *3714 * @param pVM The cross context VM structure.3715 */3716 VMMR3_INT_DECL(void) CPUMR3CpuIdEnable64BitGuests(PVM pVM)3717 {3718 /* In case of a CPU upgrade: */3719 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SEP);3720 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_SYSCALL); /* (Long mode only on Intel CPUs.) */3721 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_PAE);3722 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LAHF);3723 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_NX);3724 3725 /* The actual feature: */3726 CPUMR3SetGuestCpuIdFeature(pVM, CPUMCPUIDFEATURE_LONG_MODE);3727 3728 } 3728 3729 -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r95248 r95256 1739 1739 1740 1740 /* 1741 * Change the CPU features.1742 */1743 if (pVM->hm.s.fAllow64BitGuestsCfg)1744 CPUMR3CpuIdEnable64BitGuests(pVM);1745 1746 /*1747 1741 * Log configuration details. 1748 1742 */ … … 1948 1942 1949 1943 hmR3DisableRawMode(pVM); 1950 1951 /*1952 * Change the CPU features.1953 */1954 if (pVM->hm.s.fAllow64BitGuestsCfg)1955 CPUMR3CpuIdEnable64BitGuests(pVM);1956 1944 1957 1945 LogRel((pVM->hm.s.fTprPatchingAllowed ? "HM: Enabled TPR patching\n" -
trunk/src/VBox/VMM/VMMR3/NEMR3.cpp
r95248 r95256 209 209 if (pVM->bMainExecutionEngine == VM_EXEC_ENGINE_NATIVE_API) 210 210 { 211 if (pVM->nem.s.fAllow64BitGuests)212 CPUMR3CpuIdEnable64BitGuests(pVM);213 214 211 /* 215 212 * Do native after-CPUM init.
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