- Timestamp:
- Jun 23, 2022 6:34:43 AM (3 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp
r95161 r95352 4171 4171 Assert(!pVCpu->iem.s.cActiveMappings); 4172 4172 return iemExecStatusCodeFiddling(pVCpu, rcStrict); 4173 4174 4173 } 4175 4174 … … 7134 7133 { 7135 7134 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 7136 int rc = PGMHandlerPhysicalRegister(pVM, GCPhysApicAccess, GCPhysApicAccess + X86_PAGE_4K_SIZE - 1,7135 int rc = PGMHandlerPhysicalRegister(pVM, GCPhysApicAccess, GCPhysApicAccess | X86_PAGE_4K_OFFSET_MASK, 7137 7136 pVM->iem.s.hVmxApicAccessPage, 0 /*uUser*/, NULL /*pszDesc*/); 7138 7137 if (RT_SUCCESS(rc)) 7139 { /* likely */ } 7138 { 7139 /* 7140 * This to make double sure we trigger EPT violations (rather than EPT misconfigs) 7141 * in case we somehow managed to sync the page when CPUMIsGuestVmxApicAccessPageAddr 7142 * returned false while sycing its PTE in (SyncHandlerPte). 7143 */ 7144 PGMShwMakePageNotPresent(pVCpu, GCPhysApicAccess, 0 /* fOpFlags */); 7145 } 7140 7146 else 7141 7147 IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_AddrApicAccessHandlerReg); … … 9930 9936 * within the APIC-access page. Currently only HM is supported. 9931 9937 */ 9932 AssertMsgReturn(VM_IS_HM_ENABLED(pVM), 9933 ("VM-exit auxiliary info. fetching not supported for execution engine %d\n", 9934 pVM->bMainExecutionEngine), VERR_IEM_ASPECT_NOT_IMPLEMENTED); 9938 AssertMsg(VM_IS_HM_ENABLED(pVM), ("VM-exit auxiliary info. fetching not supported for execution engine %d\n", 9939 pVM->bMainExecutionEngine)); 9935 9940 HMEXITAUX HmExitAux; 9936 9941 RT_ZERO(HmExitAux); … … 9939 9944 | HMVMX_READ_IDT_VECTORING_INFO 9940 9945 | HMVMX_READ_IDT_VECTORING_ERROR_CODE); 9941 AssertRC Return(rc,rc);9946 AssertRC(rc); 9942 9947 9943 9948 /* 9944 9949 * Verify the VM-exit reason must be an EPT violation. 9945 9950 * Other accesses should go through the other handler (iemVmxApicAccessPageHandler). 9951 * Refer to @bugref{10092#c33s} for a more detailed explanation. 9946 9952 */ 9947 Assert LogRelMsgReturn(HmExitAux.Vmx.uReason == VMX_EXIT_EPT_VIOLATION,9948 ("Unexpected call to the VMX APIC-access page #PF handler for %#RGp (Nested=%#RGp, GCPhysAddr%#RGp) off=%uuReason=%u\n",9949 GCPhysPage, GCPhysNestedFault, HmExitAux.Vmx.u64GuestPhysAddr, offAccess, HmExitAux.Vmx.uReason), VERR_IEM_IPE_9);9953 AssertMsg(HmExitAux.Vmx.uReason == VMX_EXIT_EPT_VIOLATION, 9954 ("Unexpected call to APIC-access page #PF handler for %#RGp off=%u uErr=%#RGx uReason=%u\n", 9955 GCPhysPage, offAccess, uErr, HmExitAux.Vmx.uReason)); 9950 9956 9951 9957 /* … … 10000 10006 * This requires emulating the instruction because we need the bytes being 10001 10007 * read/written by the instruction not just the offset being accessed within 10002 * the APIC-access (which we derive from the faulting address).10008 * the APIC-access page (which we derive from the faulting address). 10003 10009 */ 10004 10010 return VINF_EM_RAW_EMULATE_INSTR;
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