Changeset 95397 in vbox

Timestamp:

Jun 27, 2022 5:49:40 PM (2 years ago)

Author:

vboxsync

Message:

ValKit/bs3kit,bs3-cpu-instr-3: 128 and 256 bit wide vxorps, alignment checks. bugref:9898

Location:

trunk/src/VBox/ValidationKit/bootsectors

Files:

• bs3-cpu-instr-3-template.c (modified) (12 diffs)
• bs3-cpu-instr-3-template.mac (modified) (5 diffs)
• bs3kit/Makefile.kmk (modified) (1 diff)
• bs3kit/bs3-cmn-ExtCtxGetXmm.c (copied) (copied from trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-ExtCtxGetYmm.c ) (2 diffs)
• bs3kit/bs3-cmn-ExtCtxSetXmm.c (copied) (copied from trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-ExtCtxSetYmm.c ) (2 diffs)
• bs3kit/bs3-cmn-ExtCtxSetYmm.c (modified) (3 diffs)
• bs3kit/bs3kit-autostubs.kmk (modified) (2 diffs)
• bs3kit/bs3kit-mangling-code-define.h (modified) (2 diffs)
• bs3kit/bs3kit-mangling-code-undef.h (modified) (2 diffs)
• bs3kit/bs3kit.h (modified) (2 diffs)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.c

@@ -112 +112 @@
 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vxorps_XMM1_XMM1_XMM2_icebp);
 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vxorps_XMM1_XMM1_FSxBX_icebp);
+BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vxorps_YMM1_YMM1_YMM2_icebp);
+BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vxorps_YMM1_YMM1_FSxBX_icebp);
 #endif
 
@@ -134 +136 @@
     { 1, 0,  0,  1,      1,       1,   1,    1,        0,           0,        X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_DB }, /* #1 */
     { 0, 1,  0,  1,      1,       1,   1,    1,        0,           0,        X86_XCPT_UD, X86_XCPT_UD, X86_XCPT_DB }, /* #2 */
-    { 0, 0,  1,  1,      1,       1,   1,    1,        0,           0,        X86_XCPT_NM, X86_XCPT_NM, X86_XCPT_DB }, /* #3 */
-    { 0, 1,  1,  1,      1,       1,   1,    1,        0,           0,        X86_XCPT_UD, X86_XCPT_UD, X86_XCPT_DB }, /* #4 */
+    { 0, 0,  1,  1,      1,       1,   1,    1,        0,           0,        X86_XCPT_NM, X86_XCPT_NM, X86_XCPT_NM }, /* #3 */
+    { 0, 1,  1,  1,      1,       1,   1,    1,        0,           0,        X86_XCPT_UD, X86_XCPT_UD, X86_XCPT_NM }, /* #4 */
     { 0, 0,  0,  0,      1,       1,   1,    1,        0,           0,        X86_XCPT_UD, X86_XCPT_UD, X86_XCPT_DB }, /* #5 */
     { 0, 0,  0,  1,      0,       1,   1,    1,        0,           0,        X86_XCPT_DB, X86_XCPT_DB, X86_XCPT_UD }, /* #6 */
@@ -371 +373 @@
 {
     FPFNBS3FAR      pfnWorker;
+    uint8_t         bAvxMisalignXcpt;
     uint8_t         enmRm;
     uint8_t         enmType;
-    uint8_t         cbInstr;
     uint8_t         iRegDst;
     uint8_t         iRegSrc1;
@@ -453 +455 @@
             {
                 BS3CPUINSTR3_TEST1_VALUES_T const BS3_FAR *paValues = paTests[iTest].paValues;
+                uint8_t const   cbInstr     = ((uint8_t const BS3_FAR *)(uintptr_t)paTests[iTest].pfnWorker)[-1];
                 unsigned const  cValues     = paTests[iTest].cValues;
                 bool const      fMmxInstr   = paTests[iTest].enmType < T_SSE;
                 bool const      fSseInstr   = paTests[iTest].enmType >= T_SSE && paTests[iTest].enmType < T_AVX_128;
+                bool const      fAvxInstr   = paTests[iTest].enmType >= T_AVX_128;
                 uint8_t const   cbOperand   = paTests[iTest].enmType < T_128BITS ? 64/8
                                             : paTests[iTest].enmType < T_256BITS ? 128/8 : 256/8;
@@ -461 +465 @@
                 uint8_t         bXcptExpect = !g_afTypeSupports[paTests[iTest].enmType] ? X86_XCPT_UD
                                             : fMmxInstr ? paConfigs[iCfg].bXcptMmx
-                                            : fSseInstr ? paConfigs[iCfg].bXcptSse : paConfigs[iCfg].bXcptAvx;
+                                            : fSseInstr ? paConfigs[iCfg].bXcptSse
+                                            : BS3_MODE_IS_RM_OR_V86(bMode) ? X86_XCPT_UD : paConfigs[iCfg].bXcptAvx;
                 uint16_t        idTestStep  = bRing * 10000 + iCfg * 100 + iTest * 10;
                 unsigned        iVal;
@@ -475 +480 @@
                     continue;
 
-                /* #AC is only raised in ring-3: */
-                if (bXcptExpect == X86_XCPT_AC && bRing != 3)
-                    bXcptExpect = X86_XCPT_DB;
+                /* #AC is only raised in ring-3.: */
+                if (bXcptExpect == X86_XCPT_AC)
+                {
+                    if (bRing != 3)
+                        bXcptExpect = X86_XCPT_DB;
+                    else if (fAvxInstr)
+                        bXcptExpect = paTests[iTest].bAvxMisalignXcpt; /* they generally don't raise #AC */
+                }
 
                 Bs3RegCtxSetRipCsFromCurPtr(&Ctx, paTests[iTest].pfnWorker);
@@ -515 +525 @@
                     else if (fMmxInstr)
                         Bs3ExtCtxSetMm(pExtCtx, paTests[iTest].iRegSrc1, paValues[iVal].uSrc1.QWords.qw0);
+                    else if (fSseInstr)
+                        Bs3ExtCtxSetXmm(pExtCtx, paTests[iTest].iRegSrc1, &paValues[iVal].uSrc1.DQWords.dqw0);
                     else
-                        Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iRegSrc1, &paValues[iVal].uSrc1, fSseInstr);
+                        Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iRegSrc1, &paValues[iVal].uSrc1, 32);
 
                     /* source #2 */
@@ -528 +540 @@
                     else if (fMmxInstr)
                         Bs3ExtCtxSetMm(pExtCtx, paTests[iTest].iRegSrc2, paValues[iVal].uSrc2.QWords.qw0);
+                    else if (fSseInstr)
+                        Bs3ExtCtxSetXmm(pExtCtx, paTests[iTest].iRegSrc2, &paValues[iVal].uSrc2.DQWords.dqw0);
                     else
-                        Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iRegSrc2, &paValues[iVal].uSrc2, fSseInstr);
+                        Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iRegSrc2, &paValues[iVal].uSrc2, 32);
 
                     /* Memory pointer. */
@@ -556 +570 @@
                         if (fMmxInstr)
                             Bs3ExtCtxSetMm(pExtCtx, paTests[iTest].iRegDst, paValues[iVal].uDstOut.QWords.qw0);
+                        else if (fSseInstr)
+                            Bs3ExtCtxSetXmm(pExtCtx, paTests[iTest].iRegDst, &paValues[iVal].uDstOut.DQWords.dqw0);
                         else
-                            Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iRegDst, &paValues[iVal].uDstOut, fSseInstr);
+                            Bs3ExtCtxSetYmm(pExtCtx, paTests[iTest].iRegDst, &paValues[iVal].uDstOut, cbOperand);
                     }
                     Bs3TestCheckExtCtx(pExtCtxOut, pExtCtx, 0 /*fFlags*/, pszMode, idTestStep);
@@ -571 +587 @@
                         TrapFrame.Ctx.rflags.u32 |= X86_EFL_AC;
                     }
-                    Bs3TestCheckRegCtxEx(&TrapFrame.Ctx, &Ctx, bXcptExpect == X86_XCPT_DB ? paTests[iTest].cbInstr + 1 : 0, 0,
+                    Bs3TestCheckRegCtxEx(&TrapFrame.Ctx, &Ctx, bXcptExpect == X86_XCPT_DB ? cbInstr + 1 : 0, 0,
                                          bXcptExpect == X86_XCPT_DB || BS3_MODE_IS_16BIT_SYS(bMode) ? 0 : X86_EFL_RF,
                                          pszMode, idTestStep);
@@ -580 +596 @@
 
                     if (cErrors != Bs3TestSubErrorCount())
-                        Bs3TestFailedF("ring-%d/cfg#%u/test#%u/value#%u failed (bXcptExpect=%#x)",
-                                       bRing, iCfg, iTest, iVal, bXcptExpect);
+                    {
+                        if (paConfigs[iCfg].fAligned)
+                            Bs3TestFailedF("ring-%d/cfg#%u/test#%u/value#%u failed (bXcptExpect=%#x)",
+                                           bRing, iCfg, iTest, iVal, bXcptExpect);
+                        else
+                            Bs3TestFailedF("ring-%d/cfg#%u/test#%u/value#%u failed (bXcptExpect=%#x, puMemOp=%p, EFLAGS=%#RX32, CR0=%#RX32)",
+                                           bRing, iCfg, iTest, iVal, bXcptExpect, puMemOp, TrapFrame.Ctx.rflags.u32, TrapFrame.Ctx.cr0);
+                        Bs3TestPrintf("\n");
+                    }
                 }
             }
@@ -609 +632 @@
 BS3_DECL_FAR(uint8_t) BS3_CMN_NM(bs3CpuInstr3_xorps)(uint8_t bMode)
 {
-    /** Input values for 128 bit wide operations: */
-    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues128[] =
-    {
-        {           RTUINT256_INIT_C(0, 0, 0x1111222233334444, 0x5555666677778888),
-            /* ^ */ RTUINT256_INIT_C(0, 0, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000),
-            /* = */ RTUINT256_INIT_C(0, 0, 0x8888888888888888, 0x8888888888888888) },
+    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues[] =
+    {
+        {           RTUINT256_INIT_C(0, 0, 0, 0),
+            /* ^ */ RTUINT256_INIT_C(0, 0, 0, 0),
+            /* = */ RTUINT256_INIT_C(0, 0, 0, 0) },
+        {           RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x5555666677778888),
+            /* ^ */ RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000),
+            /* = */ RTUINT256_INIT_C(0x8888888888888888, 0x8888888888888888, 0x8888888888888888, 0x8888888888888888) },
+        {           RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
+            /* ^ */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
+            /* = */ RTUINT256_INIT_C(0x53d42d8665bf4141, 0xc7a89924261969d5, 0x3c21c6f3e9d5f961, 0xdf8f2dd3b08d0f46) },
     };
 
     static BS3CPUINSTR3_TEST1_T const s_aTests16[] =
     {
-        {  bs3CpuInstr3_xorps_XMM1_XMM2_icebp_c16,      RM_REG, T_SSE2, 3,  1, 1,   2, RT_ELEMENTS(s_aValues128), s_aValues128 },
-        {  bs3CpuInstr3_xorps_XMM1_FSxBX_icebp_c16,     RM_MEM, T_SSE2, 4,  1, 1, 255, RT_ELEMENTS(s_aValues128), s_aValues128 },
+        {  bs3CpuInstr3_xorps_XMM1_XMM2_icebp_c16,          255,         RM_REG, T_SSE2,     1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_xorps_XMM1_FSxBX_icebp_c16,         255,         RM_MEM, T_SSE2,     1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_XMM1_XMM1_XMM2_icebp_c16,    255,         RM_REG, T_AVX_128,  1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_XMM1_XMM1_FSxBX_icebp_c16,   X86_XCPT_DB, RM_MEM, T_AVX_128,  1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_YMM1_YMM1_YMM2_icebp_c16,    255,         RM_REG, T_AVX_256,  1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_YMM1_YMM1_FSxBX_icebp_c16,   X86_XCPT_DB, RM_MEM, T_AVX_256,  1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     };
-
-#if ARCH_BITS >= 32
+# if ARCH_BITS >= 32
     static BS3CPUINSTR3_TEST1_T const s_aTests32[] =
     {
-        {  bs3CpuInstr3_xorps_XMM1_XMM2_icebp_c32,      RM_REG, T_SSE2, 3,  1, 1, 2,   RT_ELEMENTS(s_aValues128), s_aValues128 },
-        {  bs3CpuInstr3_xorps_XMM1_FSxBX_icebp_c32,     RM_MEM, T_SSE2, 4,  1, 1, 255, RT_ELEMENTS(s_aValues128), s_aValues128 },
+        {  bs3CpuInstr3_xorps_XMM1_XMM2_icebp_c32,          255, RM_REG, T_SSE2,     1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_xorps_XMM1_FSxBX_icebp_c32,         255, RM_MEM, T_SSE2,     1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_XMM1_XMM1_XMM2_icebp_c32,    255, RM_REG, T_AVX_128,  1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_XMM1_XMM1_FSxBX_icebp_c32,   X86_XCPT_DB, RM_MEM, T_AVX_128,  1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_YMM1_YMM1_YMM2_icebp_c32,    255,         RM_REG, T_AVX_256,  1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_YMM1_YMM1_FSxBX_icebp_c32,   X86_XCPT_DB, RM_MEM, T_AVX_256,  1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     };
-#endif
-
-#if ARCH_BITS >= 64
+# endif
+# if ARCH_BITS >= 64
     static BS3CPUINSTR3_TEST1_T const s_aTests64[] =
     {
-        {  bs3CpuInstr3_xorps_XMM1_XMM2_icebp_c64,      RM_REG, T_SSE2, 3,  1, 1, 2,   RT_ELEMENTS(s_aValues128), s_aValues128 },
-        {  bs3CpuInstr3_xorps_XMM1_FSxBX_icebp_c64,     RM_MEM, T_SSE2, 4,  1, 1, 255, RT_ELEMENTS(s_aValues128), s_aValues128 },
+        {  bs3CpuInstr3_xorps_XMM1_XMM2_icebp_c64,          255,         RM_REG, T_SSE2,     1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_xorps_XMM1_FSxBX_icebp_c64,         255,         RM_MEM, T_SSE2,     1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_XMM1_XMM1_XMM2_icebp_c64,    255,         RM_REG, T_AVX_128,  1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_XMM1_XMM1_FSxBX_icebp_c64,   X86_XCPT_DB, RM_MEM, T_AVX_128,  1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_YMM1_YMM1_YMM2_icebp_c64,    255,         RM_REG, T_AVX_256,  1, 1,   2, RT_ELEMENTS(s_aValues), s_aValues },
+        {  bs3CpuInstr3_vxorps_YMM1_YMM1_FSxBX_icebp_c64,   X86_XCPT_DB, RM_MEM, T_AVX_256,  1, 1, 255, RT_ELEMENTS(s_aValues), s_aValues },
     };
-#endif
+# endif
 
     static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

@@ -44 +44 @@
 %ifdef BS3_INSTANTIATING_CMN
 
+
+;;
+; Variant on BS3_PROC_BEGIN_CMN w/ BS3_PBC_NEAR that prefixes the function
+; with an instruction length byte.
+;
+; ASSUMES the length is between the start of the function and the .again label.
+;
+%ifndef BS3CPUINSTR3_PROC_BEGIN_CMN
+ %define BS3CPUINSTR3_PROC_BEGIN_CMN_DEFINED
+ %macro BS3CPUINSTR3_PROC_BEGIN_CMN 1
+        align   8, db 0cch
+        db      BS3_CMN_NM(%1).again - BS3_CMN_NM(%1)
+BS3_PROC_BEGIN_CMN %1, BS3_PBC_NEAR
+ %endmacro
+%endif
+
 ;
 ; XORPS (SSE2) & VXORPS (AVX)
 ;
-BS3_PROC_BEGIN_CMN bs3CpuInstr3_xorps_XMM1_XMM2_icebp, BS3_PBC_NEAR
-        xorps    xmm1, xmm2
+BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_xorps_XMM1_XMM2_icebp
+        xorps   xmm1, xmm2
 .again:
         icebp
@@ -54 +70 @@
 BS3_PROC_END_CMN   bs3CpuInstr3_xorps_XMM1_XMM2_icebp
 
-BS3_PROC_BEGIN_CMN bs3CpuInstr3_xorps_XMM1_FSxBX_icebp, BS3_PBC_NEAR
-        xorps    xmm1, [fs:xBX]
+BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_xorps_XMM1_FSxBX_icebp
+        xorps   xmm1, [fs:xBX]
 .again:
         icebp
@@ -61 +77 @@
 BS3_PROC_END_CMN   bs3CpuInstr3_xorps_XMM1_FSxBX_icebp
 
-BS3_PROC_BEGIN_CMN bs3CpuInstr3_vxorps_XMM1_XMM1_XMM2_icebp, BS3_PBC_NEAR
+BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_vxorps_XMM1_XMM1_XMM2_icebp
         vxorps    xmm1, xmm1, xmm2
 .again:
@@ -68 +84 @@
 BS3_PROC_END_CMN   bs3CpuInstr3_vxorps_XMM1_XMM1_XMM2_icebp
 
-BS3_PROC_BEGIN_CMN bs3CpuInstr3_vxorps_XMM1_XMM1_FSxBX_icebp, BS3_PBC_NEAR
+BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_vxorps_XMM1_XMM1_FSxBX_icebp
+%if 0
+.again2:
+        pause
+        jmp .again2
+%endif
         vxorps    xmm1, xmm1, [fs:xBX]
 .again:
@@ -75 +96 @@
 BS3_PROC_END_CMN   bs3CpuInstr3_vxorps_XMM1_XMM1_FSxBX_icebp
 
+BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_vxorps_YMM1_YMM1_YMM2_icebp
+        vxorps    ymm1, ymm1, ymm2
+.again:
+        icebp
+        jmp     .again
+BS3_PROC_END_CMN   bs3CpuInstr3_vxorps_YMM1_YMM1_YMM2_icebp
+
+BS3CPUINSTR3_PROC_BEGIN_CMN bs3CpuInstr3_vxorps_YMM1_YMM1_FSxBX_icebp
+        vxorps    ymm1, ymm1, [fs:xBX]
+.again:
+        icebp
+        jmp     .again
+BS3_PROC_END_CMN   bs3CpuInstr3_vxorps_YMM1_YMM1_FSxBX_icebp
+
 
 %endif ; BS3_INSTANTIATING_CMN

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/Makefile.kmk

@@ -151 +151 @@
        bs3-cmn-ExtCtxGetMm.c \
        bs3-cmn-ExtCtxSetMm.c \
+       bs3-cmn-ExtCtxGetXmm.c \
+       bs3-cmn-ExtCtxSetXmm.c \
        bs3-cmn-ExtCtxGetYmm.c \
        bs3-cmn-ExtCtxSetYmm.c \

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-ExtCtxGetXmm.c

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * BS3Kit - Bs3ExtCtxGetYmm
+ * BS3Kit - Bs3ExtCtxGetXmm
  */
 
@@ -32 +32 @@
 
 
-#undef Bs3ExtCtxGetYmm
-BS3_CMN_DEF(PRTUINT256U, Bs3ExtCtxGetYmm,(PCBS3EXTCTX pExtCtx, uint8_t iReg, PRTUINT256U pValue))
+#undef Bs3ExtCtxGetXmm
+BS3_CMN_DEF(PRTUINT128U, Bs3ExtCtxGetXmm,(PCBS3EXTCTX pExtCtx, uint8_t iReg, PRTUINT128U pValue))
 {
-    pValue->au128[0].au64[0] = 0;
-    pValue->au128[0].au64[1] = 0;
-    pValue->au128[1].au64[0] = 0;
-    pValue->au128[1].au64[1] = 0;
-
+    AssertCompileMembersAtSameOffset(BS3EXTCTX, Ctx.x87.aXMM, BS3EXTCTX, Ctx.x.x87.aXMM);
     switch (pExtCtx->enmMethod)
     {
         case BS3EXTCTXMETHOD_FXSAVE:
+        case BS3EXTCTXMETHOD_XSAVE:
             if (iReg < RT_ELEMENTS(pExtCtx->Ctx.x87.aXMM))
-                pValue->au128[0] = pExtCtx->Ctx.x87.aXMM[iReg].uXmm;
-            break;
-
-        case BS3EXTCTXMETHOD_XSAVE:
-            if (iReg < RT_ELEMENTS(pExtCtx->Ctx.x.x87.aXMM))
             {
-                pValue->au128[0] = pExtCtx->Ctx.x87.aXMM[iReg].uXmm;
-                if (pExtCtx->fXcr0Nominal & XSAVE_C_YMM)
-                    pValue->au128[1] = pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].uXmm;
+                pValue->u = pExtCtx->Ctx.x87.aXMM[iReg].xmm;
+                return pValue;
             }
             break;
     }
+
+    pValue->au64[0] = 0;
+    pValue->au64[1] = 0;
     return pValue;
 }

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-ExtCtxSetXmm.c

@@ -1 +1 @@
 /* $Id$ */
 /** @file
- * BS3Kit - Bs3ExtCtxSetYmm
+ * BS3Kit - Bs3ExtCtxSetXmm
  */
 
@@ -32 +32 @@
 
 
-#undef Bs3ExtCtxSetYmm
-BS3_CMN_DEF(bool, Bs3ExtCtxSetYmm,(PBS3EXTCTX pExtCtx, uint8_t iReg, PCRTUINT256U pValue, bool f128Bit))
+#undef Bs3ExtCtxSetXmm
+BS3_CMN_DEF(bool, Bs3ExtCtxSetXmm,(PBS3EXTCTX pExtCtx, uint8_t iReg, PCRTUINT128U pValue))
 {
+    AssertCompileMembersAtSameOffset(BS3EXTCTX, Ctx.x87.aXMM, BS3EXTCTX, Ctx.x.x87.aXMM);
     switch (pExtCtx->enmMethod)
     {
         case BS3EXTCTXMETHOD_FXSAVE:
+        case BS3EXTCTXMETHOD_XSAVE:
             if (iReg < RT_ELEMENTS(pExtCtx->Ctx.x87.aXMM))
             {
-                pExtCtx->Ctx.x87.aXMM[iReg].uXmm = pValue->au128[0];
-                return true;
-            }
-            break;
-
-        case BS3EXTCTXMETHOD_XSAVE:
-            if (iReg < RT_ELEMENTS(pExtCtx->Ctx.x.x87.aXMM))
-            {
-                pExtCtx->Ctx.x87.aXMM[iReg].uXmm = pValue->au128[0];
-                if ((pExtCtx->fXcr0Nominal & XSAVE_C_YMM) && !f128Bit)
-                    pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].uXmm = pValue->au128[1];
+                pExtCtx->Ctx.x87.aXMM[iReg].xmm = pValue->u;
                 return true;
             }

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-ExtCtxSetYmm.c

@@ -33 +33 @@
 
 #undef Bs3ExtCtxSetYmm
-BS3_CMN_DEF(bool, Bs3ExtCtxSetYmm,(PBS3EXTCTX pExtCtx, uint8_t iReg, PCRTUINT256U pValue, bool f128Bit))
+BS3_CMN_DEF(bool, Bs3ExtCtxSetYmm,(PBS3EXTCTX pExtCtx, uint8_t iReg, PCRTUINT256U pValue, uint8_t cbValue))
 {
+    BS3_ASSERT(cbValue == 16 || cbValue == 32);
     switch (pExtCtx->enmMethod)
     {
@@ -40 +41 @@
             if (iReg < RT_ELEMENTS(pExtCtx->Ctx.x87.aXMM))
             {
-                pExtCtx->Ctx.x87.aXMM[iReg].uXmm = pValue->au128[0];
+                pExtCtx->Ctx.x87.aXMM[iReg].uXmm = pValue->DQWords.dqw0;
                 return true;
             }
@@ -48 +49 @@
             if (iReg < RT_ELEMENTS(pExtCtx->Ctx.x.x87.aXMM))
             {
-                pExtCtx->Ctx.x87.aXMM[iReg].uXmm = pValue->au128[0];
-                if ((pExtCtx->fXcr0Nominal & XSAVE_C_YMM) && !f128Bit)
-                    pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].uXmm = pValue->au128[1];
+                pExtCtx->Ctx.x87.aXMM[iReg].uXmm = pValue->DQWords.dqw0;
+                if (pExtCtx->fXcr0Nominal & XSAVE_C_YMM)
+                {
+                    if (cbValue >= 32)
+                        pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].uXmm = pValue->DQWords.dqw1;
+                    else
+                    {
+                        pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].au64[0] = 0;
+                        pExtCtx->Ctx.x.u.YmmHi.aYmmHi[iReg].au64[1] = 0;
+                    }
+                    /** @todo zero high ZMM part. */
+                }
                 return true;
             }

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit-autostubs.kmk

@@ -38 +38 @@
 $(call BS3KIT_FN_GEN_CMN_FARSTUB,bs3kit-common-16,Bs3RegCtxSaveEx,8)
 $(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3ExtCtxSetMm)
+$(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3ExtCtxSetXmm)
 $(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3ExtCtxSetYmm)
 $(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3TestCheckExtCtx)
@@ -63 +64 @@
 $(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3ExtCtxInit)
 $(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3TrapSetHandler)
+$(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3ExtCtxGetXmm)
 $(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3ExtCtxGetYmm)
 $(call BS3KIT_FN_GEN_CMN_NEARSTUB,bs3kit-common-16,Bs3Printf)

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit-mangling-code-define.h

@@ -37 +37 @@
 #define Bs3ExtCtxGetMxCsr BS3_CMN_MANGLER(Bs3ExtCtxGetMxCsr)
 #define Bs3ExtCtxGetSize BS3_CMN_MANGLER(Bs3ExtCtxGetSize)
+#define Bs3ExtCtxGetXmm BS3_CMN_MANGLER(Bs3ExtCtxGetXmm)
 #define Bs3ExtCtxGetYmm BS3_CMN_MANGLER(Bs3ExtCtxGetYmm)
 #define Bs3ExtCtxInit BS3_CMN_MANGLER(Bs3ExtCtxInit)
@@ -43 +44 @@
 #define Bs3ExtCtxSetMm BS3_CMN_MANGLER(Bs3ExtCtxSetMm)
 #define Bs3ExtCtxSetMxCsr BS3_CMN_MANGLER(Bs3ExtCtxSetMxCsr)
+#define Bs3ExtCtxSetXmm BS3_CMN_MANGLER(Bs3ExtCtxSetXmm)
 #define Bs3ExtCtxSetYmm BS3_CMN_MANGLER(Bs3ExtCtxSetYmm)
 #define Bs3GetCpuVendor BS3_CMN_MANGLER(Bs3GetCpuVendor)

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit-mangling-code-undef.h

@@ -37 +37 @@
 #undef Bs3ExtCtxGetMxCsr
 #undef Bs3ExtCtxGetSize
+#undef Bs3ExtCtxGetXmm
 #undef Bs3ExtCtxGetYmm
 #undef Bs3ExtCtxInit
@@ -43 +44 @@
 #undef Bs3ExtCtxSetMm
 #undef Bs3ExtCtxSetMxCsr
+#undef Bs3ExtCtxSetXmm
 #undef Bs3ExtCtxSetYmm
 #undef Bs3GetCpuVendor

trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3kit.h

@@ -2916 +2916 @@
 
 /**
+ * Gets the value of XMM register number @a iReg from @a pExtCtx.
+ *
+ * @returns pValue
+ * @param   pExtCtx         The extended CPU context.
+ * @param   iReg            The register to get.
+ * @param   pValue          Where to return the value. Zeroed if the state
+ *                          doesn't support SSE or if @a iReg is invalid.
+ */
+BS3_CMN_PROTO_STUB(PRTUINT128U, Bs3ExtCtxGetXmm,(PCBS3EXTCTX pExtCtx, uint8_t iReg, PRTUINT128U pValue));
+
+/**
+ * Sets the value of XMM register number @a iReg in @a pExtCtx to @a pValue.
+ *
+ * @returns True if set, false if not set (not supported by state format or
+ *          invalid iReg).
+ * @param   pExtCtx         The extended CPU context.
+ * @param   iReg            The register to set.
+ * @param   pValue          The new register value.
+ */
+BS3_CMN_PROTO_STUB(bool, Bs3ExtCtxSetXmm,(PBS3EXTCTX pExtCtx, uint8_t iReg, PCRTUINT128U pValue));
+
+/**
  * Gets the value of YMM register number @a iReg from @a pExtCtx.
  *
@@ -2935 +2957 @@
  * @param   iReg            The register to set.
  * @param   pValue          The new register value.
- * @param   f128Bit         A little peculiarity grown from mixing SSE and AVX
- *                          tests:  When set to true only the lower 128 bits of
- *                          the YMM register will be set. The upper bits are
- *                          untouched.  When false, the whole 256-bits value
- *                          will be set.
- */
-BS3_CMN_PROTO_STUB(bool, Bs3ExtCtxSetYmm,(PBS3EXTCTX pExtCtx, uint8_t iReg, PCRTUINT256U pValue, bool f128Bit));
+ * @param   cbValue         Number of bytes to take from @a pValue, either 16 or
+ *                          32. If 16, the high part will be zeroed when present
+ *                          in the state.
+ */
+BS3_CMN_PROTO_STUB(bool, Bs3ExtCtxSetYmm,(PBS3EXTCTX pExtCtx, uint8_t iReg, PCRTUINT256U pValue, uint8_t cbValue));