Changeset 95453 in vbox for trunk/src/VBox
- Timestamp:
- Jun 30, 2022 9:43:46 AM (3 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 9 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r95449 r95453 3564 3564 ; 3565 3565 ; @param 1 The instruction 3566 ; @param 2 Whether there is an MMX variant (1) or not (0). 3566 3567 ; 3567 3568 ; @param A0 FPU context (fxsave). … … 3569 3570 ; @param A2 Pointer to the second media register size operand (input). 3570 3571 ; 3571 %macro IEMIMPL_MEDIA_F2 1 3572 %macro IEMIMPL_MEDIA_F2 2 3573 %if %2 != 0 3572 3574 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u64, 12 3573 3575 PROLOGUE_3_ARGS … … 3582 3584 EPILOGUE_3_ARGS 3583 3585 ENDPROC iemAImpl_ %+ %1 %+ _u64 3586 %endif 3584 3587 3585 3588 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u128, 12 … … 3597 3600 %endmacro 3598 3601 3599 IEMIMPL_MEDIA_F2 pand 3600 IEMIMPL_MEDIA_F2 pandn 3601 IEMIMPL_MEDIA_F2 por 3602 IEMIMPL_MEDIA_F2 pxor 3603 IEMIMPL_MEDIA_F2 pcmpeqb 3604 IEMIMPL_MEDIA_F2 pcmpeqw 3605 IEMIMPL_MEDIA_F2 pcmpeqd 3606 IEMIMPL_MEDIA_F2 pcmpgtb 3607 IEMIMPL_MEDIA_F2 pcmpgtw 3608 IEMIMPL_MEDIA_F2 pcmpgtd 3602 IEMIMPL_MEDIA_F2 pand, 1 3603 IEMIMPL_MEDIA_F2 pandn, 1 3604 IEMIMPL_MEDIA_F2 por, 1 3605 IEMIMPL_MEDIA_F2 pxor, 1 3606 IEMIMPL_MEDIA_F2 pcmpeqb, 1 3607 IEMIMPL_MEDIA_F2 pcmpeqw, 1 3608 IEMIMPL_MEDIA_F2 pcmpeqd, 1 3609 IEMIMPL_MEDIA_F2 pcmpeqq, 0 3610 IEMIMPL_MEDIA_F2 pcmpgtb, 1 3611 IEMIMPL_MEDIA_F2 pcmpgtw, 1 3612 IEMIMPL_MEDIA_F2 pcmpgtd, 1 3613 IEMIMPL_MEDIA_F2 pcmpgtq, 0 3609 3614 3610 3615 … … 3846 3851 IEMIMPL_MEDIA_F3 vpcmpeqw 3847 3852 IEMIMPL_MEDIA_F3 vpcmpeqd 3853 IEMIMPL_MEDIA_F3 vpcmpeqq 3848 3854 IEMIMPL_MEDIA_F3 vpcmpgtb 3849 3855 IEMIMPL_MEDIA_F3 vpcmpgtw 3850 3856 IEMIMPL_MEDIA_F3 vpcmpgtd 3851 3857 IEMIMPL_MEDIA_F3 vpcmpgtq 3858 -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r95449 r95453 7428 7428 7429 7429 /* 7430 * PCMPEQQ / VPCMPEQQ. 7431 */ 7432 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpeqq_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7433 { 7434 RT_NOREF(pFpuState); 7435 RTUINT128U uSrc1 = *puDst; 7436 puDst->au64[0] = uSrc1.au64[0] == puSrc->au64[0] ? UINT64_MAX : 0; 7437 puDst->au64[1] = uSrc1.au64[1] == puSrc->au64[1] ? UINT64_MAX : 0; 7438 } 7439 7440 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqq_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 7441 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7442 { 7443 RT_NOREF(pExtState); 7444 puDst->au64[0] = puSrc1->au64[0] == puSrc2->au64[0] ? UINT64_MAX : 0; 7445 puDst->au64[1] = puSrc1->au64[1] == puSrc2->au64[1] ? UINT64_MAX : 0; 7446 } 7447 7448 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpeqq_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 7449 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7450 { 7451 RT_NOREF(pExtState); 7452 puDst->au64[0] = puSrc1->au64[0] == puSrc2->au64[0] ? UINT64_MAX : 0; 7453 puDst->au64[1] = puSrc1->au64[1] == puSrc2->au64[1] ? UINT64_MAX : 0; 7454 puDst->au64[2] = puSrc1->au64[2] == puSrc2->au64[2] ? UINT64_MAX : 0; 7455 puDst->au64[3] = puSrc1->au64[3] == puSrc2->au64[3] ? UINT64_MAX : 0; 7456 } 7457 7458 7459 /* 7430 7460 * PCMPGTB / VPCMPGTB 7431 7461 */ … … 7662 7692 7663 7693 /* 7694 * PCMPGTQ / VPCMPGTQ. 7695 */ 7696 IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpgtq_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7697 { 7698 RT_NOREF(pFpuState); 7699 RTUINT128U uSrc1 = *puDst; 7700 puDst->au64[0] = uSrc1.ai64[0] > puSrc->ai64[0] ? UINT64_MAX : 0; 7701 puDst->au64[1] = uSrc1.ai64[1] > puSrc->ai64[1] ? UINT64_MAX : 0; 7702 } 7703 7704 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtq_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 7705 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) 7706 { 7707 RT_NOREF(pExtState); 7708 puDst->au64[0] = puSrc1->ai64[0] > puSrc2->ai64[0] ? UINT64_MAX : 0; 7709 puDst->au64[1] = puSrc1->ai64[1] > puSrc2->ai64[1] ? UINT64_MAX : 0; 7710 } 7711 7712 IEM_DECL_IMPL_DEF(void, iemAImpl_vpcmpgtq_u256_fallback,(PX86XSAVEAREA pExtState, PRTUINT256U puDst, 7713 PCRTUINT256U puSrc1, PCRTUINT256U puSrc2)) 7714 { 7715 RT_NOREF(pExtState); 7716 puDst->au64[0] = puSrc1->ai64[0] > puSrc2->ai64[0] ? UINT64_MAX : 0; 7717 puDst->au64[1] = puSrc1->ai64[1] > puSrc2->ai64[1] ? UINT64_MAX : 0; 7718 puDst->au64[2] = puSrc1->ai64[2] > puSrc2->ai64[2] ? UINT64_MAX : 0; 7719 puDst->au64[3] = puSrc1->ai64[3] > puSrc2->ai64[3] ? UINT64_MAX : 0; 7720 } 7721 7722 7723 /* 7664 7724 * 7665 7725 */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsInterpretOnly.cpp
r95449 r95453 924 924 /** Function table for the PCMPEQD instruction */ 925 925 IEM_STATIC const IEMOPMEDIAF2 g_iemAImpl_pcmpeqd = { iemAImpl_pcmpeqd_u64, iemAImpl_pcmpeqd_u128 }; 926 # ifndef IEM_WITHOUT_ASSEMBLY 927 /** Function table for the PCMPEQQ instruction */ 928 IEM_STATIC const IEMOPMEDIAF2 g_iemAImpl_pcmpeqq = { NULL, iemAImpl_pcmpeqq_u128 }; 929 # endif 930 /** Function table for the PCMPEQQ instruction, software fallback. */ 931 IEM_STATIC const IEMOPMEDIAF2 g_iemAImpl_pcmpeqq_fallback = { NULL, iemAImpl_pcmpeqq_u128_fallback }; 926 932 /** Function table for the PCMPGTB instruction */ 927 933 IEM_STATIC const IEMOPMEDIAF2 g_iemAImpl_pcmpgtb = { iemAImpl_pcmpgtb_u64, iemAImpl_pcmpgtb_u128 }; … … 930 936 /** Function table for the PCMPGTD instruction */ 931 937 IEM_STATIC const IEMOPMEDIAF2 g_iemAImpl_pcmpgtd = { iemAImpl_pcmpgtd_u64, iemAImpl_pcmpgtd_u128 }; 938 # ifndef IEM_WITHOUT_ASSEMBLY 939 /** Function table for the PCMPGTQ instruction */ 940 IEM_STATIC const IEMOPMEDIAF2 g_iemAImpl_pcmpgtq = { NULL, iemAImpl_pcmpgtq_u128 }; 941 # endif 942 /** Function table for the PCMPGTQ instruction, software fallback. */ 943 IEM_STATIC const IEMOPMEDIAF2 g_iemAImpl_pcmpgtq_fallback = { NULL, iemAImpl_pcmpgtq_u128_fallback }; 932 944 933 945 # ifndef IEM_WITHOUT_ASSEMBLY … … 946 958 /** Function table for the VPCMPEQD instruction */ 947 959 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpeqd = { iemAImpl_vpcmpeqd_u128, iemAImpl_vpcmpeqd_u256 }; 960 /** Function table for the VPCMPEQQ instruction */ 961 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpeqq = { iemAImpl_vpcmpeqq_u128, iemAImpl_vpcmpeqq_u256 }; 948 962 /** Function table for the VPCMPGTB instruction */ 949 963 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpgtb = { iemAImpl_vpcmpgtb_u128, iemAImpl_vpcmpgtb_u256 }; … … 952 966 /** Function table for the VPCMPGTD instruction */ 953 967 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpgtd = { iemAImpl_vpcmpgtd_u128, iemAImpl_vpcmpgtd_u256 }; 968 /** Function table for the VPCMPGTQ instruction */ 969 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpgtq = { iemAImpl_vpcmpgtq_u128, iemAImpl_vpcmpgtq_u256 }; 954 970 # endif 955 971 … … 968 984 /** Function table for the VPCMPEQD instruction, software fallback. */ 969 985 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpeqd_fallback = { iemAImpl_vpcmpeqd_u128_fallback, iemAImpl_vpcmpeqd_u256_fallback }; 986 /** Function table for the VPCMPEQQ instruction, software fallback. */ 987 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpeqq_fallback = { iemAImpl_vpcmpeqq_u128_fallback, iemAImpl_vpcmpeqq_u256_fallback }; 970 988 /** Function table for the VPCMPGTB instruction, software fallback. */ 971 989 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpgtb_fallback = { iemAImpl_vpcmpgtb_u128_fallback, iemAImpl_vpcmpgtb_u256_fallback }; … … 974 992 /** Function table for the VPCMPGTD instruction, software fallback. */ 975 993 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpgtd_fallback = { iemAImpl_vpcmpgtd_u128_fallback, iemAImpl_vpcmpgtd_u256_fallback }; 994 /** Function table for the VPCMPGTQ instruction, software fallback. */ 995 IEM_STATIC const IEMOPMEDIAF3 g_iemAImpl_vpcmpgtq_fallback = { iemAImpl_vpcmpgtq_u128_fallback, iemAImpl_vpcmpgtq_u256_fallback }; 976 996 977 997 #endif /* !TST_IEM_CHECK_MC */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h
r93115 r95453 142 142 /** Opcode 0x66 0x0f 0x38 0x28. */ 143 143 FNIEMOP_STUB(iemOp_pmuldq_Vx_Wx); 144 145 /** 146 * Common worker for SSE4.1 instructions on the forms: 147 * pxxx xmm1, xmm2/mem128 148 * 149 * Proper alignment of the 128-bit operand is enforced. 150 * Exceptions type 4. SSE2 cpuid checks. 151 * 152 * @sa iemOpCommonSse2_FullFull_To_Full, iemOpCommonSse2_FullFull_To_Full 153 */ 154 FNIEMOP_DEF_1(iemOpCommonSse41_FullFull_To_Full, PCIEMOPMEDIAF2, pImpl) 155 { 156 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 157 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 158 { 159 /* 160 * Register, register. 161 */ 162 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 163 IEM_MC_BEGIN(2, 0); 164 IEM_MC_ARG(PRTUINT128U, pDst, 0); 165 IEM_MC_ARG(PCRTUINT128U, pSrc, 1); 166 IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT(); 167 IEM_MC_PREPARE_SSE_USAGE(); 168 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 169 IEM_MC_REF_XREG_U128_CONST(pSrc, (bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB); 170 IEM_MC_CALL_SSE_AIMPL_2(pImpl->pfnU128, pDst, pSrc); 171 IEM_MC_ADVANCE_RIP(); 172 IEM_MC_END(); 173 } 174 else 175 { 176 /* 177 * Register, memory. 178 */ 179 IEM_MC_BEGIN(2, 2); 180 IEM_MC_ARG(PRTUINT128U, pDst, 0); 181 IEM_MC_LOCAL(RTUINT128U, uSrc); 182 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, pSrc, uSrc, 1); 183 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 184 185 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 186 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 187 IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT(); 188 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 189 190 IEM_MC_PREPARE_SSE_USAGE(); 191 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 192 IEM_MC_CALL_SSE_AIMPL_2(pImpl->pfnU128, pDst, pSrc); 193 194 IEM_MC_ADVANCE_RIP(); 195 IEM_MC_END(); 196 } 197 return VINF_SUCCESS; 198 } 199 200 201 /** 202 * Common worker for SSE4.2 instructions on the forms: 203 * pxxx xmm1, xmm2/mem128 204 * 205 * Proper alignment of the 128-bit operand is enforced. 206 * Exceptions type 4. SSE2 cpuid checks. 207 * 208 * @sa iemOpCommonSse2_FullFull_To_Full, iemOpCommonSse41_FullFull_To_Full 209 */ 210 FNIEMOP_DEF_1(iemOpCommonSse42_FullFull_To_Full, PCIEMOPMEDIAF2, pImpl) 211 { 212 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 213 if ((bRm & X86_MODRM_MOD_MASK) == (3 << X86_MODRM_MOD_SHIFT)) 214 { 215 /* 216 * Register, register. 217 */ 218 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 219 IEM_MC_BEGIN(2, 0); 220 IEM_MC_ARG(PRTUINT128U, pDst, 0); 221 IEM_MC_ARG(PCRTUINT128U, pSrc, 1); 222 IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT(); 223 IEM_MC_PREPARE_SSE_USAGE(); 224 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 225 IEM_MC_REF_XREG_U128_CONST(pSrc, (bRm & X86_MODRM_RM_MASK) | pVCpu->iem.s.uRexB); 226 IEM_MC_CALL_SSE_AIMPL_2(pImpl->pfnU128, pDst, pSrc); 227 IEM_MC_ADVANCE_RIP(); 228 IEM_MC_END(); 229 } 230 else 231 { 232 /* 233 * Register, memory. 234 */ 235 IEM_MC_BEGIN(2, 2); 236 IEM_MC_ARG(PRTUINT128U, pDst, 0); 237 IEM_MC_LOCAL(RTUINT128U, uSrc); 238 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, pSrc, uSrc, 1); 239 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 240 241 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 242 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 243 IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT(); 244 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 245 246 IEM_MC_PREPARE_SSE_USAGE(); 247 IEM_MC_REF_XREG_U128(pDst, ((bRm >> X86_MODRM_REG_SHIFT) & X86_MODRM_REG_SMASK) | pVCpu->iem.s.uRexReg); 248 IEM_MC_CALL_SSE_AIMPL_2(pImpl->pfnU128, pDst, pSrc); 249 250 IEM_MC_ADVANCE_RIP(); 251 IEM_MC_END(); 252 } 253 return VINF_SUCCESS; 254 } 255 256 144 257 /** Opcode 0x66 0x0f 0x38 0x29. */ 145 FNIEMOP_STUB(iemOp_pcmpeqq_Vx_Wx); 258 FNIEMOP_DEF(iemOp_pcmpeqq_Vx_Wx) 259 { 260 IEMOP_MNEMONIC2(RM, PCMPEQQ, pcmpeqq, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 261 return FNIEMOP_CALL_1(iemOpCommonSse41_FullFull_To_Full, 262 IEM_SELECT_HOST_OR_FALLBACK(fSse41, &g_iemAImpl_pcmpeqq, &g_iemAImpl_pcmpeqq_fallback)); 263 } 264 146 265 147 266 /** … … 212 331 FNIEMOP_STUB(iemOp_pmovzxdq_Vx_UxMq); 213 332 /* Opcode 0x66 0x0f 0x38 0x36 - invalid (vex only). */ 333 334 214 335 /** Opcode 0x66 0x0f 0x38 0x37. */ 215 FNIEMOP_STUB(iemOp_pcmpgtq_Vx_Wx); 336 FNIEMOP_DEF(iemOp_pcmpgtq_Vx_Wx) 337 { 338 IEMOP_MNEMONIC2(RM, PCMPGTQ, pcmpgtq, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 339 return FNIEMOP_CALL_1(iemOpCommonSse42_FullFull_To_Full, 340 IEM_SELECT_HOST_OR_FALLBACK(fSse42, &g_iemAImpl_pcmpgtq, &g_iemAImpl_pcmpgtq_fallback)); 341 } 342 343 216 344 /** Opcode 0x66 0x0f 0x38 0x38. */ 217 345 FNIEMOP_STUB(iemOp_pminsb_Vx_Wx); -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r95449 r95453 87 87 * Proper alignment of the 128-bit operand is enforced. 88 88 * Exceptions type 4. SSE2 cpuid checks. 89 * 90 * @sa iemOpCommonSse41_FullFull_To_Full, iemOpCommonSse2_FullFull_To_Full 89 91 */ 90 92 FNIEMOP_DEF_1(iemOpCommonSse2_FullFull_To_Full, PCIEMOPMEDIAF2, pImpl) -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap2.cpp.h
r95347 r95453 132 132 /** Opcode VEX.66.0F38 0x28. */ 133 133 FNIEMOP_STUB(iemOp_vpmuldq_Vx_Hx_Wx); 134 135 134 136 /** Opcode VEX.66.0F38 0x29. */ 135 FNIEMOP_STUB(iemOp_vpcmpeqq_Vx_Hx_Wx); 137 FNIEMOP_DEF(iemOp_vpcmpeqq_Vx_Hx_Wx) 138 { 139 IEMOP_MNEMONIC3(VEX_RVM, VPCMPEQQ, vpcmpeqq, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 140 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx, 141 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpcmpeqq, &g_iemAImpl_vpcmpeqq_fallback)); 142 } 136 143 137 144 … … 246 253 /* Opcode VEX.66.0F38 0x36. */ 247 254 FNIEMOP_STUB(iemOp_vpermd_Vqq_Hqq_Wqq); 255 256 248 257 /** Opcode VEX.66.0F38 0x37. */ 249 FNIEMOP_STUB(iemOp_vpcmpgtq_Vx_Hx_Wx); 258 FNIEMOP_DEF(iemOp_vpcmpgtq_Vx_Hx_Wx) 259 { 260 IEMOP_MNEMONIC3(VEX_RVM, VPCMPGTQ, vpcmpgtq, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0); 261 return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx, 262 IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &g_iemAImpl_vpcmpgtq, &g_iemAImpl_vpcmpgtq_fallback)); 263 } 264 265 250 266 /** Opcode VEX.66.0F38 0x38. */ 251 267 FNIEMOP_STUB(iemOp_vpminsb_Vx_Hx_Wx); -
trunk/src/VBox/VMM/include/IEMInternal.h
r95449 r95453 1750 1750 FNIEMAIMPLMEDIAF2U128 iemAImpl_pand_u128, iemAImpl_pandn_u128, iemAImpl_por_u128, iemAImpl_pxor_u128; 1751 1751 FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqb_u128, iemAImpl_pcmpeqw_u128, iemAImpl_pcmpeqd_u128; 1752 FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpeqq_u128, iemAImpl_pcmpeqq_u128_fallback; 1752 1753 FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtb_u128, iemAImpl_pcmpgtw_u128, iemAImpl_pcmpgtd_u128; 1754 FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback; 1753 1755 1754 1756 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpand_u128, iemAImpl_vpand_u128_fallback; … … 1759 1761 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqw_u128, iemAImpl_vpcmpeqw_u128_fallback; 1760 1762 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqd_u128, iemAImpl_vpcmpeqd_u128_fallback; 1763 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpeqq_u128, iemAImpl_vpcmpeqq_u128_fallback; 1761 1764 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtb_u128, iemAImpl_vpcmpgtb_u128_fallback; 1762 1765 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtw_u128, iemAImpl_vpcmpgtw_u128_fallback; 1763 1766 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtd_u128, iemAImpl_vpcmpgtd_u128_fallback; 1767 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpcmpgtq_u128, iemAImpl_vpcmpgtq_u128_fallback; 1764 1768 1765 1769 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpand_u256, iemAImpl_vpand_u256_fallback; … … 1770 1774 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqw_u256, iemAImpl_vpcmpeqw_u256_fallback; 1771 1775 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqd_u256, iemAImpl_vpcmpeqd_u256_fallback; 1776 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpeqq_u256, iemAImpl_vpcmpeqq_u256_fallback; 1772 1777 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtb_u256, iemAImpl_vpcmpgtb_u256_fallback; 1773 1778 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtw_u256, iemAImpl_vpcmpgtw_u256_fallback; 1774 1779 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtd_u256, iemAImpl_vpcmpgtd_u256_fallback; 1780 FNIEMAIMPLMEDIAF3U256 iemAImpl_vpcmpgtq_u256, iemAImpl_vpcmpgtq_u256_fallback; 1775 1781 /** @} */ 1776 1782 -
trunk/src/VBox/VMM/include/IEMMc.h
r95421 r95453 91 91 || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \ 92 92 || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse41) \ 93 return iemRaiseUndefinedOpcode(pVCpu); \ 94 if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \ 95 return iemRaiseDeviceNotAvailable(pVCpu); \ 96 } while (0) 97 #define IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT() \ 98 do { \ 99 if ( (pVCpu->cpum.GstCtx.cr0 & X86_CR0_EM) \ 100 || !(pVCpu->cpum.GstCtx.cr4 & X86_CR4_OSFXSR) \ 101 || !IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSse42) \ 93 102 return iemRaiseUndefinedOpcode(pVCpu); \ 94 103 if (pVCpu->cpum.GstCtx.cr0 & X86_CR0_TS) \ -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r95449 r95453 376 376 #define IEM_MC_MAYBE_RAISE_SSE3_RELATED_XCPT() do { (void)fMcBegin; } while (0) 377 377 #define IEM_MC_MAYBE_RAISE_SSE41_RELATED_XCPT() do { (void)fMcBegin; } while (0) 378 #define IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT() do { (void)fMcBegin; } while (0) 378 379 #define IEM_MC_MAYBE_RAISE_AVX_RELATED_XCPT() do { (void)fMcBegin; } while (0) 379 380 #define IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT() do { (void)fMcBegin; } while (0)
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