Changeset 95465 in vbox for trunk/src/VBox/ValidationKit
- Timestamp:
- Jul 1, 2022 12:44:40 AM (3 years ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 3 edited
-
bs3-cpu-instr-2-template.c (modified) (2 diffs)
-
bs3-cpu-instr-2-template.mac (modified) (2 diffs)
-
bs3-cpu-instr-2.c (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-template.c
r95357 r95465 198 198 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_EAX_FSxBX_icebp); 199 199 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_popcnt_RAX_FSxBX_icebp); 200 201 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_BL_icebp); 202 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_byte_FSxBX_icebp); 203 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_BX_icebp); 204 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_word_FSxBX_icebp); 205 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_EBX_icebp); 206 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_dword_FSxBX_icebp); 207 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_RBX_icebp); 208 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_qword_FSxBX_icebp); 200 209 201 210 # if ARCH_BITS == 64 … … 2470 2479 return 0; 2471 2480 } 2481 2482 /* 2483 * CRC32 - SSE4.2 2484 */ 2485 BS3_DECL_FAR(uint8_t) BS3_CMN_NM(bs3CpuInstr2_crc32)(uint8_t bMode) 2486 { 2487 typedef struct BS3CPUINSTR2_CRC32_VALUES_T 2488 { 2489 uint32_t uDstIn; 2490 uint32_t uDstOut; 2491 uint64_t uSrc; 2492 } BS3CPUINSTR2_CRC32_VALUES_T; 2493 static const BS3CPUINSTR2_CRC32_VALUES_T s_aValues1[] = 2494 { 2495 { UINT32_C(0000000000), UINT32_C(0000000000), UINT8_C(0000) }, 2496 { UINT32_C(0xffffffff), UINT32_C(0x25502c8c), UINT8_C(0xea) }, 2497 { UINT32_C(0x25502c8c), UINT32_C(0x474224a6), UINT8_C(0xea) }, 2498 { UINT32_C(0x474224a6), UINT32_C(0x0c7f9048), UINT8_C(0xea) }, 2499 { UINT32_C(0x0c7f9048), UINT32_C(0x39c5b9e0), UINT8_C(0x01) }, 2500 { UINT32_C(0x39c5b9e0), UINT32_C(0x2493fabc), UINT8_C(0x04) }, 2501 { UINT32_C(0x2493fabc), UINT32_C(0x0b05c4d6), UINT8_C(0x27) }, 2502 { UINT32_C(0x0b05c4d6), UINT32_C(0xbe26a561), UINT8_C(0x2a) }, 2503 { UINT32_C(0xbe26a561), UINT32_C(0xe1855652), UINT8_C(0x63) }, 2504 { UINT32_C(0xe1855652), UINT32_C(0xc67efe3f), UINT8_C(0xa7) }, 2505 { UINT32_C(0xc67efe3f), UINT32_C(0x227028cd), UINT8_C(0xfd) }, 2506 { UINT32_C(0x227028cd), UINT32_C(0xf4559a1d), UINT8_C(0xea) }, 2507 }; 2508 static const BS3CPUINSTR2_CRC32_VALUES_T s_aValues2[] = 2509 { 2510 { UINT32_C(0000000000), UINT32_C(0000000000), UINT16_C(000000) }, 2511 { UINT32_C(0xffffffff), UINT32_C(0xd550e2a0), UINT16_C(0x04d2) }, 2512 { UINT32_C(0xd550e2a0), UINT32_C(0x38e07a0a), UINT16_C(0xe8cc) }, 2513 { UINT32_C(0x38e07a0a), UINT32_C(0x60ebd519), UINT16_C(0x82a2) }, 2514 { UINT32_C(0x60ebd519), UINT32_C(0xaaa127b5), UINT16_C(0x0fff) }, 2515 { UINT32_C(0xaaa127b5), UINT32_C(0xb13175c6), UINT16_C(0x00ff) }, 2516 { UINT32_C(0xb13175c6), UINT32_C(0x3a226f1b), UINT16_C(0x0300) }, 2517 { UINT32_C(0x3a226f1b), UINT32_C(0xbaedef0c), UINT16_C(0x270f) }, 2518 { UINT32_C(0xbaedef0c), UINT32_C(0x2d18866e), UINT16_C(0x3ff6) }, 2519 { UINT32_C(0x2d18866e), UINT32_C(0x07e2e954), UINT16_C(0x9316) }, 2520 { UINT32_C(0x07e2e954), UINT32_C(0x95f82acb), UINT16_C(0xa59c) }, 2521 }; 2522 static const BS3CPUINSTR2_CRC32_VALUES_T s_aValues4[] = 2523 { 2524 { UINT32_C(0000000000), UINT32_C(0000000000), UINT32_C(0000000000) }, 2525 { UINT32_C(0xffffffff), UINT32_C(0xc9a7250e), UINT32_C(0x0270fa68) }, 2526 { UINT32_C(0xc9a7250e), UINT32_C(0x7340d175), UINT32_C(0x23729736) }, 2527 { UINT32_C(0x7340d175), UINT32_C(0x7e17b67d), UINT32_C(0x8bc75d35) }, 2528 { UINT32_C(0x7e17b67d), UINT32_C(0x5028eb71), UINT32_C(0x0e9bebf2) }, 2529 { UINT32_C(0x5028eb71), UINT32_C(0xc0a7f45a), UINT32_C(0x000001bc) }, 2530 { UINT32_C(0xc0a7f45a), UINT32_C(0xa96f4012), UINT32_C(0x0034ba02) }, 2531 { UINT32_C(0xa96f4012), UINT32_C(0xb27c0718), UINT32_C(0x0000002a) }, 2532 { UINT32_C(0xb27c0718), UINT32_C(0x79fb2d35), UINT32_C(0x0153158e) }, 2533 { UINT32_C(0x79fb2d35), UINT32_C(0x23434fc9), UINT32_C(0x02594882) }, 2534 { UINT32_C(0x23434fc9), UINT32_C(0x354bf3b6), UINT32_C(0xb230b8f3) }, 2535 }; 2536 #if ARCH_BITS >= 64 2537 static const BS3CPUINSTR2_CRC32_VALUES_T s_aValues8[] = 2538 { 2539 { UINT32_C(0000000000), UINT32_C(0000000000), UINT64_C(000000000000000000) }, 2540 { UINT32_C(0xffffffff), UINT32_C(0xadc36834), UINT64_C(0x02b0b5e2a975c1cc) }, 2541 { UINT32_C(0xadc36834), UINT32_C(0xf0e893c9), UINT64_C(0x823d386bf7517583) }, 2542 { UINT32_C(0xf0e893c9), UINT32_C(0x1a22a837), UINT64_C(0x0481f5311fa061d0) }, 2543 { UINT32_C(0x1a22a837), UINT32_C(0xcf8b6d61), UINT64_C(0x13fa70f64d52a92d) }, 2544 { UINT32_C(0xcf8b6d61), UINT32_C(0xc7dde203), UINT64_C(0x3ccc8b035903d3e1) }, 2545 { UINT32_C(0xc7dde203), UINT32_C(0xd42b5823), UINT64_C(0x0000011850ec2fac) }, 2546 { UINT32_C(0xd42b5823), UINT32_C(0x8b1ce49e), UINT64_C(0x0000000000001364) }, 2547 { UINT32_C(0x8b1ce49e), UINT32_C(0x1af31710), UINT64_C(0x000000057840205a) }, 2548 { UINT32_C(0x1af31710), UINT32_C(0xdea35e8b), UINT64_C(0x2e5d93688d9a0bfa) }, 2549 { UINT32_C(0xdea35e8b), UINT32_C(0x594c013a), UINT64_C(0x8ac7230489e7ffff) }, 2550 { UINT32_C(0x594c013a), UINT32_C(0x27b061e5), UINT64_C(0x6bf037ae325f1c71) }, 2551 { UINT32_C(0x27b061e5), UINT32_C(0x3120b5f7), UINT64_C(0x0fffffff34503556) }, 2552 }; 2553 #endif 2554 static const struct 2555 { 2556 FPFNBS3FAR pfnWorker; 2557 bool fMemSrc; 2558 uint8_t cbOp; 2559 uint8_t cValues; 2560 BS3CPUINSTR2_CRC32_VALUES_T const BS3_FAR *paValues; 2561 } s_aTests[] = 2562 { 2563 /* 8-bit register width */ 2564 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_BL_icebp), false, 1, RT_ELEMENTS(s_aValues1), s_aValues1 }, 2565 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_byte_FSxBX_icebp), true, 1, RT_ELEMENTS(s_aValues1), s_aValues1 }, 2566 2567 /* 16-bit register width */ 2568 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_BX_icebp), false, 2, RT_ELEMENTS(s_aValues2), s_aValues2 }, 2569 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_word_FSxBX_icebp), true, 2, RT_ELEMENTS(s_aValues2), s_aValues2 }, 2570 2571 /* 32-bit register width */ 2572 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_EBX_icebp), false, 4, RT_ELEMENTS(s_aValues4), s_aValues4 }, 2573 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_dword_FSxBX_icebp), true, 4, RT_ELEMENTS(s_aValues4), s_aValues4 }, 2574 #if ARCH_BITS >= 64 2575 /* 32-bit register width */ 2576 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_RBX_icebp), false, 8, RT_ELEMENTS(s_aValues8), s_aValues8 }, 2577 { BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_qword_FSxBX_icebp), true, 8, RT_ELEMENTS(s_aValues8), s_aValues8 }, 2578 #endif 2579 }; 2580 2581 BS3REGCTX Ctx; 2582 BS3TRAPFRAME TrapFrame; 2583 unsigned i, j; 2584 bool const fSupportsCrc32 = (g_uBs3CpuDetected & BS3CPU_F_CPUID) 2585 && (ASMCpuId_ECX(1) & X86_CPUID_FEATURE_ECX_SSE4_2); 2586 2587 /* Ensure the structures are allocated before we sample the stack pointer. */ 2588 Bs3MemSet(&Ctx, 0, sizeof(Ctx)); 2589 Bs3MemSet(&TrapFrame, 0, sizeof(TrapFrame)); 2590 2591 /* 2592 * Create test context. 2593 */ 2594 Bs3RegCtxSaveEx(&Ctx, bMode, 512); 2595 2596 /* 2597 * Do the tests twice, first with all flags set, then once again with 2598 * flags cleared. The flags are not supposed to be touched at all. 2599 */ 2600 Ctx.rflags.u16 |= X86_EFL_STATUS_BITS; 2601 for (j = 0; j < 2; j++) 2602 { 2603 for (i = 0; i < RT_ELEMENTS(s_aTests); i++) 2604 { 2605 uint8_t const cbOp = s_aTests[i].cbOp; 2606 unsigned const cValues = s_aTests[i].cValues; 2607 BS3CPUINSTR2_CRC32_VALUES_T const BS3_FAR *paValues = s_aTests[i].paValues; 2608 unsigned iValue; 2609 bool const fOkay = fSupportsCrc32; 2610 uint8_t const bExpectXcpt = fOkay ? X86_XCPT_DB : X86_XCPT_UD; 2611 uint64_t const uSrcGarbage = ( cbOp == 1 ? UINT64_C(0x03948314d0f03400) 2612 : cbOp == 2 ? UINT64_C(0x03948314d0f00000) 2613 : cbOp == 4 ? UINT64_C(0x0394831000000000) : 0) 2614 & (ARCH_BITS >= 64 ? UINT64_MAX : UINT32_MAX); 2615 uint64_t uExpectRip; 2616 2617 Bs3RegCtxSetRipCsFromCurPtr(&Ctx, s_aTests[i].pfnWorker); 2618 uExpectRip = Ctx.rip.u + (fOkay ? ((uint8_t const BS3_FAR *)s_aTests[i].pfnWorker)[-1] + 1 : 0); 2619 2620 for (iValue = 0; iValue < cValues; iValue++) 2621 { 2622 uint64_t const uExpectRax = fOkay ? paValues[iValue].uDstOut : paValues[iValue].uDstIn; 2623 uint64_t uMemSrc, uMemSrcExpect; 2624 2625 Ctx.rax.uCcXReg = paValues[iValue].uDstIn; 2626 if (!s_aTests[i].fMemSrc) 2627 { 2628 Ctx.rbx.u64 = paValues[iValue].uSrc | uSrcGarbage; 2629 uMemSrcExpect = uMemSrc = ~(paValues[iValue].uSrc | uSrcGarbage); 2630 } 2631 else 2632 { 2633 uMemSrcExpect = uMemSrc = paValues[iValue].uSrc | uSrcGarbage; 2634 Bs3RegCtxSetGrpSegFromCurPtr(&Ctx, &Ctx.rbx, &Ctx.fs, &uMemSrc); 2635 } 2636 2637 Bs3TrapSetJmpAndRestore(&Ctx, &TrapFrame); 2638 2639 if ( TrapFrame.bXcpt != bExpectXcpt 2640 || TrapFrame.Ctx.rip.u != uExpectRip 2641 || TrapFrame.Ctx.rbx.u != Ctx.rbx.u 2642 || TrapFrame.Ctx.rax.u != uExpectRax 2643 /* check that nothing else really changed: */ 2644 || TrapFrame.Ctx.rflags.u16 != Ctx.rflags.u16 2645 || TrapFrame.Ctx.rcx.u != Ctx.rcx.u 2646 || TrapFrame.Ctx.rdx.u != Ctx.rdx.u 2647 || TrapFrame.Ctx.rsp.u != Ctx.rsp.u 2648 || TrapFrame.Ctx.rbp.u != Ctx.rbp.u 2649 || TrapFrame.Ctx.rsi.u != Ctx.rsi.u 2650 || TrapFrame.Ctx.rdi.u != Ctx.rdi.u 2651 || uMemSrc != uMemSrcExpect 2652 ) 2653 { 2654 Bs3TestFailedF("test #%i value #%i failed: input %#RX32, %#RX64", 2655 i, iValue, paValues[iValue].uDstIn, paValues[iValue].uSrc); 2656 if (TrapFrame.bXcpt != bExpectXcpt) 2657 Bs3TestFailedF("Expected bXcpt = %#x, got %#x", bExpectXcpt, TrapFrame.bXcpt); 2658 if (TrapFrame.Ctx.rip.u != uExpectRip) 2659 Bs3TestFailedF("Expected RIP = %#06RX64, got %#06RX64", uExpectRip, TrapFrame.Ctx.rip.u); 2660 if (TrapFrame.Ctx.rax.u != uExpectRax) 2661 Bs3TestFailedF("Expected RAX = %#010RX64, got %#010RX64", uExpectRax, TrapFrame.Ctx.rax.u); 2662 if (TrapFrame.Ctx.rbx.u != Ctx.rbx.u) 2663 Bs3TestFailedF("Expected RBX = %#06RX64, got %#06RX64 (dst)", Ctx.rbx.u, TrapFrame.Ctx.rbx.u); 2664 2665 if (TrapFrame.Ctx.rflags.u16 != Ctx.rflags.u16) 2666 Bs3TestFailedF("Expected EFLAGS = %#06RX32, got %#06RX32", Ctx.rflags.u16, TrapFrame.Ctx.rflags.u16); 2667 if (TrapFrame.Ctx.rcx.u != Ctx.rcx.u) 2668 Bs3TestFailedF("Expected RCX = %#06RX64, got %#06RX64", Ctx.rcx.u, TrapFrame.Ctx.rcx.u); 2669 if (TrapFrame.Ctx.rdx.u != Ctx.rdx.u) 2670 Bs3TestFailedF("Expected RDX = %#06RX64, got %#06RX64 (src)", Ctx.rdx.u, TrapFrame.Ctx.rdx.u); 2671 if (TrapFrame.Ctx.rsp.u != Ctx.rsp.u) 2672 Bs3TestFailedF("Expected RSP = %#06RX64, got %#06RX64", Ctx.rsp.u, TrapFrame.Ctx.rsp.u); 2673 if (TrapFrame.Ctx.rbp.u != Ctx.rbp.u) 2674 Bs3TestFailedF("Expected RBP = %#06RX64, got %#06RX64", Ctx.rbp.u, TrapFrame.Ctx.rbp.u); 2675 if (TrapFrame.Ctx.rsi.u != Ctx.rsi.u) 2676 Bs3TestFailedF("Expected RSI = %#06RX64, got %#06RX64", Ctx.rsi.u, TrapFrame.Ctx.rsi.u); 2677 if (TrapFrame.Ctx.rdi.u != Ctx.rdi.u) 2678 Bs3TestFailedF("Expected RDI = %#06RX64, got %#06RX64", Ctx.rdi.u, TrapFrame.Ctx.rdi.u); 2679 if (uMemSrc != uMemSrcExpect) 2680 Bs3TestFailedF("Expected uMemSrc = %#06RX64, got %#06RX64", (uint64_t)uMemSrcExpect, (uint64_t)uMemSrc); 2681 } 2682 } 2683 } 2684 Ctx.rflags.u16 &= ~X86_EFL_STATUS_BITS; 2685 } 2686 2687 return 0; 2688 } 2689 2690 #if 0 /* Program for generating CRC32 value sets: */ 2691 #include <stdio.h> 2692 #include <stdint.h> 2693 #include <stdlib.h> 2694 2695 int main(int argc, char **argv) 2696 { 2697 int cbOp = atoi(argv[1]); 2698 uint32_t uBefore = atoi(argv[2]); 2699 int i = 3; 2700 while (i < argc) 2701 { 2702 unsigned long long uValue = strtoull(argv[i], NULL, 0); 2703 uint32_t uAfter = uBefore; 2704 switch (cbOp) 2705 { 2706 case 1: 2707 __asm__ __volatile__("crc32b %2, %0" : "=r" (uAfter) : "0" (uAfter), "r" ((uint8_t)uValue)); 2708 printf(" { UINT32_C(%#010x), UINT32_C(%#010x), UINT8_C(%#04x) },\n", 2709 uBefore, uAfter, (unsigned)(uint8_t)uValue); 2710 break; 2711 case 2: 2712 __asm__ __volatile__("crc32w %2, %0" : "=r" (uAfter) : "0" (uAfter), "r" ((uint16_t)uValue)); 2713 printf(" { UINT32_C(%#010x), UINT32_C(%#010x), UINT16_C(%#06x) },\n", 2714 uBefore, uAfter, (unsigned)(uint16_t)uValue); 2715 break; 2716 case 4: 2717 __asm__ __volatile__("crc32l %2, %0" : "=r" (uAfter) : "0" (uAfter), "r" ((uint32_t)uValue)); 2718 printf(" { UINT32_C(%#010x), UINT32_C(%#010x), UINT32_C(%#010x) },\n", 2719 uBefore, uAfter, (uint32_t)uValue); 2720 break; 2721 case 8: 2722 { 2723 uint64_t u64After = uBefore; 2724 __asm__ __volatile__("crc32q %2, %0" : "=r" (u64After) : "0" (u64After), "r" (uValue)); 2725 uAfter = (uint32_t)u64After; 2726 printf(" { UINT32_C(%#010x), UINT32_C(%#010x), UINT64_C(%#018llx) },\n", uBefore, uAfter, uValue); 2727 break; 2728 } 2729 } 2730 2731 /* next */ 2732 uBefore = uAfter; 2733 i++; 2734 } 2735 return 0; 2736 } 2737 #endif 2738 2472 2739 2473 2740 /* -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-template.mac
r95357 r95465 30 30 ;********************************************************************************************************************************* 31 31 %include "bs3kit-template-header.mac" ; setup environment 32 33 34 ;********************************************************************************************************************************* 35 ;* Defined Constants And Macros * 36 ;********************************************************************************************************************************* 37 ;; 38 ; Variant on BS3_PROC_BEGIN_CMN w/ BS3_PBC_NEAR that prefixes the function 39 ; with an instruction length byte. 40 ; 41 ; ASSUMES the length is between the start of the function and the .again label. 42 ; 43 %ifndef BS3CPUINSTR2_PROC_BEGIN_CMN_DEFINED 44 %define BS3CPUINSTR2_PROC_BEGIN_CMN_DEFINED 45 %macro BS3CPUINSTR2_PROC_BEGIN_CMN 1 46 align 8, db 0cch 47 db BS3_CMN_NM(%1).again - BS3_CMN_NM(%1) 48 BS3_PROC_BEGIN_CMN %1, BS3_PBC_NEAR 49 %endmacro 50 %endif 32 51 33 52 … … 546 565 547 566 567 ; 568 ; CRC32 569 ; 570 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_BL_icebp 571 crc32 eax, bl 572 .again: 573 icebp 574 jmp .again 575 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_BL_icebp 576 577 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_BX_icebp 578 crc32 eax, bx 579 .again: 580 icebp 581 jmp .again 582 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_BX_icebp 583 584 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_EBX_icebp 585 crc32 eax, ebx 586 .again: 587 icebp 588 jmp .again 589 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_EBX_icebp 590 591 %if TMPL_BITS == 64 592 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_RBX_icebp 593 crc32 rax, rbx 594 .again: 595 icebp 596 jmp .again 597 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_RBX_icebp 598 %endif 599 600 601 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_byte_FSxBX_icebp 602 crc32 eax, byte [fs:xBX] 603 .again: 604 icebp 605 jmp .again 606 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_byte_FSxBX_icebp 607 608 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_word_FSxBX_icebp 609 crc32 eax, word [fs:xBX] 610 .again: 611 icebp 612 jmp .again 613 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_word_FSxBX_icebp 614 615 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_dword_FSxBX_icebp 616 crc32 eax, dword [fs:xBX] 617 .again: 618 icebp 619 jmp .again 620 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_dword_FSxBX_icebp 621 622 %if TMPL_BITS == 64 623 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_crc32_EAX_qword_FSxBX_icebp 624 crc32 rax, qword [fs:xBX] 625 .again: 626 icebp 627 jmp .again 628 BS3_PROC_END_CMN bs3CpuInstr2_crc32_EAX_qword_FSxBX_icebp 629 %endif 630 548 631 549 632 ; -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2.c
r95357 r95465 55 55 BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_mulx); 56 56 BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_popcnt); 57 BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_crc32); 57 58 BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_cmpxchg16b); 58 59 BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_wrfsbase); … … 94 95 BS3TESTMODEENTRY_CMN("mulx", bs3CpuInstr2_mulx), 95 96 #endif 97 #if 1 96 98 BS3TESTMODEENTRY_CMN("popcnt", bs3CpuInstr2_popcnt), /* Intel: POPCNT; AMD: ABM */ 99 BS3TESTMODEENTRY_CMN("crc32", bs3CpuInstr2_crc32), /* SSE4.2 */ 100 #endif 97 101 #if 1 98 102 BS3TESTMODEENTRY_CMN_64("cmpxchg16b", bs3CpuInstr2_cmpxchg16b),
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