Changeset 95471 in vbox for trunk/src/VBox/ValidationKit/bootsectors
- Timestamp:
- Jul 1, 2022 11:19:45 AM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 152080
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 4 edited
-
bs3-cpu-instr-3-template.c (modified) (3 diffs)
-
bs3-cpu-instr-3-template.mac (modified) (1 diff)
-
bs3-cpu-instr-3.c (modified) (2 diffs)
-
bs3kit/bs3-cmn-TestCheckExtCtx.c (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.c
r95456 r95471 287 287 extern FNBS3FAR bs3CpuInstr3_vpcmpeqq_YMM10_YMM8_YMM15_icebp_c64; 288 288 289 290 289 /* [V]ADD[BWDQ] */ 291 290 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_paddb_MM1_MM2_icebp); … … 326 325 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpaddq_YMM2_YMM1_FSxBX_icebp); 327 326 extern FNBS3FAR bs3CpuInstr3_vpaddq_YMM10_YMM8_YMM15_icebp_c64; 327 328 /* [V]SUB[BWDQ] */ 329 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubb_MM1_MM2_icebp); 330 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubb_MM1_FSxBX_icebp); 331 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubb_XMM1_XMM2_icebp); 332 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubb_XMM1_FSxBX_icebp); 333 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubb_XMM1_XMM1_XMM2_icebp); 334 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubb_XMM1_XMM1_FSxBX_icebp); 335 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubb_YMM7_YMM2_YMM3_icebp); 336 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubb_YMM7_YMM2_FSxBX_icebp); 337 338 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubw_MM1_MM2_icebp); 339 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubw_MM1_FSxBX_icebp); 340 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubw_XMM1_XMM2_icebp); 341 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubw_XMM1_FSxBX_icebp); 342 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubw_XMM1_XMM1_XMM2_icebp); 343 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubw_XMM1_XMM1_FSxBX_icebp); 344 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubw_YMM1_YMM1_YMM2_icebp); 345 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubw_YMM1_YMM1_FSxBX_icebp); 346 347 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubd_MM1_MM2_icebp); 348 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubd_MM1_FSxBX_icebp); 349 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubd_XMM1_XMM2_icebp); 350 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubd_XMM1_FSxBX_icebp); 351 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubd_XMM2_XMM1_XMM0_icebp); 352 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubd_XMM2_XMM1_FSxBX_icebp); 353 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubd_YMM2_YMM1_YMM0_icebp); 354 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubd_YMM2_YMM1_FSxBX_icebp); 355 extern FNBS3FAR bs3CpuInstr3_vpsubd_YMM10_YMM8_YMM15_icebp_c64; 356 357 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubq_MM1_MM2_icebp); 358 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubq_MM1_FSxBX_icebp); 359 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubq_XMM1_XMM2_icebp); 360 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psubq_XMM1_FSxBX_icebp); 361 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubq_XMM2_XMM1_XMM0_icebp); 362 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubq_XMM2_XMM1_FSxBX_icebp); 363 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubq_YMM2_YMM1_YMM0_icebp); 364 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsubq_YMM2_YMM1_FSxBX_icebp); 365 extern FNBS3FAR bs3CpuInstr3_vpsubq_YMM10_YMM8_YMM15_icebp_c64; 328 366 329 367 … … 1847 1885 1848 1886 1887 /* 1888 * PSUBB, VPSUBB, PSUBW, VPSUBW, PSUBD, VPSUBD, PSUBQ, VPSUBQ. 1889 */ 1890 BS3_DECL_FAR(uint8_t) BS3_CMN_NM(bs3CpuInstr3_v_psubb_psubw_psubd_psubq)(uint8_t bMode) 1891 { 1892 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesB[] = 1893 { 1894 { RTUINT256_INIT_C(0, 0, 0, 0), 1895 /* + */ RTUINT256_INIT_C(0, 0, 0, 0), 1896 /* = */ RTUINT256_INIT_C(0, 0, 0, 0) }, 1897 { RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x5555666677778888), 1898 /* + */ RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000), 1899 /* = */ RTUINT256_INIT_C(0x8888888888887878, 0x8888888888888888, 0x8888888888888888, 0x8888888888887878) }, 1900 { RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 1901 /* + */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 1902 /* = */ RTUINT256_INIT_C(0xd1d4ed829d87bfbf, 0xbb687724da07174d, 0xd4dfbab3694dc721, 0xa777ed2d907b0342) }, 1903 }; 1904 1905 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesW[] = 1906 { 1907 { RTUINT256_INIT_C(0, 0, 0, 0), 1908 /* + */ RTUINT256_INIT_C(0, 0, 0, 0), 1909 /* = */ RTUINT256_INIT_C(0, 0, 0, 0) }, 1910 { RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x5555666677778888), 1911 /* + */ RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000), 1912 /* = */ RTUINT256_INIT_C(0x8888888888887778, 0x8888888888888888, 0x8888888888888888, 0x8888888888887778) }, 1913 { RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 1914 /* + */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 1915 /* = */ RTUINT256_INIT_C(0xd1d4ed829c87bebf, 0xba687724da07164d, 0xd3dfb9b3694dc721, 0xa777ed2d907b0342) }, 1916 }; 1917 1918 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesD[] = 1919 { 1920 { RTUINT256_INIT_C(0, 0, 0, 0), 1921 /* + */ RTUINT256_INIT_C(0, 0, 0, 0), 1922 /* = */ RTUINT256_INIT_C(0, 0, 0, 0) }, 1923 { RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x5555666677778888), 1924 /* + */ RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000), 1925 /* = */ RTUINT256_INIT_C(0x8888888888877778, 0x8888888888888888, 0x8888888888888888, 0x8888888888877778) }, 1926 { RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 1927 /* + */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 1928 /* = */ RTUINT256_INIT_C(0xd1d3ed829c86bebf, 0xba687724da07164d, 0xd3dfb9b3694cc721, 0xa776ed2d907b0342) }, 1929 }; 1930 1931 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesQ[] = 1932 { 1933 { RTUINT256_INIT_C(0, 0, 0, 0), 1934 /* + */ RTUINT256_INIT_C(0, 0, 0, 0), 1935 /* = */ RTUINT256_INIT_C(0, 0, 0, 0) }, 1936 { RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x5555666677778888), 1937 /* + */ RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000), 1938 /* = */ RTUINT256_INIT_C(0x8888888888877778, 0x8888888888888888, 0x8888888888888888, 0x8888888888877778) }, 1939 { RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 1940 /* + */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 1941 /* = */ RTUINT256_INIT_C(0xd1d3ed819c86bebf, 0xba687723da07164d, 0xd3dfb9b3694cc721, 0xa776ed2c907b0342) }, 1942 }; 1943 1944 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 1945 { 1946 { bs3CpuInstr3_psubb_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1947 { bs3CpuInstr3_psubb_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1948 { bs3CpuInstr3_psubb_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1949 { bs3CpuInstr3_psubb_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1950 { bs3CpuInstr3_vpsubb_XMM1_XMM1_XMM2_icebp_c16, 255, RM_REG, T_AVX_128, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1951 { bs3CpuInstr3_vpsubb_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1952 { bs3CpuInstr3_vpsubb_YMM7_YMM2_YMM3_icebp_c16, 255, RM_REG, T_AVX_256, 7, 2, 3, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1953 { bs3CpuInstr3_vpsubb_YMM7_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 7, 2, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1954 1955 { bs3CpuInstr3_psubw_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1956 { bs3CpuInstr3_psubw_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1957 { bs3CpuInstr3_psubw_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1958 { bs3CpuInstr3_psubw_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1959 { bs3CpuInstr3_vpsubw_XMM1_XMM1_XMM2_icebp_c16, 255, RM_REG, T_AVX_128, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1960 { bs3CpuInstr3_vpsubw_XMM1_XMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1961 { bs3CpuInstr3_vpsubw_YMM1_YMM1_YMM2_icebp_c16, 255, RM_REG, T_AVX_256, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1962 { bs3CpuInstr3_vpsubw_YMM1_YMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1963 1964 { bs3CpuInstr3_psubd_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1965 { bs3CpuInstr3_psubd_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1966 { bs3CpuInstr3_psubd_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1967 { bs3CpuInstr3_psubd_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1968 { bs3CpuInstr3_vpsubd_XMM2_XMM1_XMM0_icebp_c16, 255, RM_REG, T_AVX_128, 2, 1, 0, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1969 { bs3CpuInstr3_vpsubd_XMM2_XMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 2, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1970 { bs3CpuInstr3_vpsubd_YMM2_YMM1_YMM0_icebp_c16, 255, RM_REG, T_AVX_256, 2, 1, 0, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1971 { bs3CpuInstr3_vpsubd_YMM2_YMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 2, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 1972 1973 { bs3CpuInstr3_psubq_MM1_MM2_icebp_c16, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1974 { bs3CpuInstr3_psubq_MM1_FSxBX_icebp_c16, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1975 { bs3CpuInstr3_psubq_XMM1_XMM2_icebp_c16, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1976 { bs3CpuInstr3_psubq_XMM1_FSxBX_icebp_c16, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1977 { bs3CpuInstr3_vpsubq_XMM2_XMM1_XMM0_icebp_c16, 255, RM_REG, T_AVX_128, 2, 1, 0, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1978 { bs3CpuInstr3_vpsubq_XMM2_XMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 2, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1979 { bs3CpuInstr3_vpsubq_YMM2_YMM1_YMM0_icebp_c16, 255, RM_REG, T_AVX_256, 2, 1, 0, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1980 { bs3CpuInstr3_vpsubq_YMM2_YMM1_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_256, 2, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 1981 }; 1982 1983 # if ARCH_BITS >= 32 1984 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 1985 { 1986 { bs3CpuInstr3_psubb_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1987 { bs3CpuInstr3_psubb_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1988 { bs3CpuInstr3_psubb_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1989 { bs3CpuInstr3_psubb_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1990 { bs3CpuInstr3_vpsubb_XMM1_XMM1_XMM2_icebp_c32, 255, RM_REG, T_AVX_128, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1991 { bs3CpuInstr3_vpsubb_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1992 { bs3CpuInstr3_vpsubb_YMM7_YMM2_YMM3_icebp_c32, 255, RM_REG, T_AVX_256, 7, 2, 3, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1993 { bs3CpuInstr3_vpsubb_YMM7_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 7, 2, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 1994 1995 { bs3CpuInstr3_psubw_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1996 { bs3CpuInstr3_psubw_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1997 { bs3CpuInstr3_psubw_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1998 { bs3CpuInstr3_psubw_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 1999 { bs3CpuInstr3_vpsubw_XMM1_XMM1_XMM2_icebp_c32, 255, RM_REG, T_AVX_128, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2000 { bs3CpuInstr3_vpsubw_XMM1_XMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2001 { bs3CpuInstr3_vpsubw_YMM1_YMM1_YMM2_icebp_c32, 255, RM_REG, T_AVX_256, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2002 { bs3CpuInstr3_vpsubw_YMM1_YMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2003 2004 { bs3CpuInstr3_psubd_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2005 { bs3CpuInstr3_psubd_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2006 { bs3CpuInstr3_psubd_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2007 { bs3CpuInstr3_psubd_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2008 { bs3CpuInstr3_vpsubd_XMM2_XMM1_XMM0_icebp_c32, 255, RM_REG, T_AVX_128, 2, 1, 0, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2009 { bs3CpuInstr3_vpsubd_XMM2_XMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 2, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2010 { bs3CpuInstr3_vpsubd_YMM2_YMM1_YMM0_icebp_c32, 255, RM_REG, T_AVX_256, 2, 1, 0, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2011 { bs3CpuInstr3_vpsubd_YMM2_YMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 2, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2012 2013 { bs3CpuInstr3_psubq_MM1_MM2_icebp_c32, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2014 { bs3CpuInstr3_psubq_MM1_FSxBX_icebp_c32, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2015 { bs3CpuInstr3_psubq_XMM1_XMM2_icebp_c32, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2016 { bs3CpuInstr3_psubq_XMM1_FSxBX_icebp_c32, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2017 { bs3CpuInstr3_vpsubq_XMM2_XMM1_XMM0_icebp_c32, 255, RM_REG, T_AVX_128, 2, 1, 0, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2018 { bs3CpuInstr3_vpsubq_XMM2_XMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 2, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2019 { bs3CpuInstr3_vpsubq_YMM2_YMM1_YMM0_icebp_c32, 255, RM_REG, T_AVX_256, 2, 1, 0, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2020 { bs3CpuInstr3_vpsubq_YMM2_YMM1_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_256, 2, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2021 }; 2022 # endif 2023 # if ARCH_BITS >= 64 2024 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 2025 { 2026 { bs3CpuInstr3_psubb_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2027 { bs3CpuInstr3_psubb_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2028 { bs3CpuInstr3_psubb_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2029 { bs3CpuInstr3_psubb_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2030 { bs3CpuInstr3_vpsubb_XMM1_XMM1_XMM2_icebp_c64, 255, RM_REG, T_AVX_128, 1, 1, 2, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2031 { bs3CpuInstr3_vpsubb_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 1, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2032 { bs3CpuInstr3_vpsubb_YMM7_YMM2_YMM3_icebp_c64, 255, RM_REG, T_AVX_256, 7, 2, 3, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2033 { bs3CpuInstr3_vpsubb_YMM7_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 7, 2, 255, RT_ELEMENTS(s_aValuesB), s_aValuesB }, 2034 2035 { bs3CpuInstr3_psubw_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2036 { bs3CpuInstr3_psubw_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2037 { bs3CpuInstr3_psubw_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2038 { bs3CpuInstr3_psubw_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2039 { bs3CpuInstr3_vpsubw_XMM1_XMM1_XMM2_icebp_c64, 255, RM_REG, T_AVX_128, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2040 { bs3CpuInstr3_vpsubw_XMM1_XMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2041 { bs3CpuInstr3_vpsubw_YMM1_YMM1_YMM2_icebp_c64, 255, RM_REG, T_AVX_256, 1, 1, 2, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2042 { bs3CpuInstr3_vpsubw_YMM1_YMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 1, 1, 255, RT_ELEMENTS(s_aValuesW), s_aValuesW }, 2043 2044 { bs3CpuInstr3_psubd_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2045 { bs3CpuInstr3_psubd_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2046 { bs3CpuInstr3_psubd_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2047 { bs3CpuInstr3_psubd_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2048 { bs3CpuInstr3_vpsubd_XMM2_XMM1_XMM0_icebp_c64, 255, RM_REG, T_AVX_128, 2, 1, 0, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2049 { bs3CpuInstr3_vpsubd_XMM2_XMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 2, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2050 { bs3CpuInstr3_vpsubd_YMM2_YMM1_YMM0_icebp_c64, 255, RM_REG, T_AVX_256, 2, 1, 0, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2051 { bs3CpuInstr3_vpsubd_YMM2_YMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 2, 1, 255, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2052 { bs3CpuInstr3_vpsubd_YMM10_YMM8_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, 10, 8, 15, RT_ELEMENTS(s_aValuesD), s_aValuesD }, 2053 2054 { bs3CpuInstr3_psubq_MM1_MM2_icebp_c64, 255, RM_REG, T_MMX, 1, 1, 2, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2055 { bs3CpuInstr3_psubq_MM1_FSxBX_icebp_c64, 255, RM_MEM, T_MMX, 1, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2056 { bs3CpuInstr3_psubq_XMM1_XMM2_icebp_c64, 255, RM_REG, T_SSE2, 1, 1, 2, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2057 { bs3CpuInstr3_psubq_XMM1_FSxBX_icebp_c64, 255, RM_MEM, T_SSE2, 1, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2058 { bs3CpuInstr3_vpsubq_XMM2_XMM1_XMM0_icebp_c64, 255, RM_REG, T_AVX_128, 2, 1, 0, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2059 { bs3CpuInstr3_vpsubq_XMM2_XMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 2, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2060 { bs3CpuInstr3_vpsubq_YMM2_YMM1_YMM0_icebp_c64, 255, RM_REG, T_AVX_256, 2, 1, 0, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2061 { bs3CpuInstr3_vpsubq_YMM2_YMM1_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_256, 2, 1, 255, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2062 { bs3CpuInstr3_vpsubq_YMM10_YMM8_YMM15_icebp_c64, 255, RM_REG, T_AVX_256, 10, 8, 15, RT_ELEMENTS(s_aValuesQ), s_aValuesQ }, 2063 }; 2064 # endif 2065 2066 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 2067 unsigned const iTest = BS3CPUINSTR3_TEST1_MODES_INDEX(bMode); 2068 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 2069 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 2070 } 2071 2072 1849 2073 #endif /* BS3_INSTANTIATING_CMN */ 1850 2074 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac
r95456 r95471 344 344 EMIT_TYPE1_ONE_INSTR paddq, vpaddq, 1 345 345 346 EMIT_TYPE1_INSTR psubb, vpsubb, psubw, vpsubw, psubd, vpsubd, 1 347 EMIT_TYPE1_ONE_INSTR psubq, vpsubq, 1 348 346 349 %endif ; BS3_INSTANTIATING_CMN 347 350 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c
r95456 r95471 42 42 BS3TESTMODEBYMAX_PROTOTYPES_CMN(bs3CpuInstr3_v_pcmpeqb_pcmpeqw_pcmpeqd_pcmpeqq); 43 43 BS3TESTMODEBYMAX_PROTOTYPES_CMN(bs3CpuInstr3_v_paddb_paddw_paddd_paddq); 44 BS3TESTMODEBYMAX_PROTOTYPES_CMN(bs3CpuInstr3_v_psubb_psubw_psubd_psubq); 44 45 45 46 … … 61 62 #if 1 62 63 BS3TESTMODEBYMAXENTRY_CMN("[v]paddb/[v]paddw/[v]paddd/[v]paddq", bs3CpuInstr3_v_paddb_paddw_paddd_paddq), 64 BS3TESTMODEBYMAXENTRY_CMN("[v]psubb/[v]psubw/[v]psubd/[v]psubq", bs3CpuInstr3_v_psubb_psubw_psubd_psubq), 63 65 #endif 64 66 }; -
trunk/src/VBox/ValidationKit/bootsectors/bs3kit/bs3-cmn-TestCheckExtCtx.c
r95376 r95471 232 232 break; 233 233 case 4: 234 Bs3TestFailedF("%u - %s: D word difference at %#x (%s): %#010RX32, expected %#010RX32",234 Bs3TestFailedF("%u - %s: DWord difference at %#x (%s): %#010RX32, expected %#010RX32", 235 235 idTestStep, pszMode, offStart, pszName, 236 236 RT_MAKE_U32_FROM_U8(pb1[offStart], pb1[offStart + 1], pb1[offStart + 2], pb1[offStart + 3]), … … 238 238 break; 239 239 case 8: 240 Bs3TestFailedF("%u - %s: Q word difference at %#x (%s): %#018RX64, expected %#018RX64",240 Bs3TestFailedF("%u - %s: QWord difference at %#x (%s): %#018RX64, expected %#018RX64", 241 241 idTestStep, pszMode, offStart, pszName, 242 242 RT_MAKE_U64_FROM_U8(pb1[offStart], pb1[offStart + 1], pb1[offStart + 2], pb1[offStart + 3], … … 245 245 pb2[offStart + 4], pb2[offStart + 5], pb2[offStart + 6], pb2[offStart + 7])); 246 246 break; 247 case 16: 248 Bs3TestFailedF("%u - %s: DQword difference at %#x (%s): \n" 249 "got %#018RX64'%#018RX64\n" 250 "expected %#018RX64'%#018RX64", 251 idTestStep, pszMode, offStart, pszName, 252 RT_MAKE_U64_FROM_U8(pb1[offStart + 8], pb1[offStart + 9], pb1[offStart + 10], pb1[offStart + 11], 253 pb1[offStart + 12], pb1[offStart + 13], pb1[offStart + 14], pb1[offStart + 15]), 254 RT_MAKE_U64_FROM_U8(pb1[offStart], pb1[offStart + 1], pb1[offStart + 2], pb1[offStart + 3], 255 pb1[offStart + 4], pb1[offStart + 5], pb1[offStart + 6], pb1[offStart + 7]), 256 257 RT_MAKE_U64_FROM_U8(pb2[offStart + 8], pb2[offStart + 9], pb2[offStart + 10], pb2[offStart + 11], 258 pb2[offStart + 12], pb2[offStart + 13], pb2[offStart + 14], pb2[offStart + 15]), 259 RT_MAKE_U64_FROM_U8(pb2[offStart], pb2[offStart + 1], pb2[offStart + 2], pb2[offStart + 3], 260 pb2[offStart + 4], pb2[offStart + 5], pb2[offStart + 6], pb2[offStart + 7]) 261 ); 262 break; 263 247 264 default: 248 265 Bs3TestFailedF("%u - %s: %#x..%#x differs (%s)\n"
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