VirtualBox

Ignore:
Timestamp:
Jul 6, 2022 8:41:48 PM (3 years ago)
Author:
vboxsync
Message:

ValKit/bs3-cpu-instr-3: Simple [v]movhps & [v]movhpd tests. bugref:9898

Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

    r95536 r95538  
    10461046
    10471047;
     1048; [V]MOVHPS
     1049;
     1050EMIT_INSTR_PLUS_ICEBP movhps,  XMM1, FSxBX
     1051EMIT_INSTR_PLUS_ICEBP movhps,  FSxBX, XMM1
     1052EMIT_INSTR_PLUS_ICEBP vmovhps, XMM1, XMM2, FSxBX
     1053EMIT_INSTR_PLUS_ICEBP vmovhps, FSxBX, XMM1
     1054 %if TMPL_BITS == 64
     1055EMIT_INSTR_PLUS_ICEBP movhps,  XMM8, FSxBX
     1056EMIT_INSTR_PLUS_ICEBP movhps,  FSxBX, XMM11
     1057EMIT_INSTR_PLUS_ICEBP vmovhps, XMM10, XMM14, FSxBX
     1058EMIT_INSTR_PLUS_ICEBP vmovhps, FSxBX, XMM9
     1059 %endif
     1060
     1061;
     1062; [V]MOVHPD
     1063;
     1064EMIT_INSTR_PLUS_ICEBP movhpd,  XMM1, FSxBX
     1065EMIT_INSTR_PLUS_ICEBP movhpd,  FSxBX, XMM1
     1066EMIT_INSTR_PLUS_ICEBP vmovhpd, XMM1, XMM2, FSxBX
     1067EMIT_INSTR_PLUS_ICEBP vmovhpd, FSxBX, XMM1
     1068 %if TMPL_BITS == 64
     1069EMIT_INSTR_PLUS_ICEBP movhpd,  XMM8, FSxBX
     1070EMIT_INSTR_PLUS_ICEBP movhpd,  FSxBX, XMM11
     1071EMIT_INSTR_PLUS_ICEBP vmovhpd, XMM10, XMM14, FSxBX
     1072EMIT_INSTR_PLUS_ICEBP vmovhpd, FSxBX, XMM9
     1073 %endif
     1074
     1075;
    10481076; [V]MOVHLPS
    10491077;

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32

    r95536 r95538  
    35423542 *             from memory with the high qword from a register (SSE destination
    35433543 *             or VEX 2nd source).
    3544  *             The store variant just stores the lower qword.
     3544 *             The store variant just stores the high qword.
    35453545 * [V]MOVLPD - Same, just using double precision floating-point unit.
    35463546 */
    … …  
    36393639        {  bs3CpuInstr3_vmovlpd_FSxBX_XMM1_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
    36403640        {  bs3CpuInstr3_vmovlpd_FSxBX_XMM9_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   9, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3641    };
     3642    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
     3643    unsigned const                         iTest       = BS3CPUINSTR3_TEST_MODES_INDEX(bMode);
     3644    return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
     3645                                        g_aXcptConfig5, RT_ELEMENTS(g_aXcptConfig5));
     3646}
     3647
     3648
     3649/*
     3650 * [V]MOVHPS - Merge a high qword (two single precision floating-point values)
     3651 *             from memory with the low qword from a register (SSE destination
     3652 *             or VEX 2nd source).
     3653 *             The store variant just stores the high qword.
     3654 * [V]MOVHPD - Same, just using double precision floating-point unit.
     3655 */
     3656BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_movhps_XMM1_FSxBX_icebp);
     3657BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_movhps_FSxBX_XMM1_icebp);
     3658BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vmovhps_XMM1_XMM2_FSxBX_icebp);
     3659BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vmovhps_FSxBX_XMM1_icebp);
     3660extern FNBS3FAR             bs3CpuInstr3_movhps_XMM8_FSxBX_icebp_c64;
     3661extern FNBS3FAR             bs3CpuInstr3_movhps_FSxBX_XMM11_icebp_c64;
     3662extern FNBS3FAR             bs3CpuInstr3_vmovhps_XMM10_XMM14_FSxBX_icebp_c64;
     3663extern FNBS3FAR             bs3CpuInstr3_vmovhps_FSxBX_XMM9_icebp_c64;
     3664
     3665BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_movhpd_XMM1_FSxBX_icebp);
     3666BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_movhpd_FSxBX_XMM1_icebp);
     3667BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vmovhpd_XMM1_XMM2_FSxBX_icebp);
     3668BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vmovhpd_FSxBX_XMM1_icebp);
     3669extern FNBS3FAR             bs3CpuInstr3_movhpd_XMM8_FSxBX_icebp_c64;
     3670extern FNBS3FAR             bs3CpuInstr3_movhpd_FSxBX_XMM11_icebp_c64;
     3671extern FNBS3FAR             bs3CpuInstr3_vmovhpd_XMM10_XMM14_FSxBX_icebp_c64;
     3672extern FNBS3FAR             bs3CpuInstr3_vmovhpd_FSxBX_XMM9_icebp_c64;
     3673
     3674BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_movhps_movhpd(uint8_t bMode)
     3675{
     3676    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesLd[] =
     3677    {
     3678        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     3679            /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0),
     3680            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     3681        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     3682            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     3683            /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0xc1c2c3c4c5c6c7c8, 0x8182838485868788) },
     3684        {   /*src2*/ RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x5555666677778888),
     3685            /*src1*/ RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000),
     3686            /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x5555666677778888, 0xddddeeeeffff0000) },
     3687        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     3688            /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     3689            /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x9c5ce073930996bb, 0x43d3cda0238499fd) },
     3690    };
     3691    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesSt[] =
     3692    {
     3693        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     3694            /*ign*/  RTUINT256_INIT_C(0, 0, 0, 0),
     3695            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     3696        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     3697            /*ign*/  RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     3698            /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xd1d2d3d4d5d6d7d8) },
     3699        {   /*src2*/ RTUINT256_INIT_C(0x5555666677778888, 0x1111222233334444, 0x1111222233334444, 0x81828384c5c6c7c8),
     3700            /*ign*/  RTUINT256_INIT_C(0xddddeeeeffff0000, 0x9999aaaabbbbcccc, 0x9999aaaabbbbcccc, 0xddddeeeeffff0000),
     3701            /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x1111222233334444) },
     3702        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     3703            /*ign*/  RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     3704            /* => */ RTUINT256_INIT_C(0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0xb4212fa8564c9ba2) },
     3705    };
     3706
     3707    static BS3CPUINSTR3_TEST1_T const s_aTests16[] =
     3708    {
     3709        {  bs3CpuInstr3_movhps_XMM1_FSxBX_icebp_c16,        X86_XCPT_AC, RM_MEM64, T_SSE,         1,   1, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3710        {  bs3CpuInstr3_movhps_FSxBX_XMM1_icebp_c16,        X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3711        {  bs3CpuInstr3_movhpd_XMM1_FSxBX_icebp_c16,        X86_XCPT_AC, RM_MEM64, T_SSE,         1,   1, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3712        {  bs3CpuInstr3_movhpd_FSxBX_XMM1_icebp_c16,        X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3713
     3714        {  bs3CpuInstr3_vmovhps_XMM1_XMM2_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM64, T_AVX_128,     1,   2, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3715        {  bs3CpuInstr3_vmovhps_FSxBX_XMM1_icebp_c16,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3716        {  bs3CpuInstr3_vmovhpd_XMM1_XMM2_FSxBX_icebp_c16,  X86_XCPT_AC, RM_MEM64, T_AVX_128,     1,   2, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3717        {  bs3CpuInstr3_vmovhpd_FSxBX_XMM1_icebp_c16,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3718    };
     3719    static BS3CPUINSTR3_TEST1_T const s_aTests32[] =
     3720    {
     3721        {  bs3CpuInstr3_movhps_XMM1_FSxBX_icebp_c32,        X86_XCPT_AC, RM_MEM64, T_SSE,         1,   1, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3722        {  bs3CpuInstr3_movhps_FSxBX_XMM1_icebp_c32,        X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3723        {  bs3CpuInstr3_movhpd_XMM1_FSxBX_icebp_c32,        X86_XCPT_AC, RM_MEM64, T_SSE,         1,   1, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3724        {  bs3CpuInstr3_movhpd_FSxBX_XMM1_icebp_c32,        X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3725
     3726        {  bs3CpuInstr3_vmovhps_XMM1_XMM2_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM64, T_AVX_128,     1,   2, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3727        {  bs3CpuInstr3_vmovhps_FSxBX_XMM1_icebp_c32,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3728        {  bs3CpuInstr3_vmovhpd_XMM1_XMM2_FSxBX_icebp_c32,  X86_XCPT_AC, RM_MEM64, T_AVX_128,     1,   2, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3729        {  bs3CpuInstr3_vmovhpd_FSxBX_XMM1_icebp_c32,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3730    };
     3731    static BS3CPUINSTR3_TEST1_T const s_aTests64[] =
     3732    {
     3733        {  bs3CpuInstr3_movhps_XMM1_FSxBX_icebp_c64,        X86_XCPT_AC, RM_MEM64, T_SSE,         1,   1, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3734        {  bs3CpuInstr3_movhps_XMM8_FSxBX_icebp_c64,        X86_XCPT_AC, RM_MEM64, T_SSE,         8,   8, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3735        {  bs3CpuInstr3_movhps_FSxBX_XMM1_icebp_c64,        X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3736        {  bs3CpuInstr3_movhps_FSxBX_XMM11_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,  11, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3737        {  bs3CpuInstr3_movhpd_XMM1_FSxBX_icebp_c64,        X86_XCPT_AC, RM_MEM64, T_SSE,         1,   1, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3738        {  bs3CpuInstr3_movhpd_XMM8_FSxBX_icebp_c64,        X86_XCPT_AC, RM_MEM64, T_SSE,         8,   8, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3739        {  bs3CpuInstr3_movhpd_FSxBX_XMM1_icebp_c64,        X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3740        {  bs3CpuInstr3_movhpd_FSxBX_XMM11_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_SSE,       255, 128,  11, RT_ELEMENTS(s_aValuesSt), s_aValuesSt },
     3741
     3742        {  bs3CpuInstr3_vmovhps_XMM1_XMM2_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM64, T_AVX_128,     1,   2, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3743        {  bs3CpuInstr3_vmovhps_XMM10_XMM14_FSxBX_icebp_c64,X86_XCPT_AC, RM_MEM64, T_AVX_128,    10,  14, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3744        {  bs3CpuInstr3_vmovhps_FSxBX_XMM1_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3745        {  bs3CpuInstr3_vmovhps_FSxBX_XMM9_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   9, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3746        {  bs3CpuInstr3_vmovhpd_XMM1_XMM2_FSxBX_icebp_c64,  X86_XCPT_AC, RM_MEM64, T_AVX_128,     1,   2, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3747        {  bs3CpuInstr3_vmovhpd_XMM10_XMM14_FSxBX_icebp_c64,X86_XCPT_AC, RM_MEM64, T_AVX_128,    10,  14, 255, RT_ELEMENTS(s_aValuesLd), s_aValuesLd },
     3748        {  bs3CpuInstr3_vmovhpd_FSxBX_XMM1_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   1, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
     3749        {  bs3CpuInstr3_vmovhpd_FSxBX_XMM9_icebp_c64,       X86_XCPT_AC, RM_MEM64, T_AVX_128,   255, 128,   9, RT_ELEMENTS(s_aValuesSt), s_aValuesSt},
    36413750    };
    36423751    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    50805189        { "[v]movss",                                       bs3CpuInstr3_v_movss, 0 },
    50815190        { "[v]movsd",                                       bs3CpuInstr3_v_movsd, 0 },
    5082         { "[v]vmovhlps",                                    bs3CpuInstr3_v_movhlps, 0 },
     5191        { "[v]movhlps",                                     bs3CpuInstr3_v_movhlps, 0 },
    50835192        { "[v]movlps/[v]movlpd",                            bs3CpuInstr3_v_movlps_movlpd, 0 },
    5084 #endif
    50855193        { "[v]movsldup",                                    bs3CpuInstr3_v_movsldup, 0 },
    50865194        { "[v]movddup",                                     bs3CpuInstr3_v_movddup, 0 },
     5195#endif
     5196        { "[v]movhps/[v]movhpd",                            bs3CpuInstr3_v_movhps_movhpd, 0 },
     5197
    50875198    };
    50885199    Bs3TestInit("bs3-cpu-instr-3");
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