- Timestamp:
- Jul 29, 2022 12:01:11 PM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 152695
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r95578 r95940 3618 3618 IEMIMPL_MEDIA_F2 paddd, 1 3619 3619 IEMIMPL_MEDIA_F2 paddq, 1 3620 IEMIMPL_MEDIA_F2 paddsb, 1 3621 IEMIMPL_MEDIA_F2 paddsw, 1 3622 IEMIMPL_MEDIA_F2 paddusb, 1 3623 IEMIMPL_MEDIA_F2 paddusw, 1 3620 3624 IEMIMPL_MEDIA_F2 psubb, 1 3621 3625 IEMIMPL_MEDIA_F2 psubw, 1 3622 3626 IEMIMPL_MEDIA_F2 psubd, 1 3623 3627 IEMIMPL_MEDIA_F2 psubq, 1 3624 3628 IEMIMPL_MEDIA_F2 psubsb, 1 3629 IEMIMPL_MEDIA_F2 psubsw, 1 3630 IEMIMPL_MEDIA_F2 psubusb, 1 3631 IEMIMPL_MEDIA_F2 psubusw, 1 3632 IEMIMPL_MEDIA_F2 pmullw, 1 3633 IEMIMPL_MEDIA_F2 pmulhw, 1 3634 IEMIMPL_MEDIA_F2 pmaddwd, 1 3625 3635 3626 3636 ;; … … 3667 3677 IEMIMPL_MEDIA_OPT_F2 packuswb, 1 3668 3678 IEMIMPL_MEDIA_OPT_F2 packusdw, 0 3679 IEMIMPL_MEDIA_OPT_F2 psllw, 1 3680 IEMIMPL_MEDIA_OPT_F2 pslld, 1 3681 IEMIMPL_MEDIA_OPT_F2 psllq, 1 3682 IEMIMPL_MEDIA_OPT_F2 psrlw, 1 3683 IEMIMPL_MEDIA_OPT_F2 psrld, 1 3684 IEMIMPL_MEDIA_OPT_F2 psrlq, 1 3685 IEMIMPL_MEDIA_OPT_F2 psraw, 1 3686 IEMIMPL_MEDIA_OPT_F2 psrad, 1 3669 3687 3670 3688 … … 3897 3915 IEMIMPL_MEDIA_AVX_VPSHUFXX vpshuflw 3898 3916 IEMIMPL_MEDIA_AVX_VPSHUFXX vpshufd 3917 3918 3919 ; 3920 ; Shifts with evil 8-bit immediates. 3921 ; 3922 3923 %macro IEMIMPL_MEDIA_MMX_PSHIFTXX 1 3924 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _imm_u64, 16 3925 PROLOGUE_2_ARGS 3926 IEMIMPL_MMX_PROLOGUE 3927 3928 movq mm0, [A0] 3929 lea T0, [A1 + A1*4] ; sizeof(psXX+ret) == 5 3930 lea T1, [.imm0 xWrtRIP] 3931 lea T1, [T1 + T0] 3932 call T1 3933 movq [A0], mm0 3934 3935 IEMIMPL_MMX_EPILOGUE 3936 EPILOGUE_2_ARGS 3937 %assign bImm 0 3938 %rep 256 3939 .imm %+ bImm: 3940 %1 mm0, bImm 3941 ret 3942 %assign bImm bImm + 1 3943 %endrep 3944 .immEnd: ; 256*5 == 0x500 3945 dw 0xfaff + (.immEnd - .imm0) ; will cause warning if entries are too big. 3946 dw 0x104ff - (.immEnd - .imm0) ; will cause warning if entries are too small. 3947 ENDPROC iemAImpl_ %+ %1 %+ _imm_u64 3948 %endmacro 3949 3950 IEMIMPL_MEDIA_MMX_PSHIFTXX psllw 3951 IEMIMPL_MEDIA_MMX_PSHIFTXX pslld 3952 IEMIMPL_MEDIA_MMX_PSHIFTXX psllq 3953 IEMIMPL_MEDIA_MMX_PSHIFTXX psrlw 3954 IEMIMPL_MEDIA_MMX_PSHIFTXX psrld 3955 IEMIMPL_MEDIA_MMX_PSHIFTXX psrlq 3956 IEMIMPL_MEDIA_MMX_PSHIFTXX psraw 3957 IEMIMPL_MEDIA_MMX_PSHIFTXX psrad 3958 3959 3960 %macro IEMIMPL_MEDIA_SSE_PSHIFTXX 1 3961 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _imm_u128, 16 3962 PROLOGUE_2_ARGS 3963 IEMIMPL_SSE_PROLOGUE 3964 3965 movdqu xmm0, [A0] 3966 lea T1, [.imm0 xWrtRIP] 3967 lea T0, [A1 + A1*2] ; sizeof(psXX+ret) == 6: (A3 * 3) *2 3968 lea T1, [T1 + T0*2] 3969 call T1 3970 movdqu [A0], xmm0 3971 3972 IEMIMPL_SSE_EPILOGUE 3973 EPILOGUE_2_ARGS 3974 %assign bImm 0 3975 %rep 256 3976 .imm %+ bImm: 3977 %1 xmm0, bImm 3978 ret 3979 %assign bImm bImm + 1 3980 %endrep 3981 .immEnd: ; 256*6 == 0x600 3982 dw 0xf9ff + (.immEnd - .imm0) ; will cause warning if entries are too big. 3983 dw 0x105ff - (.immEnd - .imm0) ; will cause warning if entries are too small. 3984 ENDPROC iemAImpl_ %+ %1 %+ _imm_u128 3985 %endmacro 3986 3987 IEMIMPL_MEDIA_SSE_PSHIFTXX psllw 3988 IEMIMPL_MEDIA_SSE_PSHIFTXX pslld 3989 IEMIMPL_MEDIA_SSE_PSHIFTXX psllq 3990 IEMIMPL_MEDIA_SSE_PSHIFTXX psrlw 3991 IEMIMPL_MEDIA_SSE_PSHIFTXX psrld 3992 IEMIMPL_MEDIA_SSE_PSHIFTXX psrlq 3993 IEMIMPL_MEDIA_SSE_PSHIFTXX psraw 3994 IEMIMPL_MEDIA_SSE_PSHIFTXX psrad 3995 IEMIMPL_MEDIA_SSE_PSHIFTXX pslldq 3996 IEMIMPL_MEDIA_SSE_PSHIFTXX psrldq 3899 3997 3900 3998 -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r95643 r95940 7804 7804 #endif 7805 7805 7806 7806 7807 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddb_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, 7807 7808 PCRTUINT128U puSrc1, PCRTUINT128U puSrc2)) … … 7866 7867 7867 7868 /* 7869 * PADDSB / VPADDSB 7870 */ 7871 #define SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(a_iWord) \ 7872 ( (uint16_t)((a_iWord) + 0x80) <= (uint16_t)0xff \ 7873 ? (uint8_t)(a_iWord) \ 7874 : (uint8_t)0x7f + (uint8_t)(((a_iWord) >> 15) & 1) ) /* 0x7f = INT8_MAX; 0x80 = INT8_MIN; source bit 15 = sign */ 7875 7876 #ifdef IEM_WITHOUT_ASSEMBLY 7877 7878 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 7879 { 7880 RT_NOREF(pFpuState); 7881 RTUINT64U uSrc1 = { *puDst }; 7882 RTUINT64U uSrc2 = { *puSrc }; 7883 RTUINT64U uDst; 7884 uDst.au8[0] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[0] + uSrc2.ai8[0]); 7885 uDst.au8[1] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[1] + uSrc2.ai8[1]); 7886 uDst.au8[2] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[2] + uSrc2.ai8[2]); 7887 uDst.au8[3] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[3] + uSrc2.ai8[3]); 7888 uDst.au8[4] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[4] + uSrc2.ai8[4]); 7889 uDst.au8[5] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[5] + uSrc2.ai8[5]); 7890 uDst.au8[6] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[6] + uSrc2.ai8[6]); 7891 uDst.au8[7] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[7] + uSrc2.ai8[7]); 7892 *puDst = uDst.u; 7893 } 7894 7895 7896 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7897 { 7898 RT_NOREF(pFpuState); 7899 RTUINT128U uSrc1 = *puDst; 7900 puDst->au8[0] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[0] + puSrc->ai8[0]); 7901 puDst->au8[1] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[1] + puSrc->ai8[1]); 7902 puDst->au8[2] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[2] + puSrc->ai8[2]); 7903 puDst->au8[3] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[3] + puSrc->ai8[3]); 7904 puDst->au8[4] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[4] + puSrc->ai8[4]); 7905 puDst->au8[5] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[5] + puSrc->ai8[5]); 7906 puDst->au8[6] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[6] + puSrc->ai8[6]); 7907 puDst->au8[7] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[7] + puSrc->ai8[7]); 7908 puDst->au8[8] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[8] + puSrc->ai8[8]); 7909 puDst->au8[9] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[9] + puSrc->ai8[9]); 7910 puDst->au8[10] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[10] + puSrc->ai8[10]); 7911 puDst->au8[11] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[11] + puSrc->ai8[11]); 7912 puDst->au8[12] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[12] + puSrc->ai8[12]); 7913 puDst->au8[13] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[13] + puSrc->ai8[13]); 7914 puDst->au8[14] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[14] + puSrc->ai8[14]); 7915 puDst->au8[15] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[15] + puSrc->ai8[15]); 7916 } 7917 7918 #endif 7919 7920 7921 /* 7922 * PADDSB / VPADDSB 7923 */ 7924 #define SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(a_uWord) \ 7925 ( (uint16_t)(a_uWord) <= (uint16_t)0xff \ 7926 ? (uint8_t)(a_uWord) \ 7927 : (uint8_t)0xff ) /* 0xff = UINT8_MAX */ 7928 7929 #ifdef IEM_WITHOUT_ASSEMBLY 7930 7931 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 7932 { 7933 RT_NOREF(pFpuState); 7934 RTUINT64U uSrc1 = { *puDst }; 7935 RTUINT64U uSrc2 = { *puSrc }; 7936 RTUINT64U uDst; 7937 uDst.au8[0] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[0] + uSrc2.au8[0]); 7938 uDst.au8[1] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[1] + uSrc2.au8[1]); 7939 uDst.au8[2] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[2] + uSrc2.au8[2]); 7940 uDst.au8[3] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[3] + uSrc2.au8[3]); 7941 uDst.au8[4] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[4] + uSrc2.au8[4]); 7942 uDst.au8[5] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[5] + uSrc2.au8[5]); 7943 uDst.au8[6] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[6] + uSrc2.au8[6]); 7944 uDst.au8[7] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[7] + uSrc2.au8[7]); 7945 *puDst = uDst.u; 7946 } 7947 7948 7949 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 7950 { 7951 RT_NOREF(pFpuState); 7952 RTUINT128U uSrc1 = *puDst; 7953 puDst->au8[0] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[0] + puSrc->au8[0]); 7954 puDst->au8[1] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[1] + puSrc->au8[1]); 7955 puDst->au8[2] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[2] + puSrc->au8[2]); 7956 puDst->au8[3] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[3] + puSrc->au8[3]); 7957 puDst->au8[4] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[4] + puSrc->au8[4]); 7958 puDst->au8[5] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[5] + puSrc->au8[5]); 7959 puDst->au8[6] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[6] + puSrc->au8[6]); 7960 puDst->au8[7] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[7] + puSrc->au8[7]); 7961 puDst->au8[8] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[8] + puSrc->au8[8]); 7962 puDst->au8[9] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[9] + puSrc->au8[9]); 7963 puDst->au8[10] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[10] + puSrc->au8[10]); 7964 puDst->au8[11] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[11] + puSrc->au8[11]); 7965 puDst->au8[12] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[12] + puSrc->au8[12]); 7966 puDst->au8[13] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[13] + puSrc->au8[13]); 7967 puDst->au8[14] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[14] + puSrc->au8[14]); 7968 puDst->au8[15] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE(uSrc1.au8[15] + puSrc->au8[15]); 7969 } 7970 7971 #endif 7972 7973 7974 /* 7868 7975 * PADDW / VPADDW 7869 7976 */ … … 7899 8006 7900 8007 #endif 8008 7901 8009 7902 8010 IEM_DECL_IMPL_DEF(void, iemAImpl_vpaddw_u128_fallback,(PX86XSAVEAREA pExtState, PRTUINT128U puDst, … … 7935 8043 puDst->au16[15] = puSrc1->au16[15] + puSrc2->au16[15]; 7936 8044 } 8045 8046 8047 /* 8048 * PADDSW / VPADDSW 8049 */ 8050 #define SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(a_iDword) \ 8051 ( (uint32_t)((a_iDword) + 0x8000) <= (uint16_t)0xffff \ 8052 ? (uint16_t)(a_iDword) \ 8053 : (uint16_t)0x7fff + (uint16_t)(((a_iDword) >> 31) & 1) ) /* 0x7fff = INT16_MAX; 0x8000 = INT16_MIN; source bit 31 = sign */ 8054 8055 #ifdef IEM_WITHOUT_ASSEMBLY 8056 8057 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8058 { 8059 RT_NOREF(pFpuState); 8060 RTUINT64U uSrc1 = { *puDst }; 8061 RTUINT64U uSrc2 = { *puSrc }; 8062 RTUINT64U uDst; 8063 uDst.au16[0] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[0] + uSrc2.ai16[0]); 8064 uDst.au16[1] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[1] + uSrc2.ai16[1]); 8065 uDst.au16[2] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[2] + uSrc2.ai16[2]); 8066 uDst.au16[3] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[3] + uSrc2.ai16[3]); 8067 *puDst = uDst.u; 8068 } 8069 8070 8071 IEM_DECL_IMPL_DEF(void, iemAImpl_paddsw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8072 { 8073 RT_NOREF(pFpuState); 8074 RTUINT128U uSrc1 = *puDst; 8075 puDst->au16[0] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[0] + puSrc->ai16[0]); 8076 puDst->au16[1] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[1] + puSrc->ai16[1]); 8077 puDst->au16[2] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[2] + puSrc->ai16[2]); 8078 puDst->au16[3] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[3] + puSrc->ai16[3]); 8079 puDst->au16[4] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[4] + puSrc->ai16[4]); 8080 puDst->au16[5] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[5] + puSrc->ai16[5]); 8081 puDst->au16[6] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[6] + puSrc->ai16[6]); 8082 puDst->au16[7] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[7] + puSrc->ai16[7]); 8083 } 8084 8085 #endif 8086 8087 8088 /* 8089 * PADDUSW / VPADDUSW 8090 */ 8091 #define SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(a_uDword) \ 8092 ( (uint32_t)(a_uDword) <= (uint16_t)0xffff \ 8093 ? (uint16_t)(a_uDword) \ 8094 : (uint16_t)0xffff ) /* 0xffff = UINT16_MAX */ 8095 8096 #ifdef IEM_WITHOUT_ASSEMBLY 8097 8098 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8099 { 8100 RT_NOREF(pFpuState); 8101 RTUINT64U uSrc1 = { *puDst }; 8102 RTUINT64U uSrc2 = { *puSrc }; 8103 RTUINT64U uDst; 8104 uDst.au16[0] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[0] + uSrc2.au16[0]); 8105 uDst.au16[1] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[1] + uSrc2.au16[1]); 8106 uDst.au16[2] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[2] + uSrc2.au16[2]); 8107 uDst.au16[3] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[3] + uSrc2.au16[3]); 8108 *puDst = uDst.u; 8109 } 8110 8111 8112 IEM_DECL_IMPL_DEF(void, iemAImpl_paddusw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8113 { 8114 RT_NOREF(pFpuState); 8115 RTUINT128U uSrc1 = *puDst; 8116 puDst->au16[0] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[0] + puSrc->au16[0]); 8117 puDst->au16[1] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[1] + puSrc->au16[1]); 8118 puDst->au16[2] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[2] + puSrc->au16[2]); 8119 puDst->au16[3] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[3] + puSrc->au16[3]); 8120 puDst->au16[4] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[4] + puSrc->au16[4]); 8121 puDst->au16[5] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[5] + puSrc->au16[5]); 8122 puDst->au16[6] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[6] + puSrc->au16[6]); 8123 puDst->au16[7] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD(uSrc1.au16[7] + puSrc->au16[7]); 8124 } 8125 8126 #endif 7937 8127 7938 8128 … … 8140 8330 8141 8331 /* 8332 * PSUBSB / VSUBSB 8333 */ 8334 #ifdef IEM_WITHOUT_ASSEMBLY 8335 8336 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8337 { 8338 RT_NOREF(pFpuState); 8339 RTUINT64U uSrc1 = { *puDst }; 8340 RTUINT64U uSrc2 = { *puSrc }; 8341 RTUINT64U uDst; 8342 uDst.au8[0] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[0] - uSrc2.ai8[0]); 8343 uDst.au8[1] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[1] - uSrc2.ai8[1]); 8344 uDst.au8[2] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[2] - uSrc2.ai8[2]); 8345 uDst.au8[3] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[3] - uSrc2.ai8[3]); 8346 uDst.au8[4] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[4] - uSrc2.ai8[4]); 8347 uDst.au8[5] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[5] - uSrc2.ai8[5]); 8348 uDst.au8[6] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[6] - uSrc2.ai8[6]); 8349 uDst.au8[7] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[7] - uSrc2.ai8[7]); 8350 *puDst = uDst.u; 8351 } 8352 8353 8354 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8355 { 8356 RT_NOREF(pFpuState); 8357 RTUINT128U uSrc1 = *puDst; 8358 puDst->au8[0] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[0] - puSrc->ai8[0]); 8359 puDst->au8[1] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[1] - puSrc->ai8[1]); 8360 puDst->au8[2] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[2] - puSrc->ai8[2]); 8361 puDst->au8[3] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[3] - puSrc->ai8[3]); 8362 puDst->au8[4] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[4] - puSrc->ai8[4]); 8363 puDst->au8[5] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[5] - puSrc->ai8[5]); 8364 puDst->au8[6] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[6] - puSrc->ai8[6]); 8365 puDst->au8[7] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[7] - puSrc->ai8[7]); 8366 puDst->au8[8] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[8] - puSrc->ai8[8]); 8367 puDst->au8[9] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[9] - puSrc->ai8[9]); 8368 puDst->au8[10] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[10] - puSrc->ai8[10]); 8369 puDst->au8[11] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[11] - puSrc->ai8[11]); 8370 puDst->au8[12] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[12] - puSrc->ai8[12]); 8371 puDst->au8[13] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[13] - puSrc->ai8[13]); 8372 puDst->au8[14] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[14] - puSrc->ai8[14]); 8373 puDst->au8[15] = SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(uSrc1.ai8[15] - puSrc->ai8[15]); 8374 } 8375 8376 #endif 8377 8378 8379 /* 8380 * PADDSB / VPADDSB 8381 */ 8382 #define SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(a_uWord) \ 8383 ( (uint16_t)(a_uWord) <= (uint16_t)0xff \ 8384 ? (uint8_t)(a_uWord) \ 8385 : (uint8_t)0 ) 8386 8387 #ifdef IEM_WITHOUT_ASSEMBLY 8388 8389 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusb_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8390 { 8391 RT_NOREF(pFpuState); 8392 RTUINT64U uSrc1 = { *puDst }; 8393 RTUINT64U uSrc2 = { *puSrc }; 8394 RTUINT64U uDst; 8395 uDst.au8[0] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[0] - uSrc2.au8[0]); 8396 uDst.au8[1] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[1] - uSrc2.au8[1]); 8397 uDst.au8[2] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[2] - uSrc2.au8[2]); 8398 uDst.au8[3] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[3] - uSrc2.au8[3]); 8399 uDst.au8[4] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[4] - uSrc2.au8[4]); 8400 uDst.au8[5] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[5] - uSrc2.au8[5]); 8401 uDst.au8[6] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[6] - uSrc2.au8[6]); 8402 uDst.au8[7] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[7] - uSrc2.au8[7]); 8403 *puDst = uDst.u; 8404 } 8405 8406 8407 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusb_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8408 { 8409 RT_NOREF(pFpuState); 8410 RTUINT128U uSrc1 = *puDst; 8411 puDst->au8[0] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[0] - puSrc->au8[0]); 8412 puDst->au8[1] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[1] - puSrc->au8[1]); 8413 puDst->au8[2] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[2] - puSrc->au8[2]); 8414 puDst->au8[3] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[3] - puSrc->au8[3]); 8415 puDst->au8[4] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[4] - puSrc->au8[4]); 8416 puDst->au8[5] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[5] - puSrc->au8[5]); 8417 puDst->au8[6] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[6] - puSrc->au8[6]); 8418 puDst->au8[7] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[7] - puSrc->au8[7]); 8419 puDst->au8[8] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[8] - puSrc->au8[8]); 8420 puDst->au8[9] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[9] - puSrc->au8[9]); 8421 puDst->au8[10] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[10] - puSrc->au8[10]); 8422 puDst->au8[11] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[11] - puSrc->au8[11]); 8423 puDst->au8[12] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[12] - puSrc->au8[12]); 8424 puDst->au8[13] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[13] - puSrc->au8[13]); 8425 puDst->au8[14] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[14] - puSrc->au8[14]); 8426 puDst->au8[15] = SATURATED_UNSIGNED_WORD_TO_UNSIGNED_BYTE_SUB(uSrc1.au8[15] - puSrc->au8[15]); 8427 } 8428 8429 #endif 8430 8431 8432 /* 8142 8433 * PSUBW / VPSUBW 8143 8434 */ … … 8212 8503 8213 8504 /* 8505 * PSUBSW / VPSUBSW 8506 */ 8507 #ifdef IEM_WITHOUT_ASSEMBLY 8508 8509 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8510 { 8511 RT_NOREF(pFpuState); 8512 RTUINT64U uSrc1 = { *puDst }; 8513 RTUINT64U uSrc2 = { *puSrc }; 8514 RTUINT64U uDst; 8515 uDst.au16[0] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[0] - uSrc2.ai16[0]); 8516 uDst.au16[1] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[1] - uSrc2.ai16[1]); 8517 uDst.au16[2] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[2] - uSrc2.ai16[2]); 8518 uDst.au16[3] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[3] - uSrc2.ai16[3]); 8519 *puDst = uDst.u; 8520 } 8521 8522 8523 IEM_DECL_IMPL_DEF(void, iemAImpl_psubsw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8524 { 8525 RT_NOREF(pFpuState); 8526 RTUINT128U uSrc1 = *puDst; 8527 puDst->au16[0] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[0] - puSrc->ai16[0]); 8528 puDst->au16[1] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[1] - puSrc->ai16[1]); 8529 puDst->au16[2] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[2] - puSrc->ai16[2]); 8530 puDst->au16[3] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[3] - puSrc->ai16[3]); 8531 puDst->au16[4] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[4] - puSrc->ai16[4]); 8532 puDst->au16[5] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[5] - puSrc->ai16[5]); 8533 puDst->au16[6] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[6] - puSrc->ai16[6]); 8534 puDst->au16[7] = SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(uSrc1.ai16[7] - puSrc->ai16[7]); 8535 } 8536 8537 #endif 8538 8539 8540 /* 8541 * PSUBUSW / VPSUBUSW 8542 */ 8543 #define SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(a_uDword) \ 8544 ( (uint32_t)(a_uDword) <= (uint16_t)0xffff \ 8545 ? (uint16_t)(a_uDword) \ 8546 : (uint16_t)0 ) 8547 8548 #ifdef IEM_WITHOUT_ASSEMBLY 8549 8550 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8551 { 8552 RT_NOREF(pFpuState); 8553 RTUINT64U uSrc1 = { *puDst }; 8554 RTUINT64U uSrc2 = { *puSrc }; 8555 RTUINT64U uDst; 8556 uDst.au16[0] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[0] - uSrc2.au16[0]); 8557 uDst.au16[1] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[1] - uSrc2.au16[1]); 8558 uDst.au16[2] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[2] - uSrc2.au16[2]); 8559 uDst.au16[3] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[3] - uSrc2.au16[3]); 8560 *puDst = uDst.u; 8561 } 8562 8563 8564 IEM_DECL_IMPL_DEF(void, iemAImpl_psubusw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8565 { 8566 RT_NOREF(pFpuState); 8567 RTUINT128U uSrc1 = *puDst; 8568 puDst->au16[0] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[0] - puSrc->au16[0]); 8569 puDst->au16[1] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[1] - puSrc->au16[1]); 8570 puDst->au16[2] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[2] - puSrc->au16[2]); 8571 puDst->au16[3] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[3] - puSrc->au16[3]); 8572 puDst->au16[4] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[4] - puSrc->au16[4]); 8573 puDst->au16[5] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[5] - puSrc->au16[5]); 8574 puDst->au16[6] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[6] - puSrc->au16[6]); 8575 puDst->au16[7] = SATURATED_UNSIGNED_DWORD_TO_UNSIGNED_WORD_SUB(uSrc1.au16[7] - puSrc->au16[7]); 8576 } 8577 8578 #endif 8579 8580 8581 /* 8214 8582 * PSUBD / VPSUBD. 8215 8583 */ … … 8304 8672 } 8305 8673 8674 8675 8676 /* 8677 * PMULLW / VPMULLW 8678 */ 8679 #ifdef IEM_WITHOUT_ASSEMBLY 8680 8681 IEM_DECL_IMPL_DEF(void, iemAImpl_pmullw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8682 { 8683 RT_NOREF(pFpuState); 8684 RTUINT64U uSrc1 = { *puDst }; 8685 RTUINT64U uSrc2 = { *puSrc }; 8686 RTUINT64U uDst; 8687 uDst.ai16[0] = uSrc1.ai16[0] * uSrc2.ai16[0]; 8688 uDst.ai16[1] = uSrc1.ai16[1] * uSrc2.ai16[1]; 8689 uDst.ai16[2] = uSrc1.ai16[2] * uSrc2.ai16[2]; 8690 uDst.ai16[3] = uSrc1.ai16[3] * uSrc2.ai16[3]; 8691 *puDst = uDst.u; 8692 } 8693 8694 8695 IEM_DECL_IMPL_DEF(void, iemAImpl_pmullw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8696 { 8697 RT_NOREF(pFpuState); 8698 RTUINT128U uSrc1 = *puDst; 8699 puDst->ai16[0] = uSrc1.ai16[0] * puSrc->ai16[0]; 8700 puDst->ai16[1] = uSrc1.ai16[1] * puSrc->ai16[1]; 8701 puDst->ai16[2] = uSrc1.ai16[2] * puSrc->ai16[2]; 8702 puDst->ai16[3] = uSrc1.ai16[3] * puSrc->ai16[3]; 8703 puDst->ai16[4] = uSrc1.ai16[4] * puSrc->ai16[4]; 8704 puDst->ai16[5] = uSrc1.ai16[5] * puSrc->ai16[5]; 8705 puDst->ai16[6] = uSrc1.ai16[6] * puSrc->ai16[6]; 8706 puDst->ai16[7] = uSrc1.ai16[7] * puSrc->ai16[7]; 8707 } 8708 8709 #endif 8710 8711 8712 /* 8713 * PMULHW / VPMULHW 8714 */ 8715 #ifdef IEM_WITHOUT_ASSEMBLY 8716 8717 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8718 { 8719 RT_NOREF(pFpuState); 8720 RTUINT64U uSrc1 = { *puDst }; 8721 RTUINT64U uSrc2 = { *puSrc }; 8722 RTUINT64U uDst; 8723 uDst.ai16[0] = RT_HIWORD(uSrc1.ai16[0] * uSrc2.ai16[0]); 8724 uDst.ai16[1] = RT_HIWORD(uSrc1.ai16[1] * uSrc2.ai16[1]); 8725 uDst.ai16[2] = RT_HIWORD(uSrc1.ai16[2] * uSrc2.ai16[2]); 8726 uDst.ai16[3] = RT_HIWORD(uSrc1.ai16[3] * uSrc2.ai16[3]); 8727 *puDst = uDst.u; 8728 } 8729 8730 8731 IEM_DECL_IMPL_DEF(void, iemAImpl_pmulhw_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 8732 { 8733 RT_NOREF(pFpuState); 8734 RTUINT128U uSrc1 = *puDst; 8735 puDst->ai16[0] = RT_HIWORD(uSrc1.ai16[0] * puSrc->ai16[0]); 8736 puDst->ai16[1] = RT_HIWORD(uSrc1.ai16[1] * puSrc->ai16[1]); 8737 puDst->ai16[2] = RT_HIWORD(uSrc1.ai16[2] * puSrc->ai16[2]); 8738 puDst->ai16[3] = RT_HIWORD(uSrc1.ai16[3] * puSrc->ai16[3]); 8739 puDst->ai16[4] = RT_HIWORD(uSrc1.ai16[4] * puSrc->ai16[4]); 8740 puDst->ai16[5] = RT_HIWORD(uSrc1.ai16[5] * puSrc->ai16[5]); 8741 puDst->ai16[6] = RT_HIWORD(uSrc1.ai16[6] * puSrc->ai16[6]); 8742 puDst->ai16[7] = RT_HIWORD(uSrc1.ai16[7] * puSrc->ai16[7]); 8743 } 8744 8745 #endif 8746 8747 8748 /* 8749 * PSRLW / VPSRLW 8750 */ 8751 #ifdef IEM_WITHOUT_ASSEMBLY 8752 8753 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8754 { 8755 RTUINT64U uSrc1 = { *puDst }; 8756 RTUINT64U uSrc2 = { *puSrc }; 8757 RTUINT64U uDst; 8758 8759 if (uSrc2.au64[0] <= 15) 8760 { 8761 uDst.au16[0] = uSrc1.au16[0] >> uSrc2.au8[0]; 8762 uDst.au16[1] = uSrc1.au16[1] >> uSrc2.au8[0]; 8763 uDst.au16[2] = uSrc1.au16[2] >> uSrc2.au8[0]; 8764 uDst.au16[3] = uSrc1.au16[3] >> uSrc2.au8[0]; 8765 } 8766 else 8767 { 8768 uDst.au64[0] = 0; 8769 } 8770 *puDst = uDst.u; 8771 } 8772 8773 8774 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlw_imm_u64,(uint64_t *puDst, uint8_t uShift)) 8775 { 8776 RTUINT64U uSrc1 = { *puDst }; 8777 RTUINT64U uDst; 8778 8779 if (uShift <= 15) 8780 { 8781 uDst.au16[0] = uSrc1.au16[0] >> uShift; 8782 uDst.au16[1] = uSrc1.au16[1] >> uShift; 8783 uDst.au16[2] = uSrc1.au16[2] >> uShift; 8784 uDst.au16[3] = uSrc1.au16[3] >> uShift; 8785 } 8786 else 8787 { 8788 uDst.au64[0] = 0; 8789 } 8790 *puDst = uDst.u; 8791 } 8792 8793 8794 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8795 { 8796 RTUINT128U uSrc1 = *puDst; 8797 8798 if (puSrc->au64[0] <= 15) 8799 { 8800 puDst->au16[0] = uSrc1.au16[0] >> puSrc->au8[0]; 8801 puDst->au16[1] = uSrc1.au16[1] >> puSrc->au8[0]; 8802 puDst->au16[2] = uSrc1.au16[2] >> puSrc->au8[0]; 8803 puDst->au16[3] = uSrc1.au16[3] >> puSrc->au8[0]; 8804 puDst->au16[4] = uSrc1.au16[4] >> puSrc->au8[0]; 8805 puDst->au16[5] = uSrc1.au16[5] >> puSrc->au8[0]; 8806 puDst->au16[6] = uSrc1.au16[6] >> puSrc->au8[0]; 8807 puDst->au16[7] = uSrc1.au16[7] >> puSrc->au8[0]; 8808 } 8809 else 8810 { 8811 puDst->au64[0] = 0; 8812 puDst->au64[1] = 0; 8813 } 8814 } 8815 8816 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlw_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 8817 { 8818 RTUINT128U uSrc1 = *puDst; 8819 8820 if (uShift <= 15) 8821 { 8822 puDst->au16[0] = uSrc1.au16[0] >> uShift; 8823 puDst->au16[1] = uSrc1.au16[1] >> uShift; 8824 puDst->au16[2] = uSrc1.au16[2] >> uShift; 8825 puDst->au16[3] = uSrc1.au16[3] >> uShift; 8826 puDst->au16[4] = uSrc1.au16[4] >> uShift; 8827 puDst->au16[5] = uSrc1.au16[5] >> uShift; 8828 puDst->au16[6] = uSrc1.au16[6] >> uShift; 8829 puDst->au16[7] = uSrc1.au16[7] >> uShift; 8830 } 8831 else 8832 { 8833 puDst->au64[0] = 0; 8834 puDst->au64[1] = 0; 8835 } 8836 } 8837 8838 #endif 8839 8840 8841 /* 8842 * PSRAW / VPSRAW 8843 */ 8844 #ifdef IEM_WITHOUT_ASSEMBLY 8845 8846 IEM_DECL_IMPL_DEF(void, iemAImpl_psraw_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 8847 { 8848 RT_NOREF(pFpuState); 8849 RTUINT64U uSrc1 = { *puDst }; 8850 RTUINT64U uSrc2 = { *puSrc }; 8851 RTUINT64U uDst; 8852 8853 if (uSrc2.au64[0] <= 15) 8854 { 8855 uDst.ai16[0] = uSrc1.ai16[0] >> uSrc2.au8[0]; 8856 uDst.ai16[1] = uSrc1.ai16[1] >> uSrc2.au8[0]; 8857 uDst.ai16[2] = uSrc1.ai16[2] >> uSrc2.au8[0]; 8858 uDst.ai16[3] = uSrc1.ai16[3] >> uSrc2.au8[0]; 8859 } 8860 else 8861 { 8862 uDst.au64[0] = 0; 8863 } 8864 *puDst = uDst.u; 8865 } 8866 8867 8868 IEM_DECL_IMPL_DEF(void, iemAImpl_psraw_imm_u64,(uint64_t *puDst, uint8_t uShift)) 8869 { 8870 RTUINT64U uSrc1 = { *puDst }; 8871 RTUINT64U uDst; 8872 8873 if (uShift <= 15) 8874 { 8875 uDst.ai16[0] = uSrc1.ai16[0] >> uShift; 8876 uDst.ai16[1] = uSrc1.ai16[1] >> uShift; 8877 uDst.ai16[2] = uSrc1.ai16[2] >> uShift; 8878 uDst.ai16[3] = uSrc1.ai16[3] >> uShift; 8879 } 8880 else 8881 { 8882 uDst.au64[0] = 0; 8883 } 8884 *puDst = uDst.u; 8885 } 8886 8887 8888 IEM_DECL_IMPL_DEF(void, iemAImpl_psraw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8889 { 8890 RTUINT128U uSrc1 = *puDst; 8891 8892 if (puSrc->au64[0] <= 15) 8893 { 8894 puDst->ai16[0] = uSrc1.ai16[0] >> puSrc->au8[0]; 8895 puDst->ai16[1] = uSrc1.ai16[1] >> puSrc->au8[0]; 8896 puDst->ai16[2] = uSrc1.ai16[2] >> puSrc->au8[0]; 8897 puDst->ai16[3] = uSrc1.ai16[3] >> puSrc->au8[0]; 8898 puDst->ai16[4] = uSrc1.ai16[4] >> puSrc->au8[0]; 8899 puDst->ai16[5] = uSrc1.ai16[5] >> puSrc->au8[0]; 8900 puDst->ai16[6] = uSrc1.ai16[6] >> puSrc->au8[0]; 8901 puDst->ai16[7] = uSrc1.ai16[7] >> puSrc->au8[0]; 8902 } 8903 else 8904 { 8905 puDst->au64[0] = 0; 8906 puDst->au64[1] = 0; 8907 } 8908 } 8909 8910 IEM_DECL_IMPL_DEF(void, iemAImpl_psraw_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 8911 { 8912 RTUINT128U uSrc1 = *puDst; 8913 8914 if (uShift <= 15) 8915 { 8916 puDst->ai16[0] = uSrc1.ai16[0] >> uShift; 8917 puDst->ai16[1] = uSrc1.ai16[1] >> uShift; 8918 puDst->ai16[2] = uSrc1.ai16[2] >> uShift; 8919 puDst->ai16[3] = uSrc1.ai16[3] >> uShift; 8920 puDst->ai16[4] = uSrc1.ai16[4] >> uShift; 8921 puDst->ai16[5] = uSrc1.ai16[5] >> uShift; 8922 puDst->ai16[6] = uSrc1.ai16[6] >> uShift; 8923 puDst->ai16[7] = uSrc1.ai16[7] >> uShift; 8924 } 8925 else 8926 { 8927 puDst->au64[0] = 0; 8928 puDst->au64[1] = 0; 8929 } 8930 } 8931 8932 #endif 8933 8934 8935 /* 8936 * PSLLW / VPSLLW 8937 */ 8938 #ifdef IEM_WITHOUT_ASSEMBLY 8939 8940 IEM_DECL_IMPL_DEF(void, iemAImpl_psllw_u64,(uint64_t *puDst, uint64_t const *puSrc)) 8941 { 8942 RTUINT64U uSrc1 = { *puDst }; 8943 RTUINT64U uSrc2 = { *puSrc }; 8944 RTUINT64U uDst; 8945 8946 if (uSrc2.au64[0] <= 15) 8947 { 8948 uDst.au16[0] = uSrc1.au16[0] << uSrc2.au8[0]; 8949 uDst.au16[1] = uSrc1.au16[1] << uSrc2.au8[0]; 8950 uDst.au16[2] = uSrc1.au16[2] << uSrc2.au8[0]; 8951 uDst.au16[3] = uSrc1.au16[3] << uSrc2.au8[0]; 8952 } 8953 else 8954 { 8955 uDst.au64[0] = 0; 8956 } 8957 *puDst = uDst.u; 8958 } 8959 8960 8961 IEM_DECL_IMPL_DEF(void, iemAImpl_psllw_imm_u64,(uint64_t *puDst, uint8_t uShift)) 8962 { 8963 RTUINT64U uSrc1 = { *puDst }; 8964 RTUINT64U uDst; 8965 8966 if (uShift <= 15) 8967 { 8968 uDst.au16[0] = uSrc1.au16[0] << uShift; 8969 uDst.au16[1] = uSrc1.au16[1] << uShift; 8970 uDst.au16[2] = uSrc1.au16[2] << uShift; 8971 uDst.au16[3] = uSrc1.au16[3] << uShift; 8972 } 8973 else 8974 { 8975 uDst.au64[0] = 0; 8976 } 8977 *puDst = uDst.u; 8978 } 8979 8980 8981 IEM_DECL_IMPL_DEF(void, iemAImpl_psllw_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 8982 { 8983 RTUINT128U uSrc1 = *puDst; 8984 8985 if (puSrc->au64[0] <= 15) 8986 { 8987 puDst->au16[0] = uSrc1.au16[0] << puSrc->au8[0]; 8988 puDst->au16[1] = uSrc1.au16[1] << puSrc->au8[0]; 8989 puDst->au16[2] = uSrc1.au16[2] << puSrc->au8[0]; 8990 puDst->au16[3] = uSrc1.au16[3] << puSrc->au8[0]; 8991 puDst->au16[4] = uSrc1.au16[4] << puSrc->au8[0]; 8992 puDst->au16[5] = uSrc1.au16[5] << puSrc->au8[0]; 8993 puDst->au16[6] = uSrc1.au16[6] << puSrc->au8[0]; 8994 puDst->au16[7] = uSrc1.au16[7] << puSrc->au8[0]; 8995 } 8996 else 8997 { 8998 puDst->au64[0] = 0; 8999 puDst->au64[1] = 0; 9000 } 9001 } 9002 9003 IEM_DECL_IMPL_DEF(void, iemAImpl_psllw_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9004 { 9005 RTUINT128U uSrc1 = *puDst; 9006 9007 if (uShift <= 15) 9008 { 9009 puDst->au16[0] = uSrc1.au16[0] << uShift; 9010 puDst->au16[1] = uSrc1.au16[1] << uShift; 9011 puDst->au16[2] = uSrc1.au16[2] << uShift; 9012 puDst->au16[3] = uSrc1.au16[3] << uShift; 9013 puDst->au16[4] = uSrc1.au16[4] << uShift; 9014 puDst->au16[5] = uSrc1.au16[5] << uShift; 9015 puDst->au16[6] = uSrc1.au16[6] << uShift; 9016 puDst->au16[7] = uSrc1.au16[7] << uShift; 9017 } 9018 else 9019 { 9020 puDst->au64[0] = 0; 9021 puDst->au64[1] = 0; 9022 } 9023 } 9024 9025 #endif 9026 9027 9028 /* 9029 * PSRLD / VPSRLD 9030 */ 9031 #ifdef IEM_WITHOUT_ASSEMBLY 9032 9033 IEM_DECL_IMPL_DEF(void, iemAImpl_psrld_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9034 { 9035 RTUINT64U uSrc1 = { *puDst }; 9036 RTUINT64U uSrc2 = { *puSrc }; 9037 RTUINT64U uDst; 9038 9039 if (uSrc2.au64[0] <= 31) 9040 { 9041 uDst.au32[0] = uSrc1.au32[0] >> uSrc2.au8[0]; 9042 uDst.au32[1] = uSrc1.au32[1] >> uSrc2.au8[0]; 9043 } 9044 else 9045 { 9046 uDst.au64[0] = 0; 9047 } 9048 *puDst = uDst.u; 9049 } 9050 9051 9052 IEM_DECL_IMPL_DEF(void, iemAImpl_psrld_imm_u64,(uint64_t *puDst, uint8_t uShift)) 9053 { 9054 RTUINT64U uSrc1 = { *puDst }; 9055 RTUINT64U uDst; 9056 9057 if (uShift <= 31) 9058 { 9059 uDst.au32[0] = uSrc1.au32[0] >> uShift; 9060 uDst.au32[1] = uSrc1.au32[1] >> uShift; 9061 } 9062 else 9063 { 9064 uDst.au64[0] = 0; 9065 } 9066 *puDst = uDst.u; 9067 } 9068 9069 9070 IEM_DECL_IMPL_DEF(void, iemAImpl_psrld_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9071 { 9072 RTUINT128U uSrc1 = *puDst; 9073 9074 if (puSrc->au64[0] <= 31) 9075 { 9076 puDst->au32[0] = uSrc1.au32[0] >> puSrc->au8[0]; 9077 puDst->au32[1] = uSrc1.au32[1] >> puSrc->au8[0]; 9078 puDst->au32[2] = uSrc1.au32[2] >> puSrc->au8[0]; 9079 puDst->au32[3] = uSrc1.au32[3] >> puSrc->au8[0]; 9080 } 9081 else 9082 { 9083 puDst->au64[0] = 0; 9084 puDst->au64[1] = 0; 9085 } 9086 } 9087 9088 IEM_DECL_IMPL_DEF(void, iemAImpl_psrld_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9089 { 9090 RTUINT128U uSrc1 = *puDst; 9091 9092 if (uShift <= 31) 9093 { 9094 puDst->au32[0] = uSrc1.au32[0] >> uShift; 9095 puDst->au32[1] = uSrc1.au32[1] >> uShift; 9096 puDst->au32[2] = uSrc1.au32[2] >> uShift; 9097 puDst->au32[3] = uSrc1.au32[3] >> uShift; 9098 } 9099 else 9100 { 9101 puDst->au64[0] = 0; 9102 puDst->au64[1] = 0; 9103 } 9104 } 9105 9106 #endif 9107 9108 9109 /* 9110 * PSRAD / VPSRAD 9111 */ 9112 #ifdef IEM_WITHOUT_ASSEMBLY 9113 9114 IEM_DECL_IMPL_DEF(void, iemAImpl_psrad_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9115 { 9116 RT_NOREF(pFpuState); 9117 RTUINT64U uSrc1 = { *puDst }; 9118 RTUINT64U uSrc2 = { *puSrc }; 9119 RTUINT64U uDst; 9120 9121 if (uSrc2.au64[0] <= 31) 9122 { 9123 uDst.ai32[0] = uSrc1.ai32[0] >> uSrc2.au8[0]; 9124 uDst.ai32[1] = uSrc1.ai32[1] >> uSrc2.au8[0]; 9125 } 9126 else 9127 { 9128 uDst.au64[0] = 0; 9129 } 9130 *puDst = uDst.u; 9131 } 9132 9133 9134 IEM_DECL_IMPL_DEF(void, iemAImpl_psrad_imm_u64,(uint64_t *puDst, uint8_t uShift)) 9135 { 9136 RTUINT64U uSrc1 = { *puDst }; 9137 RTUINT64U uDst; 9138 9139 if (uShift <= 31) 9140 { 9141 uDst.ai32[0] = uSrc1.ai32[0] >> uShift; 9142 uDst.ai32[1] = uSrc1.ai32[1] >> uShift; 9143 } 9144 else 9145 { 9146 uDst.au64[0] = 0; 9147 } 9148 *puDst = uDst.u; 9149 } 9150 9151 9152 IEM_DECL_IMPL_DEF(void, iemAImpl_psrad_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9153 { 9154 RTUINT128U uSrc1 = *puDst; 9155 9156 if (puSrc->au64[0] <= 31) 9157 { 9158 puDst->ai32[0] = uSrc1.ai32[0] >> puSrc->au8[0]; 9159 puDst->ai32[1] = uSrc1.ai32[1] >> puSrc->au8[0]; 9160 puDst->ai32[2] = uSrc1.ai32[2] >> puSrc->au8[0]; 9161 puDst->ai32[3] = uSrc1.ai32[3] >> puSrc->au8[0]; 9162 } 9163 else 9164 { 9165 puDst->au64[0] = 0; 9166 puDst->au64[1] = 0; 9167 } 9168 } 9169 9170 IEM_DECL_IMPL_DEF(void, iemAImpl_psrad_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9171 { 9172 RTUINT128U uSrc1 = *puDst; 9173 9174 if (uShift <= 31) 9175 { 9176 puDst->ai32[0] = uSrc1.ai32[0] >> uShift; 9177 puDst->ai32[1] = uSrc1.ai32[1] >> uShift; 9178 puDst->ai32[2] = uSrc1.ai32[2] >> uShift; 9179 puDst->ai32[3] = uSrc1.ai32[3] >> uShift; 9180 } 9181 else 9182 { 9183 puDst->au64[0] = 0; 9184 puDst->au64[1] = 0; 9185 } 9186 } 9187 9188 #endif 9189 9190 9191 /* 9192 * PSLLD / VPSLLD 9193 */ 9194 #ifdef IEM_WITHOUT_ASSEMBLY 9195 9196 IEM_DECL_IMPL_DEF(void, iemAImpl_pslld_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9197 { 9198 RTUINT64U uSrc1 = { *puDst }; 9199 RTUINT64U uSrc2 = { *puSrc }; 9200 RTUINT64U uDst; 9201 9202 if (uSrc2.au64[0] <= 31) 9203 { 9204 uDst.au32[0] = uSrc1.au32[0] << uSrc2.au8[0]; 9205 uDst.au32[1] = uSrc1.au32[1] << uSrc2.au8[0]; 9206 } 9207 else 9208 { 9209 uDst.au64[0] = 0; 9210 } 9211 *puDst = uDst.u; 9212 } 9213 9214 9215 IEM_DECL_IMPL_DEF(void, iemAImpl_pslld_imm_u64,(uint64_t *puDst, uint8_t uShift)) 9216 { 9217 RTUINT64U uSrc1 = { *puDst }; 9218 RTUINT64U uDst; 9219 9220 if (uShift <= 31) 9221 { 9222 uDst.au32[0] = uSrc1.au32[0] << uShift; 9223 uDst.au32[1] = uSrc1.au32[1] << uShift; 9224 } 9225 else 9226 { 9227 uDst.au64[0] = 0; 9228 } 9229 *puDst = uDst.u; 9230 } 9231 9232 9233 IEM_DECL_IMPL_DEF(void, iemAImpl_pslld_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9234 { 9235 RTUINT128U uSrc1 = *puDst; 9236 9237 if (puSrc->au64[0] <= 31) 9238 { 9239 puDst->au32[0] = uSrc1.au32[0] << puSrc->au8[0]; 9240 puDst->au32[1] = uSrc1.au32[1] << puSrc->au8[0]; 9241 puDst->au32[2] = uSrc1.au32[2] << puSrc->au8[0]; 9242 puDst->au32[3] = uSrc1.au32[3] << puSrc->au8[0]; 9243 } 9244 else 9245 { 9246 puDst->au64[0] = 0; 9247 puDst->au64[1] = 0; 9248 } 9249 } 9250 9251 IEM_DECL_IMPL_DEF(void, iemAImpl_pslld_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9252 { 9253 RTUINT128U uSrc1 = *puDst; 9254 9255 if (uShift <= 31) 9256 { 9257 puDst->au32[0] = uSrc1.au32[0] << uShift; 9258 puDst->au32[1] = uSrc1.au32[1] << uShift; 9259 puDst->au32[2] = uSrc1.au32[2] << uShift; 9260 puDst->au32[3] = uSrc1.au32[3] << uShift; 9261 } 9262 else 9263 { 9264 puDst->au64[0] = 0; 9265 puDst->au64[1] = 0; 9266 } 9267 } 9268 9269 #endif 9270 9271 9272 /* 9273 * PSRLQ / VPSRLQ 9274 */ 9275 #ifdef IEM_WITHOUT_ASSEMBLY 9276 9277 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlq_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9278 { 9279 RTUINT64U uSrc1 = { *puDst }; 9280 RTUINT64U uSrc2 = { *puSrc }; 9281 RTUINT64U uDst; 9282 9283 if (uSrc2.au64[0] <= 63) 9284 { 9285 uDst.au64[0] = uSrc1.au64[0] >> uSrc2.au8[0]; 9286 } 9287 else 9288 { 9289 uDst.au64[0] = 0; 9290 } 9291 *puDst = uDst.u; 9292 } 9293 9294 9295 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlq_imm_u64,(uint64_t *puDst, uint8_t uShift)) 9296 { 9297 RTUINT64U uSrc1 = { *puDst }; 9298 RTUINT64U uDst; 9299 9300 if (uShift <= 63) 9301 { 9302 uDst.au64[0] = uSrc1.au64[0] >> uShift; 9303 } 9304 else 9305 { 9306 uDst.au64[0] = 0; 9307 } 9308 *puDst = uDst.u; 9309 } 9310 9311 9312 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlq_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9313 { 9314 RTUINT128U uSrc1 = *puDst; 9315 9316 if (puSrc->au64[0] <= 63) 9317 { 9318 puDst->au64[0] = uSrc1.au64[0] >> puSrc->au8[0]; 9319 puDst->au64[1] = uSrc1.au64[1] >> puSrc->au8[0]; 9320 } 9321 else 9322 { 9323 puDst->au64[0] = 0; 9324 puDst->au64[1] = 0; 9325 } 9326 } 9327 9328 IEM_DECL_IMPL_DEF(void, iemAImpl_psrlq_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9329 { 9330 RTUINT128U uSrc1 = *puDst; 9331 9332 if (uShift <= 63) 9333 { 9334 puDst->au64[0] = uSrc1.au64[0] >> uShift; 9335 puDst->au64[1] = uSrc1.au64[1] >> uShift; 9336 } 9337 else 9338 { 9339 puDst->au64[0] = 0; 9340 puDst->au64[1] = 0; 9341 } 9342 } 9343 9344 #endif 9345 9346 9347 /* 9348 * PSLLQ / VPSLLQ 9349 */ 9350 #ifdef IEM_WITHOUT_ASSEMBLY 9351 9352 IEM_DECL_IMPL_DEF(void, iemAImpl_psllq_u64,(uint64_t *puDst, uint64_t const *puSrc)) 9353 { 9354 RTUINT64U uSrc1 = { *puDst }; 9355 RTUINT64U uSrc2 = { *puSrc }; 9356 RTUINT64U uDst; 9357 9358 if (uSrc2.au64[0] <= 63) 9359 { 9360 uDst.au64[0] = uSrc1.au64[0] << uSrc2.au8[0]; 9361 } 9362 else 9363 { 9364 uDst.au64[0] = 0; 9365 } 9366 *puDst = uDst.u; 9367 } 9368 9369 9370 IEM_DECL_IMPL_DEF(void, iemAImpl_psllq_imm_u64,(uint64_t *puDst, uint8_t uShift)) 9371 { 9372 RTUINT64U uSrc1 = { *puDst }; 9373 RTUINT64U uDst; 9374 9375 if (uShift <= 63) 9376 { 9377 uDst.au64[0] = uSrc1.au64[0] << uShift; 9378 } 9379 else 9380 { 9381 uDst.au64[0] = 0; 9382 } 9383 *puDst = uDst.u; 9384 } 9385 9386 9387 IEM_DECL_IMPL_DEF(void, iemAImpl_psllq_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc)) 9388 { 9389 RTUINT128U uSrc1 = *puDst; 9390 9391 if (puSrc->au64[0] <= 63) 9392 { 9393 puDst->au64[0] = uSrc1.au64[0] << puSrc->au8[0]; 9394 puDst->au64[1] = uSrc1.au64[1] << puSrc->au8[0]; 9395 } 9396 else 9397 { 9398 puDst->au64[0] = 0; 9399 puDst->au64[1] = 0; 9400 } 9401 } 9402 9403 IEM_DECL_IMPL_DEF(void, iemAImpl_psllq_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9404 { 9405 RTUINT128U uSrc1 = *puDst; 9406 9407 if (uShift <= 63) 9408 { 9409 puDst->au64[0] = uSrc1.au64[0] << uShift; 9410 puDst->au64[1] = uSrc1.au64[1] << uShift; 9411 } 9412 else 9413 { 9414 puDst->au64[0] = 0; 9415 puDst->au64[1] = 0; 9416 } 9417 } 9418 9419 #endif 9420 9421 9422 /* 9423 * PSRLDQ / VPSRLDQ 9424 */ 9425 #ifdef IEM_WITHOUT_ASSEMBLY 9426 9427 IEM_DECL_IMPL_DEF(void, iemAImpl_psrldq_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9428 { 9429 RTUINT128U uSrc1 = *puDst; 9430 9431 if (uShift < 16) 9432 { 9433 int i; 9434 9435 for (i = 0; i < 16 - uShift; ++i) 9436 puDst->au8[i] = uSrc1.au8[i + uShift]; 9437 for (i = 16 - uShift; i < 16; ++i) 9438 puDst->au8[i] = 0; 9439 } 9440 else 9441 { 9442 puDst->au64[0] = 0; 9443 puDst->au64[1] = 0; 9444 } 9445 } 9446 9447 #endif 9448 9449 9450 /* 9451 * PSLLDQ / VPSLLDQ 9452 */ 9453 #ifdef IEM_WITHOUT_ASSEMBLY 9454 9455 IEM_DECL_IMPL_DEF(void, iemAImpl_pslldq_imm_u128,(PRTUINT128U puDst, uint8_t uShift)) 9456 { 9457 RTUINT128U uSrc1 = *puDst; 9458 9459 if (uShift < 16) 9460 { 9461 int i; 9462 9463 for (i = 0; i < uShift; ++i) 9464 puDst->au8[i] = 0; 9465 for (i = uShift; i < 16; ++i) 9466 puDst->au8[i] = uSrc1.au8[i - uShift]; 9467 } 9468 else 9469 { 9470 puDst->au64[0] = 0; 9471 puDst->au64[1] = 0; 9472 } 9473 } 9474 9475 #endif 9476 9477 9478 /* 9479 * PMADDWD / VPMADDWD 9480 */ 9481 #ifdef IEM_WITHOUT_ASSEMBLY 9482 9483 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u64,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc)) 9484 { 9485 RTUINT64U uSrc1 = { *puDst }; 9486 RTUINT64U uSrc2 = { *puSrc }; 9487 RTUINT64U uDst; 9488 9489 uDst.ai32[0] = (int32_t)uSrc1.ai16[0] * uSrc2.ai16[0] + (int32_t)uSrc1.ai16[1] * uSrc2.ai16[1]; 9490 uDst.ai32[1] = (int32_t)uSrc1.ai16[2] * uSrc2.ai16[2] + (int32_t)uSrc1.ai16[3] * uSrc2.ai16[3]; 9491 *puDst = uDst.u; 9492 RT_NOREF(pFpuState); 9493 } 9494 9495 9496 IEM_DECL_IMPL_DEF(void, iemAImpl_pmaddwd_u128,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc)) 9497 { 9498 RTUINT128U uSrc1 = *puDst; 9499 9500 puDst->ai32[0] = (int32_t)uSrc1.ai16[0] * puSrc->ai16[0] + (int32_t)uSrc1.ai16[1] * puSrc->ai16[1]; 9501 puDst->ai32[1] = (int32_t)uSrc1.ai16[2] * puSrc->ai16[2] + (int32_t)uSrc1.ai16[3] * puSrc->ai16[3]; 9502 puDst->ai32[2] = (int32_t)uSrc1.ai16[4] * puSrc->ai16[4] + (int32_t)uSrc1.ai16[5] * puSrc->ai16[5]; 9503 puDst->ai32[3] = (int32_t)uSrc1.ai16[6] * puSrc->ai16[6] + (int32_t)uSrc1.ai16[7] * puSrc->ai16[7]; 9504 RT_NOREF(pFpuState); 9505 } 9506 9507 #endif 8306 9508 8307 9509 … … 9208 10410 * PACKSSWB - signed words -> signed bytes 9209 10411 */ 9210 #define SATURATED_SIGNED_WORD_TO_SIGNED_BYTE(a_iWord) \9211 ( (uint16_t)((a_iWord) + 0x80) <= (uint16_t)0xff \9212 ? (uint8_t)(a_iWord) \9213 : (uint8_t)0x7f + (uint8_t)(((a_iWord) >> 15) & 1) ) /* 0x7f = INT8_MAX; 0x80 = INT8_MIN; source bit 15 = sign */9214 10412 9215 10413 #ifdef IEM_WITHOUT_ASSEMBLY … … 9456 10654 * PACKSSDW - signed dwords -> signed words 9457 10655 */ 9458 #define SATURATED_SIGNED_DWORD_TO_SIGNED_WORD(a_iDword) \9459 ( (uint32_t)((a_iDword) + 0x8000) <= (uint16_t)0xffff \9460 ? (uint16_t)(a_iDword) \9461 : (uint16_t)0x7fff + (uint16_t)(((a_iDword) >> 31) & 1) ) /* 0x7fff = INT16_MAX; 0x8000 = INT16_MIN; source bit 31 = sign */9462 10656 9463 10657 #ifdef IEM_WITHOUT_ASSEMBLY -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r95554 r95940 3622 3622 3623 3623 3624 /** Opcode 0x66 0x0f 0x67 - packuswb Vx, W */3625 FNIEMOP_DEF(iemOp_packuswb_Vx_W )3624 /** Opcode 0x66 0x0f 0x67 - packuswb Vx, Wx */ 3625 FNIEMOP_DEF(iemOp_packuswb_Vx_Wx) 3626 3626 { 3627 3627 IEMOP_MNEMONIC2(RM, PACKUSWB, packuswb, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); … … 3810 3810 3811 3811 3812 /** Opcode 0x66 0x0f 0x6a - punpckhdq Vx, W */3813 FNIEMOP_DEF(iemOp_punpckhdq_Vx_W )3812 /** Opcode 0x66 0x0f 0x6a - punpckhdq Vx, Wx */ 3813 FNIEMOP_DEF(iemOp_punpckhdq_Vx_Wx) 3814 3814 { 3815 3815 IEMOP_MNEMONIC2(RM, PUNPCKHDQ, punpckhdq, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); … … 3858 3858 3859 3859 3860 /** Opcode 0x66 0x0f 0x6d - punpckhqdq Vx, W */3861 FNIEMOP_DEF(iemOp_punpckhqdq_Vx_W )3860 /** Opcode 0x66 0x0f 0x6d - punpckhqdq Vx, Wx */ 3861 FNIEMOP_DEF(iemOp_punpckhqdq_Vx_Wx) 3862 3862 { 3863 3863 IEMOP_MNEMONIC2(RM, PUNPCKHQDQ, punpckhqdq, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); … … 4385 4385 4386 4386 4387 /** Opcode 0x0f 0x71 11/2. */ 4388 FNIEMOP_STUB_1(iemOp_Grp12_psrlw_Nq_Ib, uint8_t, bRm); 4387 /** 4388 * Common worker for MMX instructions of the form: 4389 * psrlw mm, imm8 4390 * psraw mm, imm8 4391 * psllw mm, imm8 4392 * psrld mm, imm8 4393 * psrad mm, imm8 4394 * pslld mm, imm8 4395 * psrlq mm, imm8 4396 * psllq mm, imm8 4397 * 4398 */ 4399 FNIEMOP_DEF_2(iemOpCommonMmx_Shift_Imm, uint8_t, bRm, FNIEMAIMPLMEDIAPSHIFTU64, pfnU64) 4400 { 4401 if (IEM_IS_MODRM_REG_MODE(bRm)) 4402 { 4403 /* 4404 * Register, immediate. 4405 */ 4406 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 4407 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4408 4409 IEM_MC_BEGIN(2, 0); 4410 IEM_MC_ARG(uint64_t *, pDst, 0); 4411 IEM_MC_ARG_CONST(uint8_t, bShiftArg, /*=*/ bImm, 1); 4412 IEM_MC_MAYBE_RAISE_MMX_RELATED_XCPT_CHECK_SSE_OR_MMXEXT(); 4413 IEM_MC_PREPARE_FPU_USAGE(); 4414 IEM_MC_REF_MREG_U64(pDst, IEM_GET_MODRM_REG_8(bRm)); 4415 IEM_MC_CALL_VOID_AIMPL_2(pfnU64, pDst, bShiftArg); 4416 IEM_MC_MODIFIED_MREG_BY_REF(pDst); 4417 IEM_MC_FPU_TO_MMX_MODE(); 4418 IEM_MC_ADVANCE_RIP(); 4419 IEM_MC_END(); 4420 } 4421 else 4422 { 4423 /* 4424 * Register, memory. 4425 */ 4426 /// @todo Caller already enforced register mode?! 4427 } 4428 return VINF_SUCCESS; 4429 } 4430 4431 4432 /** 4433 * Common worker for SSE2 instructions of the form: 4434 * psrlw xmm, imm8 4435 * psraw xmm, imm8 4436 * psllw xmm, imm8 4437 * psrld xmm, imm8 4438 * psrad xmm, imm8 4439 * pslld xmm, imm8 4440 * psrlq xmm, imm8 4441 * psllq xmm, imm8 4442 * 4443 */ 4444 FNIEMOP_DEF_2(iemOpCommonSse2_Shift_Imm, uint8_t, bRm, FNIEMAIMPLMEDIAPSHIFTU128, pfnU128) 4445 { 4446 if (IEM_IS_MODRM_REG_MODE(bRm)) 4447 { 4448 /* 4449 * Register, immediate. 4450 */ 4451 uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm); 4452 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 4453 4454 IEM_MC_BEGIN(2, 0); 4455 IEM_MC_ARG(PRTUINT128U, pDst, 0); 4456 IEM_MC_ARG_CONST(uint8_t, bShiftArg, /*=*/ bImm, 1); 4457 IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT(); 4458 IEM_MC_PREPARE_SSE_USAGE(); 4459 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 4460 IEM_MC_CALL_VOID_AIMPL_2(pfnU128, pDst, bShiftArg); 4461 IEM_MC_ADVANCE_RIP(); 4462 IEM_MC_END(); 4463 } 4464 else 4465 { 4466 /* 4467 * Register, memory. 4468 */ 4469 /// @todo Caller already enforced register mode?! 4470 } 4471 return VINF_SUCCESS; 4472 } 4473 4474 4475 /** Opcode 0x0f 0x71 11/2 - psrlw Nq, Ib */ 4476 FNIEMOPRM_DEF(iemOp_Grp12_psrlw_Nq_Ib) 4477 { 4478 // IEMOP_MNEMONIC2(RI, PSRLW, psrlw, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4479 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_psrlw_imm_u64); 4480 } 4481 4389 4482 4390 4483 /** Opcode 0x66 0x0f 0x71 11/2. */ 4391 FNIEMOP_STUB_1(iemOp_Grp12_psrlw_Ux_Ib, uint8_t, bRm); 4484 FNIEMOPRM_DEF(iemOp_Grp12_psrlw_Ux_Ib) 4485 { 4486 // IEMOP_MNEMONIC2(RI, PSRLW, psrlw, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4487 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psrlw_imm_u128); 4488 } 4489 4392 4490 4393 4491 /** Opcode 0x0f 0x71 11/4. */ 4394 FNIEMOP_STUB_1(iemOp_Grp12_psraw_Nq_Ib, uint8_t, bRm); 4492 FNIEMOPRM_DEF(iemOp_Grp12_psraw_Nq_Ib) 4493 { 4494 // IEMOP_MNEMONIC2(RI, PSRAW, psraw, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4495 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_psraw_imm_u64); 4496 } 4497 4395 4498 4396 4499 /** Opcode 0x66 0x0f 0x71 11/4. */ 4397 FNIEMOP_STUB_1(iemOp_Grp12_psraw_Ux_Ib, uint8_t, bRm); 4500 FNIEMOPRM_DEF(iemOp_Grp12_psraw_Ux_Ib) 4501 { 4502 // IEMOP_MNEMONIC2(RI, PSRAW, psraw, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4503 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psraw_imm_u128); 4504 } 4505 4398 4506 4399 4507 /** Opcode 0x0f 0x71 11/6. */ 4400 FNIEMOP_STUB_1(iemOp_Grp12_psllw_Nq_Ib, uint8_t, bRm); 4508 FNIEMOPRM_DEF(iemOp_Grp12_psllw_Nq_Ib) 4509 { 4510 // IEMOP_MNEMONIC2(RI, PSLLW, psllw, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4511 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_psllw_imm_u64); 4512 } 4513 4401 4514 4402 4515 /** Opcode 0x66 0x0f 0x71 11/6. */ 4403 FNIEMOP_STUB_1(iemOp_Grp12_psllw_Ux_Ib, uint8_t, bRm); 4516 FNIEMOPRM_DEF(iemOp_Grp12_psllw_Ux_Ib) 4517 { 4518 // IEMOP_MNEMONIC2(RI, PSLLW, psllw, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4519 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psllw_imm_u128); 4520 } 4404 4521 4405 4522 … … 4434 4551 4435 4552 /** Opcode 0x0f 0x72 11/2. */ 4436 FNIEMOP_STUB_1(iemOp_Grp13_psrld_Nq_Ib, uint8_t, bRm); 4553 FNIEMOPRM_DEF(iemOp_Grp13_psrld_Nq_Ib) 4554 { 4555 // IEMOP_MNEMONIC2(RI, PSRLD, psrld, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4556 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_psrld_imm_u64); 4557 } 4558 4437 4559 4438 4560 /** Opcode 0x66 0x0f 0x72 11/2. */ 4439 FNIEMOP_STUB_1(iemOp_Grp13_psrld_Ux_Ib, uint8_t, bRm); 4561 FNIEMOPRM_DEF(iemOp_Grp13_psrld_Ux_Ib) 4562 { 4563 // IEMOP_MNEMONIC2(RI, PSRLD, psrld, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4564 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psrld_imm_u128); 4565 } 4566 4440 4567 4441 4568 /** Opcode 0x0f 0x72 11/4. */ 4442 FNIEMOP_STUB_1(iemOp_Grp13_psrad_Nq_Ib, uint8_t, bRm); 4569 FNIEMOPRM_DEF(iemOp_Grp13_psrad_Nq_Ib) 4570 { 4571 // IEMOP_MNEMONIC2(RI, PSRAD, psrad, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4572 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_psrad_imm_u64); 4573 } 4574 4443 4575 4444 4576 /** Opcode 0x66 0x0f 0x72 11/4. */ 4445 FNIEMOP_STUB_1(iemOp_Grp13_psrad_Ux_Ib, uint8_t, bRm); 4577 FNIEMOPRM_DEF(iemOp_Grp13_psrad_Ux_Ib) 4578 { 4579 // IEMOP_MNEMONIC2(RI, PSRAD, psrad, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4580 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psrad_imm_u128); 4581 } 4582 4446 4583 4447 4584 /** Opcode 0x0f 0x72 11/6. */ 4448 FNIEMOP_STUB_1(iemOp_Grp13_pslld_Nq_Ib, uint8_t, bRm); 4585 FNIEMOPRM_DEF(iemOp_Grp13_pslld_Nq_Ib) 4586 { 4587 // IEMOP_MNEMONIC2(RI, PSLLD, pslld, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4588 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_pslld_imm_u64); 4589 } 4449 4590 4450 4591 /** Opcode 0x66 0x0f 0x72 11/6. */ 4451 FNIEMOP_STUB_1(iemOp_Grp13_pslld_Ux_Ib, uint8_t, bRm); 4592 FNIEMOPRM_DEF(iemOp_Grp13_pslld_Ux_Ib) 4593 { 4594 // IEMOP_MNEMONIC2(RI, PSLLD, pslld, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4595 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_pslld_imm_u128); 4596 } 4452 4597 4453 4598 … … 4481 4626 4482 4627 /** Opcode 0x0f 0x73 11/2. */ 4483 FNIEMOP_STUB_1(iemOp_Grp14_psrlq_Nq_Ib, uint8_t, bRm); 4628 FNIEMOPRM_DEF(iemOp_Grp14_psrlq_Nq_Ib) 4629 { 4630 // IEMOP_MNEMONIC2(RI, PSRLQ, psrlq, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4631 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_psrlq_imm_u64); 4632 } 4633 4484 4634 4485 4635 /** Opcode 0x66 0x0f 0x73 11/2. */ 4486 FNIEMOP_STUB_1(iemOp_Grp14_psrlq_Ux_Ib, uint8_t, bRm); 4636 FNIEMOPRM_DEF(iemOp_Grp14_psrlq_Ux_Ib) 4637 { 4638 // IEMOP_MNEMONIC2(RI, PSRLQ, psrlq, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4639 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psrlq_imm_u128); 4640 } 4641 4487 4642 4488 4643 /** Opcode 0x66 0x0f 0x73 11/3. */ 4489 FNIEMOP_STUB_1(iemOp_Grp14_psrldq_Ux_Ib, uint8_t, bRm); //NEXT 4644 FNIEMOPRM_DEF(iemOp_Grp14_psrldq_Ux_Ib) 4645 { 4646 // IEMOP_MNEMONIC2(RI, PSRLDQ, psrldq, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4647 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psrldq_imm_u128); 4648 } 4649 4490 4650 4491 4651 /** Opcode 0x0f 0x73 11/6. */ 4492 FNIEMOP_STUB_1(iemOp_Grp14_psllq_Nq_Ib, uint8_t, bRm); 4652 FNIEMOPRM_DEF(iemOp_Grp14_psllq_Nq_Ib) 4653 { 4654 // IEMOP_MNEMONIC2(RI, PSLLQ, psllq, Nq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 4655 return FNIEMOP_CALL_2(iemOpCommonMmx_Shift_Imm, bRm, iemAImpl_psllq_imm_u64); 4656 } 4657 4493 4658 4494 4659 /** Opcode 0x66 0x0f 0x73 11/6. */ 4495 FNIEMOP_STUB_1(iemOp_Grp14_psllq_Ux_Ib, uint8_t, bRm); 4660 FNIEMOPRM_DEF(iemOp_Grp14_psllq_Ux_Ib) 4661 { 4662 // IEMOP_MNEMONIC2(RI, PSLLQ, psllq, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4663 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_psllq_imm_u128); 4664 } 4665 4496 4666 4497 4667 /** Opcode 0x66 0x0f 0x73 11/7. */ 4498 FNIEMOP_STUB_1(iemOp_Grp14_pslldq_Ux_Ib, uint8_t, bRm); //NEXT 4668 FNIEMOPRM_DEF(iemOp_Grp14_pslldq_Ux_Ib) 4669 { 4670 // IEMOP_MNEMONIC2(RI, PSLLDQ, pslldq, Ux, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 4671 return FNIEMOP_CALL_2(iemOpCommonSse2_Shift_Imm, bRm, iemAImpl_pslldq_imm_u128); 4672 } 4499 4673 4500 4674 /** … … 9378 9552 9379 9553 /** Opcode 0x0f 0xd1 - psrlw Pq, Qq */ 9380 FNIEMOP_STUB(iemOp_psrlw_Pq_Qq); 9381 /** Opcode 0x66 0x0f 0xd1 - psrlw Vx, W */ 9382 FNIEMOP_STUB(iemOp_psrlw_Vx_W); 9554 FNIEMOP_DEF(iemOp_psrlw_Pq_Qq) 9555 { 9556 IEMOP_MNEMONIC2(RM, PSRLW, psrlw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 9557 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psrlw_u64); 9558 } 9559 9560 /** Opcode 0x66 0x0f 0xd1 - psrlw Vx, Wx */ 9561 FNIEMOP_DEF(iemOp_psrlw_Vx_Wx) 9562 { 9563 IEMOP_MNEMONIC2(RM, PSRLW, psrlw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 9564 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psrlw_u128); 9565 } 9566 9383 9567 /* Opcode 0xf3 0x0f 0xd1 - invalid */ 9384 9568 /* Opcode 0xf2 0x0f 0xd1 - invalid */ 9385 9569 9386 9570 /** Opcode 0x0f 0xd2 - psrld Pq, Qq */ 9387 FNIEMOP_STUB(iemOp_psrld_Pq_Qq); 9571 FNIEMOP_DEF(iemOp_psrld_Pq_Qq) 9572 { 9573 IEMOP_MNEMONIC2(RM, PSRLD, psrld, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 9574 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psrld_u64); 9575 } 9576 9577 9388 9578 /** Opcode 0x66 0x0f 0xd2 - psrld Vx, Wx */ 9389 FNIEMOP_STUB(iemOp_psrld_Vx_Wx); 9579 FNIEMOP_DEF(iemOp_psrld_Vx_Wx) 9580 { 9581 IEMOP_MNEMONIC2(RM, PSRLD, psrld, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 9582 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psrld_u128); 9583 } 9584 9585 9390 9586 /* Opcode 0xf3 0x0f 0xd2 - invalid */ 9391 9587 /* Opcode 0xf2 0x0f 0xd2 - invalid */ 9392 9588 9393 9589 /** Opcode 0x0f 0xd3 - psrlq Pq, Qq */ 9394 FNIEMOP_STUB(iemOp_psrlq_Pq_Qq); 9590 FNIEMOP_DEF(iemOp_psrlq_Pq_Qq) 9591 { 9592 IEMOP_MNEMONIC2(RM, PSRLQ, psrlq, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9593 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psrlq_u64); 9594 } 9595 9596 9395 9597 /** Opcode 0x66 0x0f 0xd3 - psrlq Vx, Wx */ 9396 FNIEMOP_STUB(iemOp_psrlq_Vx_Wx); 9598 FNIEMOP_DEF(iemOp_psrlq_Vx_Wx) 9599 { 9600 IEMOP_MNEMONIC2(RM, PSRLQ, psrlq, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 9601 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psrlq_u128); 9602 } 9603 9604 9397 9605 /* Opcode 0xf3 0x0f 0xd3 - invalid */ 9398 9606 /* Opcode 0xf2 0x0f 0xd3 - invalid */ … … 9419 9627 9420 9628 /** Opcode 0x0f 0xd5 - pmullw Pq, Qq */ 9421 FNIEMOP_STUB(iemOp_pmullw_Pq_Qq); 9629 FNIEMOP_DEF(iemOp_pmullw_Pq_Qq) 9630 { 9631 IEMOP_MNEMONIC2(RM, PMULLW, pmullw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9632 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_pmullw_u64); 9633 } 9634 9422 9635 /** Opcode 0x66 0x0f 0xd5 - pmullw Vx, Wx */ 9423 FNIEMOP_STUB(iemOp_pmullw_Vx_Wx); 9636 FNIEMOP_DEF(iemOp_pmullw_Vx_Wx) 9637 { 9638 IEMOP_MNEMONIC2(RM, PMULLW, pmullw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9639 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_pmullw_u128); 9640 } 9641 9642 9424 9643 /* Opcode 0xf3 0x0f 0xd5 - invalid */ 9425 9644 /* Opcode 0xf2 0x0f 0xd5 - invalid */ … … 9640 9859 9641 9860 /** Opcode 0x0f 0xd8 - psubusb Pq, Qq */ 9642 FNIEMOP_STUB(iemOp_psubusb_Pq_Qq); 9643 /** Opcode 0x66 0x0f 0xd8 - psubusb Vx, W */ 9644 FNIEMOP_STUB(iemOp_psubusb_Vx_W); 9861 FNIEMOP_DEF(iemOp_psubusb_Pq_Qq) 9862 { 9863 IEMOP_MNEMONIC2(RM, PSUBUSB, psubusb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9864 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_psubusb_u64); 9865 } 9866 9867 9868 /** Opcode 0x66 0x0f 0xd8 - psubusb Vx, Wx */ 9869 FNIEMOP_DEF(iemOp_psubusb_Vx_Wx) 9870 { 9871 IEMOP_MNEMONIC2(RM, PSUBUSB, psubusb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9872 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_psubusb_u128); 9873 } 9874 9875 9645 9876 /* Opcode 0xf3 0x0f 0xd8 - invalid */ 9646 9877 /* Opcode 0xf2 0x0f 0xd8 - invalid */ 9647 9878 9648 9879 /** Opcode 0x0f 0xd9 - psubusw Pq, Qq */ 9649 FNIEMOP_STUB(iemOp_psubusw_Pq_Qq); 9880 FNIEMOP_DEF(iemOp_psubusw_Pq_Qq) 9881 { 9882 IEMOP_MNEMONIC2(RM, PSUBUSW, psubusw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9883 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_psubusw_u64); 9884 } 9885 9886 9650 9887 /** Opcode 0x66 0x0f 0xd9 - psubusw Vx, Wx */ 9651 FNIEMOP_STUB(iemOp_psubusw_Vx_Wx); 9888 FNIEMOP_DEF(iemOp_psubusw_Vx_Wx) 9889 { 9890 IEMOP_MNEMONIC2(RM, PSUBUSW, psubusw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9891 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_psubusw_u128); 9892 } 9893 9894 9652 9895 /* Opcode 0xf3 0x0f 0xd9 - invalid */ 9653 9896 /* Opcode 0xf2 0x0f 0xd9 - invalid */ … … 9680 9923 9681 9924 /** Opcode 0x0f 0xdc - paddusb Pq, Qq */ 9682 FNIEMOP_STUB(iemOp_paddusb_Pq_Qq); 9925 FNIEMOP_DEF(iemOp_paddusb_Pq_Qq) 9926 { 9927 IEMOP_MNEMONIC2(RM, PADDUSB, paddusb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9928 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_paddusb_u64); 9929 } 9930 9931 9683 9932 /** Opcode 0x66 0x0f 0xdc - paddusb Vx, Wx */ 9684 FNIEMOP_STUB(iemOp_paddusb_Vx_Wx); 9933 FNIEMOP_DEF(iemOp_paddusb_Vx_Wx) 9934 { 9935 IEMOP_MNEMONIC2(RM, PADDUSB, paddusb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9936 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_paddusb_u128); 9937 } 9938 9939 9685 9940 /* Opcode 0xf3 0x0f 0xdc - invalid */ 9686 9941 /* Opcode 0xf2 0x0f 0xdc - invalid */ 9687 9942 9688 9943 /** Opcode 0x0f 0xdd - paddusw Pq, Qq */ 9689 FNIEMOP_STUB(iemOp_paddusw_Pq_Qq); 9944 FNIEMOP_DEF(iemOp_paddusw_Pq_Qq) 9945 { 9946 IEMOP_MNEMONIC2(RM, PADDUSW, paddusw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9947 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_paddusw_u64); 9948 } 9949 9950 9690 9951 /** Opcode 0x66 0x0f 0xdd - paddusw Vx, Wx */ 9691 FNIEMOP_STUB(iemOp_paddusw_Vx_Wx); 9952 FNIEMOP_DEF(iemOp_paddusw_Vx_Wx) 9953 { 9954 IEMOP_MNEMONIC2(RM, PADDUSW, paddusw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 9955 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_paddusw_u128); 9956 } 9957 9958 9692 9959 /* Opcode 0xf3 0x0f 0xdd - invalid */ 9693 9960 /* Opcode 0xf2 0x0f 0xdd - invalid */ … … 9696 9963 FNIEMOP_STUB(iemOp_pmaxub_Pq_Qq); 9697 9964 /** Opcode 0x66 0x0f 0xde - pmaxub Vx, W */ 9698 FNIEMOP_STUB(iemOp_pmaxub_Vx_W );9965 FNIEMOP_STUB(iemOp_pmaxub_Vx_Wx); 9699 9966 /* Opcode 0xf3 0x0f 0xde - invalid */ 9700 9967 /* Opcode 0xf2 0x0f 0xde - invalid */ … … 9729 9996 /** Opcode 0x0f 0xe1 - psraw Pq, Qq */ 9730 9997 FNIEMOP_STUB(iemOp_psraw_Pq_Qq); 9731 /** Opcode 0x66 0x0f 0xe1 - psraw Vx, W */9732 FNIEMOP_STUB(iemOp_psraw_Vx_W );9998 /** Opcode 0x66 0x0f 0xe1 - psraw Vx, Wx */ 9999 FNIEMOP_STUB(iemOp_psraw_Vx_Wx); 9733 10000 /* Opcode 0xf3 0x0f 0xe1 - invalid */ 9734 10001 /* Opcode 0xf2 0x0f 0xe1 - invalid */ … … 9750 10017 /** Opcode 0x0f 0xe4 - pmulhuw Pq, Qq */ 9751 10018 FNIEMOP_STUB(iemOp_pmulhuw_Pq_Qq); 9752 /** Opcode 0x66 0x0f 0xe4 - pmulhuw Vx, W */9753 FNIEMOP_STUB(iemOp_pmulhuw_Vx_W );10019 /** Opcode 0x66 0x0f 0xe4 - pmulhuw Vx, Wx */ 10020 FNIEMOP_STUB(iemOp_pmulhuw_Vx_Wx); 9754 10021 /* Opcode 0xf3 0x0f 0xe4 - invalid */ 9755 10022 /* Opcode 0xf2 0x0f 0xe4 - invalid */ 9756 10023 9757 10024 /** Opcode 0x0f 0xe5 - pmulhw Pq, Qq */ 9758 FNIEMOP_STUB(iemOp_pmulhw_Pq_Qq); 10025 FNIEMOP_DEF(iemOp_pmulhw_Pq_Qq) 10026 { 10027 IEMOP_MNEMONIC2(RM, PMULHW, pmulhw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10028 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_pmulhw_u64); 10029 } 10030 10031 9759 10032 /** Opcode 0x66 0x0f 0xe5 - pmulhw Vx, Wx */ 9760 FNIEMOP_STUB(iemOp_pmulhw_Vx_Wx); 10033 FNIEMOP_DEF(iemOp_pmulhw_Vx_Wx) 10034 { 10035 IEMOP_MNEMONIC2(RM, PMULHW, pmulhw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10036 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_pmulhw_u128); 10037 } 10038 10039 9761 10040 /* Opcode 0xf3 0x0f 0xe5 - invalid */ 9762 10041 /* Opcode 0xf2 0x0f 0xe5 - invalid */ … … 9870 10149 9871 10150 /** Opcode 0x0f 0xe8 - psubsb Pq, Qq */ 9872 FNIEMOP_STUB(iemOp_psubsb_Pq_Qq); 9873 /** Opcode 0x66 0x0f 0xe8 - psubsb Vx, W */ 9874 FNIEMOP_STUB(iemOp_psubsb_Vx_W); 10151 FNIEMOP_DEF(iemOp_psubsb_Pq_Qq) 10152 { 10153 IEMOP_MNEMONIC2(RM, PSUBSB, psubsb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10154 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_psubsb_u64); 10155 } 10156 10157 10158 /** Opcode 0x66 0x0f 0xe8 - psubsb Vx, Wx */ 10159 FNIEMOP_DEF(iemOp_psubsb_Vx_Wx) 10160 { 10161 IEMOP_MNEMONIC2(RM, PSUBSB, psubsb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10162 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_psubsb_u128); 10163 } 10164 10165 9875 10166 /* Opcode 0xf3 0x0f 0xe8 - invalid */ 9876 10167 /* Opcode 0xf2 0x0f 0xe8 - invalid */ 9877 10168 9878 10169 /** Opcode 0x0f 0xe9 - psubsw Pq, Qq */ 9879 FNIEMOP_STUB(iemOp_psubsw_Pq_Qq); 10170 FNIEMOP_DEF(iemOp_psubsw_Pq_Qq) 10171 { 10172 IEMOP_MNEMONIC2(RM, PSUBSW, psubsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10173 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_psubsw_u64); 10174 } 10175 10176 9880 10177 /** Opcode 0x66 0x0f 0xe9 - psubsw Vx, Wx */ 9881 FNIEMOP_STUB(iemOp_psubsw_Vx_Wx); 10178 FNIEMOP_DEF(iemOp_psubsw_Vx_Wx) 10179 { 10180 IEMOP_MNEMONIC2(RM, PSUBSW, psubsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10181 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_psubsw_u128); 10182 } 10183 10184 9882 10185 /* Opcode 0xf3 0x0f 0xe9 - invalid */ 9883 10186 /* Opcode 0xf2 0x0f 0xe9 - invalid */ … … 9899 10202 9900 10203 9901 /** Opcode 0x66 0x0f 0xeb - por Vx, W */9902 FNIEMOP_DEF(iemOp_por_Vx_W )10204 /** Opcode 0x66 0x0f 0xeb - por Vx, Wx */ 10205 FNIEMOP_DEF(iemOp_por_Vx_Wx) 9903 10206 { 9904 10207 IEMOP_MNEMONIC2(RM, POR, por, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); … … 9911 10214 9912 10215 /** Opcode 0x0f 0xec - paddsb Pq, Qq */ 9913 FNIEMOP_STUB(iemOp_paddsb_Pq_Qq); 10216 FNIEMOP_DEF(iemOp_paddsb_Pq_Qq) 10217 { 10218 IEMOP_MNEMONIC2(RM, PADDSB, paddsb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10219 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_paddsb_u64); 10220 } 10221 10222 9914 10223 /** Opcode 0x66 0x0f 0xec - paddsb Vx, Wx */ 9915 FNIEMOP_STUB(iemOp_paddsb_Vx_Wx); 10224 FNIEMOP_DEF(iemOp_paddsb_Vx_Wx) 10225 { 10226 IEMOP_MNEMONIC2(RM, PADDSB, paddsb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10227 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_paddsb_u128); 10228 } 10229 10230 9916 10231 /* Opcode 0xf3 0x0f 0xec - invalid */ 9917 10232 /* Opcode 0xf2 0x0f 0xec - invalid */ 9918 10233 9919 10234 /** Opcode 0x0f 0xed - paddsw Pq, Qq */ 9920 FNIEMOP_STUB(iemOp_paddsw_Pq_Qq); 10235 FNIEMOP_DEF(iemOp_paddsw_Pq_Qq) 10236 { 10237 IEMOP_MNEMONIC2(RM, PADDSW, paddsw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10238 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_paddsw_u64); 10239 } 10240 10241 9921 10242 /** Opcode 0x66 0x0f 0xed - paddsw Vx, Wx */ 9922 FNIEMOP_STUB(iemOp_paddsw_Vx_Wx); 10243 FNIEMOP_DEF(iemOp_paddsw_Vx_Wx) 10244 { 10245 IEMOP_MNEMONIC2(RM, PADDSW, paddsw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES); 10246 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_paddsw_u128); 10247 } 10248 10249 9923 10250 /* Opcode 0xf3 0x0f 0xed - invalid */ 9924 10251 /* Opcode 0xf2 0x0f 0xed - invalid */ … … 9926 10253 /** Opcode 0x0f 0xee - pmaxsw Pq, Qq */ 9927 10254 FNIEMOP_STUB(iemOp_pmaxsw_Pq_Qq); 9928 /** Opcode 0x66 0x0f 0xee - pmaxsw Vx, W */9929 FNIEMOP_STUB(iemOp_pmaxsw_Vx_W );10255 /** Opcode 0x66 0x0f 0xee - pmaxsw Vx, Wx */ 10256 FNIEMOP_STUB(iemOp_pmaxsw_Vx_Wx); 9930 10257 /* Opcode 0xf3 0x0f 0xee - invalid */ 9931 10258 /* Opcode 0xf2 0x0f 0xee - invalid */ … … 9956 10283 FNIEMOP_STUB(iemOp_lddqu_Vx_Mx); 9957 10284 10285 9958 10286 /** Opcode 0x0f 0xf1 - psllw Pq, Qq */ 9959 FNIEMOP_STUB(iemOp_psllw_Pq_Qq); 9960 /** Opcode 0x66 0x0f 0xf1 - psllw Vx, W */ 9961 FNIEMOP_STUB(iemOp_psllw_Vx_W); 10287 FNIEMOP_DEF(iemOp_psllw_Pq_Qq) 10288 { 10289 IEMOP_MNEMONIC2(RM, PSLLW, psllw, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 10290 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psllw_u64); 10291 } 10292 10293 10294 /** Opcode 0x66 0x0f 0xf1 - psllw Vx, Wx */ 10295 FNIEMOP_DEF(iemOp_psllw_Vx_Wx) 10296 { 10297 IEMOP_MNEMONIC2(RM, PSLLW, psllw, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 10298 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psllw_u128); 10299 } 10300 10301 9962 10302 /* Opcode 0xf2 0x0f 0xf1 - invalid */ 9963 10303 9964 10304 /** Opcode 0x0f 0xf2 - pslld Pq, Qq */ 9965 FNIEMOP_STUB(iemOp_pslld_Pq_Qq); 10305 FNIEMOP_DEF(iemOp_pslld_Pq_Qq) 10306 { 10307 IEMOP_MNEMONIC2(RM, PSLLD, pslld, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 10308 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_pslld_u64); 10309 } 10310 10311 9966 10312 /** Opcode 0x66 0x0f 0xf2 - pslld Vx, Wx */ 9967 FNIEMOP_STUB(iemOp_pslld_Vx_Wx); 10313 FNIEMOP_DEF(iemOp_pslld_Vx_Wx) 10314 { 10315 IEMOP_MNEMONIC2(RM, PSLLD, pslld, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 10316 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_pslld_u128); 10317 } 10318 10319 9968 10320 /* Opcode 0xf2 0x0f 0xf2 - invalid */ 9969 10321 9970 10322 /** Opcode 0x0f 0xf3 - psllq Pq, Qq */ 9971 FNIEMOP_STUB(iemOp_psllq_Pq_Qq); 10323 FNIEMOP_DEF(iemOp_psllq_Pq_Qq) 10324 { 10325 IEMOP_MNEMONIC2(RM, PSLLQ, psllq, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 10326 return FNIEMOP_CALL_1(iemOpCommonMmxOpt_FullFull_To_Full, iemAImpl_psllq_u64); 10327 } 10328 10329 9972 10330 /** Opcode 0x66 0x0f 0xf3 - psllq Vx, Wx */ 9973 FNIEMOP_STUB(iemOp_psllq_Vx_Wx); 10331 FNIEMOP_DEF(iemOp_psllq_Vx_Wx) 10332 { 10333 IEMOP_MNEMONIC2(RM, PSLLQ, psllq, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 10334 return FNIEMOP_CALL_1(iemOpCommonSse2Opt_FullFull_To_Full, iemAImpl_psllq_u128); 10335 } 10336 9974 10337 /* Opcode 0xf2 0x0f 0xf3 - invalid */ 9975 10338 … … 9977 10340 FNIEMOP_STUB(iemOp_pmuludq_Pq_Qq); 9978 10341 /** Opcode 0x66 0x0f 0xf4 - pmuludq Vx, W */ 9979 FNIEMOP_STUB(iemOp_pmuludq_Vx_W );10342 FNIEMOP_STUB(iemOp_pmuludq_Vx_Wx); 9980 10343 /* Opcode 0xf2 0x0f 0xf4 - invalid */ 9981 10344 9982 10345 /** Opcode 0x0f 0xf5 - pmaddwd Pq, Qq */ 9983 FNIEMOP_STUB(iemOp_pmaddwd_Pq_Qq); 10346 FNIEMOP_DEF(iemOp_pmaddwd_Pq_Qq) 10347 { 10348 IEMOP_MNEMONIC2(RM, PMADDWD, pmaddwd, Pq, Qq, DISOPTYPE_HARMLESS | DISOPTYPE_MMX, 0); 10349 return FNIEMOP_CALL_1(iemOpCommonMmx_FullFull_To_Full, iemAImpl_pmaddwd_u64); 10350 } 10351 10352 9984 10353 /** Opcode 0x66 0x0f 0xf5 - pmaddwd Vx, Wx */ 9985 FNIEMOP_STUB(iemOp_pmaddwd_Vx_Wx); 10354 FNIEMOP_DEF(iemOp_pmaddwd_Vx_Wx) 10355 { 10356 IEMOP_MNEMONIC2(RM, PMADDWD, pmaddwd, Vx, Wx, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 10357 return FNIEMOP_CALL_1(iemOpCommonSse2_FullFull_To_Full, iemAImpl_pmaddwd_u128); 10358 } 10359 9986 10360 /* Opcode 0xf2 0x0f 0xf5 - invalid */ 9987 10361 … … 10273 10647 /* 0x65 */ iemOp_pcmpgtw_Pq_Qq, iemOp_pcmpgtw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10274 10648 /* 0x66 */ iemOp_pcmpgtd_Pq_Qq, iemOp_pcmpgtd_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10275 /* 0x67 */ iemOp_packuswb_Pq_Qq, iemOp_packuswb_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10649 /* 0x67 */ iemOp_packuswb_Pq_Qq, iemOp_packuswb_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10276 10650 /* 0x68 */ iemOp_punpckhbw_Pq_Qq, iemOp_punpckhbw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10277 10651 /* 0x69 */ iemOp_punpckhwd_Pq_Qq, iemOp_punpckhwd_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10278 /* 0x6a */ iemOp_punpckhdq_Pq_Qq, iemOp_punpckhdq_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10652 /* 0x6a */ iemOp_punpckhdq_Pq_Qq, iemOp_punpckhdq_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10279 10653 /* 0x6b */ iemOp_packssdw_Pq_Qd, iemOp_packssdw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10280 10654 /* 0x6c */ iemOp_InvalidNeedRM, iemOp_punpcklqdq_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10281 /* 0x6d */ iemOp_InvalidNeedRM, iemOp_punpckhqdq_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10655 /* 0x6d */ iemOp_InvalidNeedRM, iemOp_punpckhqdq_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10282 10656 /* 0x6e */ iemOp_movd_q_Pd_Ey, iemOp_movd_q_Vy_Ey, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10283 10657 /* 0x6f */ iemOp_movq_Pq_Qq, iemOp_movdqa_Vdq_Wdq, iemOp_movdqu_Vdq_Wdq, iemOp_InvalidNeedRM, … … 10387 10761 10388 10762 /* 0xd0 */ iemOp_InvalidNeedRM, iemOp_addsubpd_Vpd_Wpd, iemOp_InvalidNeedRM, iemOp_addsubps_Vps_Wps, 10389 /* 0xd1 */ iemOp_psrlw_Pq_Qq, iemOp_psrlw_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10763 /* 0xd1 */ iemOp_psrlw_Pq_Qq, iemOp_psrlw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10390 10764 /* 0xd2 */ iemOp_psrld_Pq_Qq, iemOp_psrld_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10391 10765 /* 0xd3 */ iemOp_psrlq_Pq_Qq, iemOp_psrlq_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, … … 10394 10768 /* 0xd6 */ iemOp_InvalidNeedRM, iemOp_movq_Wq_Vq, iemOp_movq2dq_Vdq_Nq, iemOp_movdq2q_Pq_Uq, 10395 10769 /* 0xd7 */ iemOp_pmovmskb_Gd_Nq, iemOp_pmovmskb_Gd_Ux, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10396 /* 0xd8 */ iemOp_psubusb_Pq_Qq, iemOp_psubusb_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10770 /* 0xd8 */ iemOp_psubusb_Pq_Qq, iemOp_psubusb_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10397 10771 /* 0xd9 */ iemOp_psubusw_Pq_Qq, iemOp_psubusw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10398 10772 /* 0xda */ iemOp_pminub_Pq_Qq, iemOp_pminub_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, … … 10400 10774 /* 0xdc */ iemOp_paddusb_Pq_Qq, iemOp_paddusb_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10401 10775 /* 0xdd */ iemOp_paddusw_Pq_Qq, iemOp_paddusw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10402 /* 0xde */ iemOp_pmaxub_Pq_Qq, iemOp_pmaxub_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10776 /* 0xde */ iemOp_pmaxub_Pq_Qq, iemOp_pmaxub_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10403 10777 /* 0xdf */ iemOp_pandn_Pq_Qq, iemOp_pandn_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10404 10778 10405 10779 /* 0xe0 */ iemOp_pavgb_Pq_Qq, iemOp_pavgb_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10406 /* 0xe1 */ iemOp_psraw_Pq_Qq, iemOp_psraw_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10780 /* 0xe1 */ iemOp_psraw_Pq_Qq, iemOp_psraw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10407 10781 /* 0xe2 */ iemOp_psrad_Pq_Qq, iemOp_psrad_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10408 10782 /* 0xe3 */ iemOp_pavgw_Pq_Qq, iemOp_pavgw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10409 /* 0xe4 */ iemOp_pmulhuw_Pq_Qq, iemOp_pmulhuw_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10783 /* 0xe4 */ iemOp_pmulhuw_Pq_Qq, iemOp_pmulhuw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10410 10784 /* 0xe5 */ iemOp_pmulhw_Pq_Qq, iemOp_pmulhw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10411 10785 /* 0xe6 */ iemOp_InvalidNeedRM, iemOp_cvttpd2dq_Vx_Wpd, iemOp_cvtdq2pd_Vx_Wpd, iemOp_cvtpd2dq_Vx_Wpd, 10412 10786 /* 0xe7 */ iemOp_movntq_Mq_Pq, iemOp_movntdq_Mdq_Vdq, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10413 /* 0xe8 */ iemOp_psubsb_Pq_Qq, iemOp_psubsb_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10787 /* 0xe8 */ iemOp_psubsb_Pq_Qq, iemOp_psubsb_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10414 10788 /* 0xe9 */ iemOp_psubsw_Pq_Qq, iemOp_psubsw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10415 10789 /* 0xea */ iemOp_pminsw_Pq_Qq, iemOp_pminsw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10416 /* 0xeb */ iemOp_por_Pq_Qq, iemOp_por_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10790 /* 0xeb */ iemOp_por_Pq_Qq, iemOp_por_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10417 10791 /* 0xec */ iemOp_paddsb_Pq_Qq, iemOp_paddsb_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10418 10792 /* 0xed */ iemOp_paddsw_Pq_Qq, iemOp_paddsw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10419 /* 0xee */ iemOp_pmaxsw_Pq_Qq, iemOp_pmaxsw_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10793 /* 0xee */ iemOp_pmaxsw_Pq_Qq, iemOp_pmaxsw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10420 10794 /* 0xef */ iemOp_pxor_Pq_Qq, iemOp_pxor_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10421 10795 10422 10796 /* 0xf0 */ iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, iemOp_lddqu_Vx_Mx, 10423 /* 0xf1 */ iemOp_psllw_Pq_Qq, iemOp_psllw_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10797 /* 0xf1 */ iemOp_psllw_Pq_Qq, iemOp_psllw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10424 10798 /* 0xf2 */ iemOp_pslld_Pq_Qq, iemOp_pslld_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10425 10799 /* 0xf3 */ iemOp_psllq_Pq_Qq, iemOp_psllq_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10426 /* 0xf4 */ iemOp_pmuludq_Pq_Qq, iemOp_pmuludq_Vx_W ,iemOp_InvalidNeedRM, iemOp_InvalidNeedRM,10800 /* 0xf4 */ iemOp_pmuludq_Pq_Qq, iemOp_pmuludq_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10427 10801 /* 0xf5 */ iemOp_pmaddwd_Pq_Qq, iemOp_pmaddwd_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, 10428 10802 /* 0xf6 */ iemOp_psadbw_Pq_Qq, iemOp_psadbw_Vx_Wx, iemOp_InvalidNeedRM, iemOp_InvalidNeedRM, -
trunk/src/VBox/VMM/include/IEMInternal.h
r95578 r95940 1767 1767 FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpeqb_u64, iemAImpl_pcmpeqw_u64, iemAImpl_pcmpeqd_u64; 1768 1768 FNIEMAIMPLMEDIAF2U64 iemAImpl_pcmpgtb_u64, iemAImpl_pcmpgtw_u64, iemAImpl_pcmpgtd_u64; 1769 FNIEMAIMPLMEDIAF2U64 iemAImpl_paddb_u64 ;1770 FNIEMAIMPLMEDIAF2U64 iemAImpl_paddw_u64 ;1769 FNIEMAIMPLMEDIAF2U64 iemAImpl_paddb_u64, iemAImpl_paddsb_u64, iemAImpl_paddusb_u64; 1770 FNIEMAIMPLMEDIAF2U64 iemAImpl_paddw_u64, iemAImpl_paddsw_u64, iemAImpl_paddusw_u64; 1771 1771 FNIEMAIMPLMEDIAF2U64 iemAImpl_paddd_u64; 1772 1772 FNIEMAIMPLMEDIAF2U64 iemAImpl_paddq_u64; 1773 FNIEMAIMPLMEDIAF2U64 iemAImpl_psubb_u64 ;1774 FNIEMAIMPLMEDIAF2U64 iemAImpl_psubw_u64 ;1773 FNIEMAIMPLMEDIAF2U64 iemAImpl_psubb_u64, iemAImpl_psubsb_u64, iemAImpl_psubusb_u64; 1774 FNIEMAIMPLMEDIAF2U64 iemAImpl_psubw_u64, iemAImpl_psubsw_u64, iemAImpl_psubusw_u64; 1775 1775 FNIEMAIMPLMEDIAF2U64 iemAImpl_psubd_u64; 1776 1776 FNIEMAIMPLMEDIAF2U64 iemAImpl_psubq_u64; 1777 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packsswb_u64; 1777 FNIEMAIMPLMEDIAF2U64 iemAImpl_pmaddwd_u64; 1778 FNIEMAIMPLMEDIAF2U64 iemAImpl_pmullw_u64, iemAImpl_pmulhw_u64; 1779 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllw_u64, iemAImpl_psrlw_u64, iemAImpl_psraw_u64; 1780 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_pslld_u64, iemAImpl_psrld_u64, iemAImpl_psrad_u64; 1781 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_psllq_u64, iemAImpl_psrlq_u64; 1782 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packsswb_u64, iemAImpl_packuswb_u64; 1778 1783 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packssdw_u64; 1779 FNIEMAIMPLMEDIAOPTF2U64 iemAImpl_packuswb_u64;1780 1784 1781 1785 FNIEMAIMPLMEDIAF2U128 iemAImpl_pshufb_u128, iemAImpl_pshufb_u128_fallback; … … 1785 1789 FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtb_u128, iemAImpl_pcmpgtw_u128, iemAImpl_pcmpgtd_u128; 1786 1790 FNIEMAIMPLMEDIAF2U128 iemAImpl_pcmpgtq_u128, iemAImpl_pcmpgtq_u128_fallback; 1787 FNIEMAIMPLMEDIAF2U128 iemAImpl_paddb_u128 ;1788 FNIEMAIMPLMEDIAF2U128 iemAImpl_paddw_u128 ;1791 FNIEMAIMPLMEDIAF2U128 iemAImpl_paddb_u128, iemAImpl_paddsb_u128, iemAImpl_paddusb_u128; 1792 FNIEMAIMPLMEDIAF2U128 iemAImpl_paddw_u128, iemAImpl_paddsw_u128, iemAImpl_paddusw_u128; 1789 1793 FNIEMAIMPLMEDIAF2U128 iemAImpl_paddd_u128; 1790 1794 FNIEMAIMPLMEDIAF2U128 iemAImpl_paddq_u128; 1791 FNIEMAIMPLMEDIAF2U128 iemAImpl_psubb_u128 ;1792 FNIEMAIMPLMEDIAF2U128 iemAImpl_psubw_u128 ;1795 FNIEMAIMPLMEDIAF2U128 iemAImpl_psubb_u128, iemAImpl_psubsb_u128, iemAImpl_psubusb_u128; 1796 FNIEMAIMPLMEDIAF2U128 iemAImpl_psubw_u128, iemAImpl_psubsw_u128, iemAImpl_psubusw_u128; 1793 1797 FNIEMAIMPLMEDIAF2U128 iemAImpl_psubd_u128; 1794 1798 FNIEMAIMPLMEDIAF2U128 iemAImpl_psubq_u128; 1795 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128; 1796 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128; 1797 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packuswb_u128; 1798 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packusdw_u128; 1799 FNIEMAIMPLMEDIAF2U128 iemAImpl_pmullw_u128, iemAImpl_pmulhw_u128; 1800 FNIEMAIMPLMEDIAF2U128 iemAImpl_pmaddwd_u128; 1801 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128, iemAImpl_packuswb_u128; 1802 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128, iemAImpl_packusdw_u128; 1803 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllw_u128, iemAImpl_psrlw_u128, iemAImpl_psraw_u128; 1804 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_pslld_u128, iemAImpl_psrld_u128, iemAImpl_psrad_u128; 1805 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_psllq_u128, iemAImpl_psrlq_u128; 1799 1806 1800 1807 FNIEMAIMPLMEDIAF3U128 iemAImpl_vpshufb_u128, iemAImpl_vpshufb_u128_fallback; … … 1891 1898 #endif 1892 1899 FNIEMAIMPLMEDIAPSHUFU256 iemAImpl_vpshufhw_u256_fallback, iemAImpl_vpshuflw_u256_fallback, iemAImpl_vpshufd_u256_fallback; 1900 /** @} */ 1901 1902 /** @name Media (SSE/MMX/AVX) operation: Shift Immediate Stuff (evil) 1903 * @{ */ 1904 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU64,(uint64_t *puDst, uint8_t bShift)); 1905 typedef FNIEMAIMPLMEDIAPSHIFTU64 *PFNIEMAIMPLMEDIAPSHIFTU64; 1906 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU128,(PRTUINT128U puDst, uint8_t bShift)); 1907 typedef FNIEMAIMPLMEDIAPSHIFTU128 *PFNIEMAIMPLMEDIAPSHIFTU128; 1908 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLMEDIAPSHIFTU256,(PRTUINT256U puDst, uint8_t bShift)); 1909 typedef FNIEMAIMPLMEDIAPSHIFTU256 *PFNIEMAIMPLMEDIAPSHIFTU256; 1910 FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psllw_imm_u64, iemAImpl_pslld_imm_u64, iemAImpl_psllq_imm_u64; 1911 FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psrlw_imm_u64, iemAImpl_psrld_imm_u64, iemAImpl_psrlq_imm_u64; 1912 FNIEMAIMPLMEDIAPSHIFTU64 iemAImpl_psraw_imm_u64, iemAImpl_psrad_imm_u64; 1913 FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psllw_imm_u128, iemAImpl_pslld_imm_u128, iemAImpl_psllq_imm_u128; 1914 FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psrlw_imm_u128, iemAImpl_psrld_imm_u128, iemAImpl_psrlq_imm_u128; 1915 FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_psraw_imm_u128, iemAImpl_psrad_imm_u128; 1916 FNIEMAIMPLMEDIAPSHIFTU128 iemAImpl_pslldq_imm_u128, iemAImpl_psrldq_imm_u128; 1893 1917 /** @} */ 1894 1918 -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r95540 r95940 369 369 #define iemAImpl_psubq_u128 NULL 370 370 371 #define iemAImpl_psllw_u64 NULL 372 #define iemAImpl_psrlw_u64 NULL 373 #define iemAImpl_psraw_u64 NULL 374 #define iemAImpl_pslld_u64 NULL 375 #define iemAImpl_psrld_u64 NULL 376 #define iemAImpl_psrad_u64 NULL 377 #define iemAImpl_psllq_u64 NULL 378 #define iemAImpl_psrlq_u64 NULL 379 #define iemAImpl_psraq_u64 NULL 380 381 #define iemAImpl_psllw_u128 NULL 382 #define iemAImpl_psrlw_u128 NULL 383 #define iemAImpl_psraw_u128 NULL 384 #define iemAImpl_pslld_u128 NULL 385 #define iemAImpl_psrld_u128 NULL 386 #define iemAImpl_psrad_u128 NULL 387 #define iemAImpl_psllq_u128 NULL 388 #define iemAImpl_psrlq_u128 NULL 389 #define iemAImpl_psraq_u128 NULL 390 391 #define iemAImpl_psllw_imm_u64 NULL 392 #define iemAImpl_psrlw_imm_u64 NULL 393 #define iemAImpl_psraw_imm_u64 NULL 394 #define iemAImpl_pslld_imm_u64 NULL 395 #define iemAImpl_psrld_imm_u64 NULL 396 #define iemAImpl_psrad_imm_u64 NULL 397 #define iemAImpl_psllq_imm_u64 NULL 398 #define iemAImpl_psrlq_imm_u64 NULL 399 #define iemAImpl_psraq_imm_u64 NULL 400 401 #define iemAImpl_psllw_imm_u128 NULL 402 #define iemAImpl_psrlw_imm_u128 NULL 403 #define iemAImpl_psraw_imm_u128 NULL 404 #define iemAImpl_pslld_imm_u128 NULL 405 #define iemAImpl_psrld_imm_u128 NULL 406 #define iemAImpl_psrad_imm_u128 NULL 407 #define iemAImpl_psllq_imm_u128 NULL 408 #define iemAImpl_psrlq_imm_u128 NULL 409 #define iemAImpl_psraq_imm_u128 NULL 410 411 #define iemAImpl_pslldq_imm_u128 NULL 412 #define iemAImpl_psrldq_imm_u128 NULL 413 414 #define iemAImpl_paddsb_u64 NULL 415 #define iemAImpl_paddusb_u64 NULL 416 #define iemAImpl_paddsw_u64 NULL 417 #define iemAImpl_paddusw_u64 NULL 418 #define iemAImpl_psubsb_u64 NULL 419 #define iemAImpl_psubusb_u64 NULL 420 #define iemAImpl_psubsw_u64 NULL 421 #define iemAImpl_psubusw_u64 NULL 422 423 #define iemAImpl_paddsb_u128 NULL 424 #define iemAImpl_paddusb_u128 NULL 425 #define iemAImpl_paddsw_u128 NULL 426 #define iemAImpl_paddusw_u128 NULL 427 #define iemAImpl_psubsb_u128 NULL 428 #define iemAImpl_psubusb_u128 NULL 429 #define iemAImpl_psubsw_u128 NULL 430 #define iemAImpl_psubusw_u128 NULL 431 432 #define iemAImpl_pmullw_u64 NULL 433 #define iemAImpl_pmulhw_u64 NULL 434 #define iemAImpl_pmaddwd_u64 NULL 435 436 #define iemAImpl_pmullw_u128 NULL 437 #define iemAImpl_pmulhw_u128 NULL 438 #define iemAImpl_pmaddwd_u128 NULL 371 439 372 440 /** @} */
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