Changeset 96034 in vbox

Timestamp:

Aug 4, 2022 8:00:12 PM (2 years ago)

Author:

vboxsync

Message:

VMM/IEM: Implement [v]psign{b,w,d} instructions, bugref:9898

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllAImpl.asm (modified) (2 diffs)
• VMMAll/IEMAllAImplC.cpp (modified) (1 diff)
• VMMAll/IEMAllInstructionsThree0f38.cpp.h (modified) (1 diff)
• VMMAll/IEMAllInstructionsVexMap2.cpp.h (modified) (1 diff)
• include/IEMInternal.h (modified) (4 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm

@@ -3649 +3649 @@
 IEMIMPL_MEDIA_F2 pabsw,   1
 IEMIMPL_MEDIA_F2 pabsd,   1
+IEMIMPL_MEDIA_F2 psignb,  1
+IEMIMPL_MEDIA_F2 psignw,  1
+IEMIMPL_MEDIA_F2 psignd,  1
 
 ;;
@@ -4184 +4187 @@
 IEMIMPL_MEDIA_OPT_F3 vpavgb
 IEMIMPL_MEDIA_OPT_F3 vpavgw
+IEMIMPL_MEDIA_OPT_F3 vpsignb
+IEMIMPL_MEDIA_OPT_F3 vpsignw
+IEMIMPL_MEDIA_OPT_F3 vpsignd
 
 

trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp

@@ -12206 +12206 @@
 
 /*
+ * PSIGNB / VPSIGNB / PSIGNW / VPSIGNW / PSIGND / VPSIGND
+ */
+IEM_DECL_IMPL_DEF(void, iemAImpl_psignb_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc))
+{
+    RTUINT64U uSrc1 = { *puDst };
+    RTUINT64U uSrc2 = { *puSrc };
+    RTUINT64U uDst;
+
+    for (uint32_t i = 0; i < RT_ELEMENTS(uDst.ai8); i++)
+    {
+        if (uSrc2.ai8[i] < 0)
+            uDst.ai8[i] = -uSrc1.ai8[i];
+        else if (uSrc2.ai8[i] == 0)
+            uDst.ai8[i] = 0;
+        else /* uSrc2.ai8[i] > 0 */
+            uDst.ai8[i] = uSrc1.ai8[i];
+    }
+
+    *puDst = uDst.u;
+    RT_NOREF(pFpuState);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_psignb_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc))
+{
+    RTUINT128U uSrc1 = *puDst;
+
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai8); i++)
+    {
+        if (puSrc->ai8[i] < 0)
+            puDst->ai8[i] = -uSrc1.ai8[i];
+        else if (puSrc->ai8[i] == 0)
+            puDst->ai8[i] = 0;
+        else /* puSrc->ai8[i] > 0 */
+            puDst->ai8[i] = uSrc1.ai8[i];
+    }
+
+    RT_NOREF(pFpuState);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_psignw_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc))
+{
+    RTUINT64U uSrc1 = { *puDst };
+    RTUINT64U uSrc2 = { *puSrc };
+    RTUINT64U uDst;
+
+    for (uint32_t i = 0; i < RT_ELEMENTS(uDst.ai16); i++)
+    {
+        if (uSrc2.ai16[i] < 0)
+            uDst.ai16[i] = -uSrc1.ai16[i];
+        else if (uSrc2.ai16[i] == 0)
+            uDst.ai16[i] = 0;
+        else /* uSrc2.ai16[i] > 0 */
+            uDst.ai16[i] = uSrc1.ai16[i];
+    }
+
+    *puDst = uDst.u;
+    RT_NOREF(pFpuState);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_psignw_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc))
+{
+    RTUINT128U uSrc1 = *puDst;
+
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai16); i++)
+    {
+        if (puSrc->ai16[i] < 0)
+            puDst->ai16[i] = -uSrc1.ai16[i];
+        else if (puSrc->ai16[i] == 0)
+            puDst->ai16[i] = 0;
+        else /* puSrc->ai16[i] > 0 */
+            puDst->ai16[i] = uSrc1.ai16[i];
+    }
+
+    RT_NOREF(pFpuState);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_psignd_u64_fallback,(PCX86FXSTATE pFpuState, uint64_t *puDst, uint64_t const *puSrc))
+{
+    RTUINT64U uSrc1 = { *puDst };
+    RTUINT64U uSrc2 = { *puSrc };
+    RTUINT64U uDst;
+
+    for (uint32_t i = 0; i < RT_ELEMENTS(uDst.ai32); i++)
+    {
+        if (uSrc2.ai32[i] < 0)
+            uDst.ai32[i] = -uSrc1.ai32[i];
+        else if (uSrc2.ai32[i] == 0)
+            uDst.ai32[i] = 0;
+        else /* uSrc2.ai32[i] > 0 */
+            uDst.ai32[i] = uSrc1.ai32[i];
+    }
+
+    *puDst = uDst.u;
+    RT_NOREF(pFpuState);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_psignd_u128_fallback,(PCX86FXSTATE pFpuState, PRTUINT128U puDst, PCRTUINT128U puSrc))
+{
+    RTUINT128U uSrc1 = *puDst;
+
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai32); i++)
+    {
+        if (puSrc->ai32[i] < 0)
+            puDst->ai32[i] = -uSrc1.ai32[i];
+        else if (puSrc->ai32[i] == 0)
+            puDst->ai32[i] = 0;
+        else /* puSrc->ai32[i] > 0 */
+            puDst->ai32[i] = uSrc1.ai32[i];
+    }
+
+    RT_NOREF(pFpuState);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_vpsignb_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2))
+{
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai8); i++)
+    {
+        if (puSrc2->ai8[i] < 0)
+            puDst->ai8[i] = -puSrc1->ai8[i];
+        else if (puSrc2->ai8[i] == 0)
+            puDst->ai8[i] = 0;
+        else /* puSrc2->ai8[i] > 0 */
+            puDst->ai8[i] = puSrc1->ai8[i];
+    }
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_vpsignb_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2))
+{
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai8); i++)
+    {
+        if (puSrc2->ai8[i] < 0)
+            puDst->ai8[i] = -puSrc1->ai8[i];
+        else if (puSrc2->ai8[i] == 0)
+            puDst->ai8[i] = 0;
+        else /* puSrc2->ai8[i] > 0 */
+            puDst->ai8[i] = puSrc1->ai8[i];
+    }
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_vpsignw_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2))
+{
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai16); i++)
+    {
+        if (puSrc2->ai16[i] < 0)
+            puDst->ai16[i] = -puSrc1->ai16[i];
+        else if (puSrc2->ai16[i] == 0)
+            puDst->ai16[i] = 0;
+        else /* puSrc2->ai16[i] > 0 */
+            puDst->ai16[i] = puSrc1->ai16[i];
+    }
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_vpsignw_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2))
+{
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai16); i++)
+    {
+        if (puSrc2->ai16[i] < 0)
+            puDst->ai16[i] = -puSrc1->ai16[i];
+        else if (puSrc2->ai16[i] == 0)
+            puDst->ai16[i] = 0;
+        else /* puSrc2->ai16[i] > 0 */
+            puDst->ai16[i] = puSrc1->ai16[i];
+    }
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_vpsignd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2))
+{
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai32); i++)
+    {
+        if (puSrc2->ai32[i] < 0)
+            puDst->ai32[i] = -puSrc1->ai32[i];
+        else if (puSrc2->ai32[i] == 0)
+            puDst->ai32[i] = 0;
+        else /* puSrc2->ai32[i] > 0 */
+            puDst->ai32[i] = puSrc1->ai32[i];
+    }
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_vpsignd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2))
+{
+    for (uint32_t i = 0; i < RT_ELEMENTS(puDst->ai32); i++)
+    {
+        if (puSrc2->ai32[i] < 0)
+            puDst->ai32[i] = -puSrc1->ai32[i];
+        else if (puSrc2->ai32[i] == 0)
+            puDst->ai32[i] = 0;
+        else /* puSrc2->ai32[i] > 0 */
+            puDst->ai32[i] = puSrc1->ai32[i];
+    }
+}
+
+
+/*
  * CRC32 (SEE 4.2).
  */

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f38.cpp.h

@@ -305 +305 @@
 /** Opcode 0x66 0x0f 0x38 0x07. */
 FNIEMOP_STUB(iemOp_phsubsw_Vx_Wx);
+
+
 /** Opcode      0x0f 0x38 0x08. */
-FNIEMOP_STUB(iemOp_psignb_Pq_Qq);
+FNIEMOP_DEF(iemOp_psignb_Pq_Qq)
+{
+    IEMOP_MNEMONIC2(RM, PSIGNB, psignb, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
+    return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex,
+                          IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignb_u64, &iemAImpl_psignb_u64_fallback),
+                          IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3);
+}
+
+
 /** Opcode 0x66 0x0f 0x38 0x08. */
-FNIEMOP_STUB(iemOp_psignb_Vx_Wx);
+FNIEMOP_DEF(iemOp_psignb_Vx_Wx)
+{
+    IEMOP_MNEMONIC2(RM, PSIGNB, psignb, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
+    return FNIEMOP_CALL_1(iemOpCommonSsse3_FullFull_To_Full,
+                          IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback));
+
+}
+
+
 /** Opcode      0x0f 0x38 0x09. */
-FNIEMOP_STUB(iemOp_psignw_Pq_Qq);
+FNIEMOP_DEF(iemOp_psignw_Pq_Qq)
+{
+    IEMOP_MNEMONIC2(RM, PSIGNW, psignw, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
+    return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex,
+                          IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignw_u64, &iemAImpl_psignw_u64_fallback),
+                          IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3);
+}
+
+
 /** Opcode 0x66 0x0f 0x38 0x09. */
-FNIEMOP_STUB(iemOp_psignw_Vx_Wx);
+FNIEMOP_DEF(iemOp_psignw_Vx_Wx)
+{
+    IEMOP_MNEMONIC2(RM, PSIGNW, psignw, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
+    return FNIEMOP_CALL_1(iemOpCommonSsse3_FullFull_To_Full,
+                          IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback));
+
+}
+
+
 /** Opcode      0x0f 0x38 0x0a. */
-FNIEMOP_STUB(iemOp_psignd_Pq_Qq);
+FNIEMOP_DEF(iemOp_psignd_Pq_Qq)
+{
+    IEMOP_MNEMONIC2(RM, PSIGND, psignd, Pq, Qq, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
+    return FNIEMOP_CALL_2(iemOpCommonMmx_FullFull_To_Full_Ex,
+                          IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignd_u64, &iemAImpl_psignd_u64_fallback),
+                          IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fSsse3);
+}
+
+
 /** Opcode 0x66 0x0f 0x38 0x0a. */
-FNIEMOP_STUB(iemOp_psignd_Vx_Wx);
+FNIEMOP_DEF(iemOp_psignd_Vx_Wx)
+{
+    IEMOP_MNEMONIC2(RM, PSIGND, psignd, Vx, Wx, DISOPTYPE_HARMLESS, IEMOPHINT_IGNORES_OP_SIZES);
+    return FNIEMOP_CALL_1(iemOpCommonSsse3_FullFull_To_Full,
+                          IEM_SELECT_HOST_OR_FALLBACK(fSsse3, iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback));
+
+}
+
+
 /** Opcode      0x0f 0x38 0x0b. */
 FNIEMOP_STUB(iemOp_pmulhrsw_Pq_Qq);

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap2.cpp.h

@@ -58 +58 @@
 FNIEMOP_STUB(iemOp_vphsubsw_Vx_Hx_Wx);
 /*  Opcode VEX.0F38 0x08 - invalid. */
+
+
 /** Opcode VEX.66.0F38 0x08. */
-FNIEMOP_STUB(iemOp_vpsignb_Vx_Hx_Wx);
+FNIEMOP_DEF(iemOp_vpsignb_Vx_Hx_Wx)
+{
+    IEMOP_MNEMONIC3(VEX_RVM, VPSIGNB, vpsignb, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0);
+    IEMOPMEDIAOPTF3_INIT_VARS(vpsignb);
+    return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));
+}
+
+
 /*  Opcode VEX.0F38 0x09 - invalid. */
+
+
 /** Opcode VEX.66.0F38 0x09. */
-FNIEMOP_STUB(iemOp_vpsignw_Vx_Hx_Wx);
+FNIEMOP_DEF(iemOp_vpsignw_Vx_Hx_Wx)
+{
+    IEMOP_MNEMONIC3(VEX_RVM, VPSIGNW, vpsignw, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0);
+    IEMOPMEDIAOPTF3_INIT_VARS(vpsignw);
+    return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));
+}
+
+
 /*  Opcode VEX.0F38 0x0a - invalid. */
+
+
 /** Opcode VEX.66.0F38 0x0a. */
-FNIEMOP_STUB(iemOp_vpsignd_Vx_Hx_Wx);
+FNIEMOP_DEF(iemOp_vpsignd_Vx_Hx_Wx)
+{
+    IEMOP_MNEMONIC3(VEX_RVM, VPSIGND, vpsignd, Vx, Hx, Wx, DISOPTYPE_HARMLESS, 0);
+    IEMOPMEDIAOPTF3_INIT_VARS(vpsignd);
+    return FNIEMOP_CALL_1(iemOpCommonAvxAvx2_Vx_Hx_Wx_Opt, IEM_SELECT_HOST_OR_FALLBACK(fAvx2, &s_Host, &s_Fallback));
+}
+
+
 /*  Opcode VEX.0F38 0x0b - invalid. */
 /** Opcode VEX.66.0F38 0x0b. */

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -1784 +1784 @@
 FNIEMAIMPLMEDIAF2U64     iemAImpl_pabsw_u64, iemAImpl_pabsw_u64_fallback;
 FNIEMAIMPLMEDIAF2U64     iemAImpl_pabsd_u64, iemAImpl_pabsd_u64_fallback;
+FNIEMAIMPLMEDIAF2U64     iemAImpl_psignb_u64, iemAImpl_psignb_u64_fallback;
+FNIEMAIMPLMEDIAF2U64     iemAImpl_psignw_u64, iemAImpl_psignw_u64_fallback;
+FNIEMAIMPLMEDIAF2U64     iemAImpl_psignd_u64, iemAImpl_psignd_u64_fallback;
 FNIEMAIMPLMEDIAOPTF2U64  iemAImpl_psllw_u64, iemAImpl_psrlw_u64, iemAImpl_psraw_u64;
 FNIEMAIMPLMEDIAOPTF2U64  iemAImpl_pslld_u64, iemAImpl_psrld_u64, iemAImpl_psrad_u64;
@@ -1825 +1828 @@
 FNIEMAIMPLMEDIAF2U128    iemAImpl_pabsw_u128, iemAImpl_pabsw_u128_fallback;
 FNIEMAIMPLMEDIAF2U128    iemAImpl_pabsd_u128, iemAImpl_pabsd_u128_fallback;
+FNIEMAIMPLMEDIAF2U128    iemAImpl_psignb_u128, iemAImpl_psignb_u128_fallback;
+FNIEMAIMPLMEDIAF2U128    iemAImpl_psignw_u128, iemAImpl_psignw_u128_fallback;
+FNIEMAIMPLMEDIAF2U128    iemAImpl_psignd_u128, iemAImpl_psignd_u128_fallback;
 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packsswb_u128, iemAImpl_packuswb_u128;
 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_packssdw_u128, iemAImpl_packusdw_u128;
@@ -1876 +1882 @@
 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgb_u128,     iemAImpl_vpavgb_u128_fallback;
 FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpavgw_u128,     iemAImpl_vpavgw_u128_fallback;
+FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignb_u128,    iemAImpl_vpsignb_u128_fallback;
+FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignw_u128,    iemAImpl_vpsignw_u128_fallback;
+FNIEMAIMPLMEDIAOPTF3U128 iemAImpl_vpsignd_u128,    iemAImpl_vpsignd_u128_fallback;
 
 FNIEMAIMPLMEDIAOPTF2U128 iemAImpl_vpabsb_u128,     iemAImpl_vpabsb_u128_fallback;
@@ -1924 +1933 @@
 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgb_u256,     iemAImpl_vpavgb_u256_fallback;
 FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpavgw_u256,     iemAImpl_vpavgw_u256_fallback;
+FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignb_u256,    iemAImpl_vpsignb_u256_fallback;
+FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignw_u256,    iemAImpl_vpsignw_u256_fallback;
+FNIEMAIMPLMEDIAOPTF3U256 iemAImpl_vpsignd_u256,    iemAImpl_vpsignd_u256_fallback;
 
 FNIEMAIMPLMEDIAOPTF2U256 iemAImpl_vpabsb_u256,     iemAImpl_vpabsb_u256_fallback;