VirtualBox

Changeset 96088 in vbox


Ignore:
Timestamp:
Aug 6, 2022 7:41:48 PM (3 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
152887
Message:

ValidationKit/bs3-cpu-instr-3: Add simple [v]pmulhrsw instructions testcase, bugref:9898

Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

    r96065 r96088  
    21272127 %endif
    21282128
     2129;
     2130; [V]PMULHRSW
     2131;
     2132EMIT_INSTR_PLUS_ICEBP   pmulhrsw,  MM1, MM2
     2133EMIT_INSTR_PLUS_ICEBP   pmulhrsw,  MM1, FSxBX
     2134EMIT_INSTR_PLUS_ICEBP   pmulhrsw,  XMM1, XMM2
     2135EMIT_INSTR_PLUS_ICEBP   pmulhrsw,  XMM1, FSxBX
     2136EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, XMM1, XMM2, XMM3
     2137EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, XMM1, XMM2, FSxBX
     2138EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, YMM1, YMM2, YMM3
     2139EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, YMM1, YMM2, FSxBX
     2140 %if TMPL_BITS == 64
     2141EMIT_INSTR_PLUS_ICEBP   pmulhrsw,  XMM8, XMM9
     2142EMIT_INSTR_PLUS_ICEBP   pmulhrsw,  XMM8, FSxBX
     2143EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, XMM8, XMM9, XMM10
     2144EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, XMM8, XMM9, FSxBX
     2145EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, YMM8, YMM9, YMM10
     2146EMIT_INSTR_PLUS_ICEBP   vpmulhrsw, YMM8, YMM9, FSxBX
     2147 %endif
    21292148
    21302149

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32

    r96068 r96088  
    58845884        {  bs3CpuInstr3_vpmaddubsw_YMM8_YMM9_YMM10_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValues256W),  s_aValues256W },
    58855885        {  bs3CpuInstr3_vpmaddubsw_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValues256W),  s_aValues256W },
     5886    };
     5887    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
     5888    unsigned const                         iTest       = BS3CPUINSTR3_TEST_MODES_INDEX(bMode);
     5889    return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
     5890                                        g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4));
     5891}
     5892
     5893
     5894/*
     5895 * [V]PMULHRSW  - Vertically multiply, round and scale word sized signed integers and extract the high 16-bits.
     5896 */
     5897BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pmulhrsw_MM1_MM2_icebp);
     5898BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pmulhrsw_MM1_FSxBX_icebp);
     5899BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pmulhrsw_XMM1_XMM2_icebp);
     5900BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pmulhrsw_XMM1_FSxBX_icebp);
     5901extern FNBS3FAR             bs3CpuInstr3_pmulhrsw_XMM8_XMM9_icebp_c64;
     5902extern FNBS3FAR             bs3CpuInstr3_pmulhrsw_XMM8_FSxBX_icebp_c64;
     5903BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_XMM3_icebp);
     5904BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_FSxBX_icebp);
     5905extern FNBS3FAR             bs3CpuInstr3_vpmulhrsw_XMM8_XMM9_XMM10_icebp_c64;
     5906extern FNBS3FAR             bs3CpuInstr3_vpmulhrsw_XMM8_XMM9_FSxBX_icebp_c64;
     5907BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_YMM3_icebp);
     5908BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_FSxBX_icebp);
     5909extern FNBS3FAR             bs3CpuInstr3_vpmulhrsw_YMM8_YMM9_YMM10_icebp_c64;
     5910extern FNBS3FAR             bs3CpuInstr3_vpmulhrsw_YMM8_YMM9_FSxBX_icebp_c64;
     5911
     5912BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_pmulhrsw(uint8_t bMode)
     5913{
     5914    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues[] =
     5915    {
     5916        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     5917            /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0),
     5918            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     5919        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     5920            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     5921            /* => */ RTUINT256_INIT_C(0x0899072e05d40489, 0x16341448126d10a1, 0x27d7256a230e20c1, 0x3d823a9437b734e9) },
     5922        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     5923            /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     5924            /* => */ RTUINT256_INIT_C(0x1293043f07fc2dc5, 0xfcbceafe33912b08, 0x4721f792d495b28f, 0xcb340c6be1c453e5) },
     5925    };
     5926
     5927    static BS3CPUINSTR3_TEST1_T const s_aTests16[] =
     5928    {
     5929        {  bs3CpuInstr3_pmulhrsw_MM1_MM2_icebp_c16,          255,         RM_REG, T_MMX_SSSE3, 1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues  },
     5930        {  bs3CpuInstr3_pmulhrsw_MM1_FSxBX_icebp_c16,        255,         RM_MEM, T_MMX_SSSE3, 1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues  },
     5931        {  bs3CpuInstr3_pmulhrsw_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSSE3,     1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     5932        {  bs3CpuInstr3_pmulhrsw_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSSE3,     1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5933        {  bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     5934        {  bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5935        {  bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_YMM3_icebp_c16,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     5936        {  bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5937    };
     5938    static BS3CPUINSTR3_TEST1_T const s_aTests32[] =
     5939    {
     5940        {  bs3CpuInstr3_pmulhrsw_MM1_MM2_icebp_c32,          255,         RM_REG, T_MMX_SSSE3, 1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     5941        {  bs3CpuInstr3_pmulhrsw_MM1_FSxBX_icebp_c32,        255,         RM_MEM, T_MMX_SSSE3, 1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5942        {  bs3CpuInstr3_pmulhrsw_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSSE3,     1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     5943        {  bs3CpuInstr3_pmulhrsw_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSSE3,     1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5944        {  bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     5945        {  bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5946        {  bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_YMM3_icebp_c32,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     5947        {  bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5948    };
     5949    static BS3CPUINSTR3_TEST1_T const s_aTests64[] =
     5950    {
     5951        {  bs3CpuInstr3_pmulhrsw_MM1_MM2_icebp_c64,          255,         RM_REG, T_MMX_SSSE3, 1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     5952        {  bs3CpuInstr3_pmulhrsw_MM1_FSxBX_icebp_c64,        255,         RM_MEM, T_MMX_SSSE3, 1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5953        {  bs3CpuInstr3_pmulhrsw_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSSE3,     1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     5954        {  bs3CpuInstr3_pmulhrsw_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSSE3,     1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5955        {  bs3CpuInstr3_pmulhrsw_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSSE3,     8, 8,   9, RT_ELEMENTS(s_aValues),  s_aValues },
     5956        {  bs3CpuInstr3_pmulhrsw_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSSE3,     8, 8, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5957        {  bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     5958        {  bs3CpuInstr3_vpmulhrsw_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5959        {  bs3CpuInstr3_vpmulhrsw_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128,   8, 9,  10, RT_ELEMENTS(s_aValues),  s_aValues },
     5960        {  bs3CpuInstr3_vpmulhrsw_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   8, 9, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5961        {  bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_YMM3_icebp_c64,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     5962        {  bs3CpuInstr3_vpmulhrsw_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5963        {  bs3CpuInstr3_vpmulhrsw_YMM8_YMM9_YMM10_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValues),  s_aValues },
     5964        {  bs3CpuInstr3_vpmulhrsw_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValues),  s_aValues },
    58865965    };
    58875966    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    85868665        { "[v]phaddsw",                                     bs3CpuInstr3_v_phaddsw, 0 },
    85878666        { "[v]phsubsw",                                     bs3CpuInstr3_v_phsubsw, 0 },
    8588         { "[v]pmaddubsw",                                     bs3CpuInstr3_v_pmaddubsw, 0 },
     8667        { "[v]pmaddubsw",                                   bs3CpuInstr3_v_pmaddubsw, 0 },
     8668#endif
     8669#if defined(ALL_TESTS)
     8670        { "[v]pmulhrsw",                                    bs3CpuInstr3_v_pmulhrsw, 0 },
    85898671#endif
    85908672    };
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