VirtualBox

Changeset 96095 in vbox


Ignore:
Timestamp:
Aug 7, 2022 6:46:16 PM (2 years ago)
Author:
vboxsync
Message:

ValidationKit/bs3-cpu-instr-3: Add simple [v]psadbw instructions testcase, bugref:9898

Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

    r96088 r96095  
    21472147 %endif
    21482148
     2149;
     2150; [V]PSADDBW
     2151;
     2152EMIT_INSTR_PLUS_ICEBP   psadbw,  MM1, MM2
     2153EMIT_INSTR_PLUS_ICEBP   psadbw,  MM1, FSxBX
     2154EMIT_INSTR_PLUS_ICEBP   psadbw,  XMM1, XMM2
     2155EMIT_INSTR_PLUS_ICEBP   psadbw,  XMM1, FSxBX
     2156EMIT_INSTR_PLUS_ICEBP   vpsadbw, XMM1, XMM2, XMM3
     2157EMIT_INSTR_PLUS_ICEBP   vpsadbw, XMM1, XMM2, FSxBX
     2158EMIT_INSTR_PLUS_ICEBP   vpsadbw, YMM1, YMM2, YMM3
     2159EMIT_INSTR_PLUS_ICEBP   vpsadbw, YMM1, YMM2, FSxBX
     2160 %if TMPL_BITS == 64
     2161EMIT_INSTR_PLUS_ICEBP   psadbw,  XMM8, XMM9
     2162EMIT_INSTR_PLUS_ICEBP   psadbw,  XMM8, FSxBX
     2163EMIT_INSTR_PLUS_ICEBP   vpsadbw, XMM8, XMM9, XMM10
     2164EMIT_INSTR_PLUS_ICEBP   vpsadbw, XMM8, XMM9, FSxBX
     2165EMIT_INSTR_PLUS_ICEBP   vpsadbw, YMM8, YMM9, YMM10
     2166EMIT_INSTR_PLUS_ICEBP   vpsadbw, YMM8, YMM9, FSxBX
     2167 %endif
     2168
    21492169
    21502170%endif ; BS3_INSTANTIATING_CMN

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32

    r96088 r96095  
    59635963        {  bs3CpuInstr3_vpmulhrsw_YMM8_YMM9_YMM10_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValues),  s_aValues },
    59645964        {  bs3CpuInstr3_vpmulhrsw_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     5965    };
     5966    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
     5967    unsigned const                         iTest       = BS3CPUINSTR3_TEST_MODES_INDEX(bMode);
     5968    return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
     5969                                        g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4));
     5970}
     5971
     5972
     5973/*
     5974 * [V]PSADBW  - Compute sum of absolute differences of packed unsigned byte integers.
     5975 */
     5976BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psadbw_MM1_MM2_icebp);
     5977BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psadbw_MM1_FSxBX_icebp);
     5978BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psadbw_XMM1_XMM2_icebp);
     5979BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_psadbw_XMM1_FSxBX_icebp);
     5980extern FNBS3FAR             bs3CpuInstr3_psadbw_XMM8_XMM9_icebp_c64;
     5981extern FNBS3FAR             bs3CpuInstr3_psadbw_XMM8_FSxBX_icebp_c64;
     5982BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsadbw_XMM1_XMM2_XMM3_icebp);
     5983BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsadbw_XMM1_XMM2_FSxBX_icebp);
     5984extern FNBS3FAR             bs3CpuInstr3_vpsadbw_XMM8_XMM9_XMM10_icebp_c64;
     5985extern FNBS3FAR             bs3CpuInstr3_vpsadbw_XMM8_XMM9_FSxBX_icebp_c64;
     5986BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsadbw_YMM1_YMM2_YMM3_icebp);
     5987BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpsadbw_YMM1_YMM2_FSxBX_icebp);
     5988extern FNBS3FAR             bs3CpuInstr3_vpsadbw_YMM8_YMM9_YMM10_icebp_c64;
     5989extern FNBS3FAR             bs3CpuInstr3_vpsadbw_YMM8_YMM9_FSxBX_icebp_c64;
     5990
     5991BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_psadbw(uint8_t bMode)
     5992{
     5993    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues[] =
     5994    {
     5995        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     5996            /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0),
     5997            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     5998        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     5999            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     6000            /* => */ RTUINT256_INIT_C(0x0000000000000200, 0x0000000000000200, 0x0000000000000200, 0x0000000000000200) },
     6001        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     6002            /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     6003            /* => */ RTUINT256_INIT_C(0x00000000000002f6, 0x00000000000002e5, 0x0000000000000264, 0x0000000000000240) },
     6004    };
     6005
     6006    static BS3CPUINSTR3_TEST1_T const s_aTests16[] =
     6007    {
     6008        {  bs3CpuInstr3_psadbw_MM1_MM2_icebp_c16,          255,         RM_REG, T_MMX_SSE,   1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues  },
     6009        {  bs3CpuInstr3_psadbw_MM1_FSxBX_icebp_c16,        255,         RM_MEM, T_MMX_SSE,   1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues  },
     6010        {  bs3CpuInstr3_psadbw_XMM1_XMM2_icebp_c16,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     6011        {  bs3CpuInstr3_psadbw_XMM1_FSxBX_icebp_c16,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6012        {  bs3CpuInstr3_vpsadbw_XMM1_XMM2_XMM3_icebp_c16,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     6013        {  bs3CpuInstr3_vpsadbw_XMM1_XMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6014        {  bs3CpuInstr3_vpsadbw_YMM1_YMM2_YMM3_icebp_c16,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     6015        {  bs3CpuInstr3_vpsadbw_YMM1_YMM2_FSxBX_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6016    };
     6017    static BS3CPUINSTR3_TEST1_T const s_aTests32[] =
     6018    {
     6019        {  bs3CpuInstr3_psadbw_MM1_MM2_icebp_c32,          255,         RM_REG, T_MMX_SSE,   1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     6020        {  bs3CpuInstr3_psadbw_MM1_FSxBX_icebp_c32,        255,         RM_MEM, T_MMX_SSE,   1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6021        {  bs3CpuInstr3_psadbw_XMM1_XMM2_icebp_c32,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     6022        {  bs3CpuInstr3_psadbw_XMM1_FSxBX_icebp_c32,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6023        {  bs3CpuInstr3_vpsadbw_XMM1_XMM2_XMM3_icebp_c32,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     6024        {  bs3CpuInstr3_vpsadbw_XMM1_XMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6025        {  bs3CpuInstr3_vpsadbw_YMM1_YMM2_YMM3_icebp_c32,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     6026        {  bs3CpuInstr3_vpsadbw_YMM1_YMM2_FSxBX_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6027    };
     6028    static BS3CPUINSTR3_TEST1_T const s_aTests64[] =
     6029    {
     6030        {  bs3CpuInstr3_psadbw_MM1_MM2_icebp_c64,          255,         RM_REG, T_MMX_SSE,   1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     6031        {  bs3CpuInstr3_psadbw_MM1_FSxBX_icebp_c64,        255,         RM_MEM, T_MMX_SSE,   1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6032        {  bs3CpuInstr3_psadbw_XMM1_XMM2_icebp_c64,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues),  s_aValues },
     6033        {  bs3CpuInstr3_psadbw_XMM1_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6034        {  bs3CpuInstr3_psadbw_XMM8_XMM9_icebp_c64,        255,         RM_REG, T_SSE2,      8, 8,   9, RT_ELEMENTS(s_aValues),  s_aValues },
     6035        {  bs3CpuInstr3_psadbw_XMM8_FSxBX_icebp_c64,       255,         RM_MEM, T_SSE2,      8, 8, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6036        {  bs3CpuInstr3_vpsadbw_XMM1_XMM2_XMM3_icebp_c64,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     6037        {  bs3CpuInstr3_vpsadbw_XMM1_XMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6038        {  bs3CpuInstr3_vpsadbw_XMM8_XMM9_XMM10_icebp_c64, 255,         RM_REG, T_AVX_128,   8, 9,  10, RT_ELEMENTS(s_aValues),  s_aValues },
     6039        {  bs3CpuInstr3_vpsadbw_XMM8_XMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   8, 9, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6040        {  bs3CpuInstr3_vpsadbw_YMM1_YMM2_YMM3_icebp_c64,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues),  s_aValues },
     6041        {  bs3CpuInstr3_vpsadbw_YMM1_YMM2_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues),  s_aValues },
     6042        {  bs3CpuInstr3_vpsadbw_YMM8_YMM9_YMM10_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValues),  s_aValues },
     6043        {  bs3CpuInstr3_vpsadbw_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValues),  s_aValues },
    59656044    };
    59666045    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    86698748#if defined(ALL_TESTS)
    86708749        { "[v]pmulhrsw",                                    bs3CpuInstr3_v_pmulhrsw, 0 },
     8750        { "[v]psadbw",                                      bs3CpuInstr3_v_psadbw,   0 },
    86718751#endif
    86728752    };
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