Changeset 96213 in vbox for trunk/src/VBox/Runtime/common/math
- Timestamp:
- Aug 15, 2022 9:36:00 AM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 153023
- Location:
- trunk/src/VBox/Runtime/common/math
- Files:
-
- 1 added
- 12 edited
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feclearexcept.asm (modified) (5 diffs)
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fedisableexcept.asm (modified) (3 diffs)
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feenableexcept.asm (modified) (5 diffs)
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fegetenv.asm (modified) (1 diff)
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fegetexcept.asm (modified) (2 diffs)
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fegetexceptflag.asm (modified) (3 diffs)
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feholdexcept.asm (modified) (1 diff)
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feraiseexcept.asm (added)
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fesetenv.asm (modified) (6 diffs)
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fesetexceptflag.asm (modified) (5 diffs)
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fesetx87precision.asm (modified) (1 diff)
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fetestexcept.asm (modified) (2 diffs)
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feupdateenv.asm (modified) (3 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/Runtime/common/math/feclearexcept.asm
r96205 r96213 37 37 ; 38 38 ; @returns eax = 0 on success, non-zero on failure. 39 ; @param fXcpts 32-bit: [xBP+8] msc64: ecx gcc64: edi -X86_FSW_XCPT_MASK39 ; @param fXcpts 32-bit: [xBP+8]; msc64: ecx; gcc64: edi; -- Zero or more bits from X86_FSW_XCPT_MASK 40 40 ; 41 41 RT_NOCRT_BEGINPROC feclearexcept … … 49 49 50 50 ; 51 ; Load the parameter into ecx .51 ; Load the parameter into ecx, validate and adjust it. 52 52 ; 53 53 %ifdef ASM_CALL64_GCC … … 64 64 %endif 65 65 66 ; #IE implies #SF 67 mov al, cl 68 and al, X86_FSW_IE 69 shl al, X86_FSW_SF_BIT - X86_FSW_IE_BIT 70 or cl, al 71 66 72 ; Make it into and AND mask suitable for clearing the specified exceptions. 67 73 not ecx … … 72 78 73 79 ; Modify the x87 flags first (ecx preserved). 74 cmp ecx, X86_FSW_XCPT_MASK75 jne 80 cmp ecx, ~X86_FSW_XCPT_MASK ; This includes all the x87 exceptions, including stack error. 81 jne .partial_mask 76 82 fnclex 77 83 jmp .do_sse … … 93 99 ; Modify the SSE flags (modifies ecx). 94 100 stmxcsr [xBP - 10h] 101 or ecx, X86_FSW_XCPT_MASK & ~X86_MXCSR_XCPT_FLAGS ; Don't mix X86_FSW_SF with X86_MXCSR_DAZ. 95 102 and [xBP - 10h], ecx 96 103 ldmxcsr [xBP - 10h] -
trunk/src/VBox/Runtime/common/math/fedisableexcept.asm
r96205 r96213 38 38 ; @returns eax = Previous enabled exceptions on success (not subject to fXcpt), 39 39 ; -1 on failure. 40 ; @param fXcpt 32-bit: [xBP+8] msc64: ecx gcc64: edi- Mask of exceptions to disable.40 ; @param fXcpt 32-bit: [xBP+8]; msc64: ecx; gcc64: edi; -- Mask of exceptions to disable. 41 41 ; 42 42 RT_NOCRT_BEGINPROC fedisableexcept … … 52 52 ; Load the parameter into ecx. 53 53 ; 54 or eax, -155 54 %ifdef ASM_CALL64_GCC 56 55 mov ecx, edi … … 58 57 mov ecx, [xBP + xCB*2] 59 58 %endif 59 or eax, -1 60 60 test ecx, ~X86_FCW_XCPT_MASK 61 %ifndef RT_STRICT 61 62 jnz .return 63 %else 64 jz .input_ok 65 int3 66 jmp .return 67 .input_ok: 68 %endif 62 69 63 70 ; -
trunk/src/VBox/Runtime/common/math/feenableexcept.asm
r96205 r96213 52 52 ; Load the parameter into ecx. 53 53 ; 54 or eax, -155 54 %ifdef ASM_CALL64_GCC 56 55 mov ecx, edi … … 58 57 mov ecx, [xBP + xCB*2] 59 58 %endif 59 or eax, -1 60 60 test ecx, ~X86_FCW_XCPT_MASK 61 %ifndef RT_STRICT 61 62 jnz .return 63 %else 64 jz .input_ok 65 int3 66 jmp .return 67 .input_ok: 68 %endif 62 69 63 70 ; Invert the mask as we're enabling the exceptions, not masking them. … … 71 78 fstcw [xBP - 10h] 72 79 %ifdef RT_ARCH_X86 ; Return the inverted x87 mask in 32-bit mode. 73 movzx eax, word [xBP - 10h] 80 mov ax, word [xBP - 10h] 81 and eax, X86_FCW_XCPT_MASK 74 82 %endif 75 83 and word [xBP - 10h], cx … … 88 96 %ifdef RT_ARCH_AMD64 ; Return the inverted MXCSR exception mask on AMD64 because windows doesn't necessarily set the x87 one. 89 97 mov eax, [xBP - 10h] 98 and eax, X86_MXCSR_XCPT_MASK 90 99 shr eax, X86_MXCSR_XCPT_MASK_SHIFT 91 100 %endif … … 96 105 .return_ok: 97 106 not eax ; Invert it as we return the enabled rather than masked exceptions. 98 and eax, X86_FCW_XCPT_MASK99 107 .return: 100 108 leave -
trunk/src/VBox/Runtime/common/math/fegetenv.asm
r96205 r96213 36 36 ; Gets the FPU+SSE environment. 37 37 ; 38 ; @returns eax = x87 exception mask (X86_FCW_XCPT_MASK)39 ; @param pEnv 32-bit: [xBP+8] msc64: rcx gcc64: rdi38 ; @returns eax = 0 on success (-1 on failure), 39 ; @param pEnv 32-bit: [xBP+8]; msc64: rcx; gcc64: rdi -- Pointer to where to store the enviornment. 40 40 ; 41 41 RT_NOCRT_BEGINPROC fegetenv -
trunk/src/VBox/Runtime/common/math/fegetexcept.asm
r96205 r96213 34 34 35 35 ;; 36 ; Gets the mask of enabled exceptions, e.g. unma ksed (BSD/GNU extension).36 ; Gets the mask of enabled exceptions, e.g. unmasked (BSD/GNU extension). 37 37 ; 38 ; @returns eax = inverted x87 exception mask (X86_FCW_XCPT_MASK) 38 ; @returns eax = inverted x87/sse exception mask (X86_MXCSR_XCPT_FLAGS). 39 ; Will not return X86_FSW_SF. 39 40 ; 40 41 RT_NOCRT_BEGINPROC fegetexcept … … 62 63 %endif 63 64 64 not eax ; Invert it as we return the enabled rather than masked exceptions.65 and eax, X86_ FCW_XCPT_MASK65 not eax ; Invert it as we return the enabled rather than masked exceptions. 66 and eax, X86_MXCSR_XCPT_FLAGS ; Use the SSE mask so we don't return X86_FSW_SF here. 66 67 67 68 .return_val: -
trunk/src/VBox/Runtime/common/math/fegetexceptflag.asm
r96205 r96213 37 37 ; 38 38 ; @returns eax = 0 on success, non-zero on failure. 39 ; @param pfXcpts 32-bit: [xBP+8] msc64: rcx gcc64: rdi - pointer to fexcept_t (16-bit) 40 ; @param fXcptMask 32-bit: [xBP+c] msc64: edx gcc64: esi - X86_FSW_XCPT_MASK 39 ; @param pfXcpts 32-bit: [xBP+8]; msc64: rcx; gcc64: rdi; -- Where to store the flags (pointer to fexcept_t (16-bit)). 40 ; @param fXcptMask 32-bit: [xBP+c]; msc64: edx; gcc64: esi; -- The exception flags to get (X86_FSW_XCPT_MASK). 41 ; Accepts X86_FSW_SF and will return it if given as input. 41 42 ; 42 43 RT_NOCRT_BEGINPROC fegetexceptflag … … 64 65 or eax, -1 65 66 test edx, ~X86_FSW_XCPT_MASK 67 %ifndef RT_STRICT 66 68 jnz .return 69 %else 70 jz .input_ok 71 int3 72 jmp .return 73 .input_ok: 74 %endif 67 75 %endif 68 76 … … 88 96 mov ax, [xBP - 10h] 89 97 and ax, dx 98 and ax, X86_MXCSR_XCPT_FLAGS ; Don't confuse X86_MXCSR_DAZ for X86_FSW_SF. 90 99 or [xCX], ax 91 100 -
trunk/src/VBox/Runtime/common/math/feholdexcept.asm
r96205 r96213 36 36 ; Gets the FPU+SSE environment and disables (masks) all exceptions. 37 37 ; 38 ; @returns eax = x87 exception mask (X86_FCW_XCPT_MASK)38 ; @returns eax = 0 on success (-1 on failure) 39 39 ; @param pEnv 32-bit: [xBP+8] msc64: rcx gcc64: rdi 40 40 ; -
trunk/src/VBox/Runtime/common/math/fesetenv.asm
r96205 r96213 32 32 %define RT_NOCRT_FE_DFL_ENV 1 33 33 %define RT_NOCRT_FE_NOMASK_ENV 2 34 %define RT_NOCRT_FE_PC53_ENV 3 35 %define RT_NOCRT_FE_PC64_ENV 4 36 %define RT_NOCRT_FE_LAST_ENV 4 34 37 35 38 … … 66 69 fnstenv [xBP - 20h] 67 70 68 cmp xCX, RT_NOCRT_FE_DFL_ENV 69 je .x87_default_env 71 ; Check for special "pointer" values: 72 cmp xCX, RT_NOCRT_FE_LAST_ENV 73 ja .x87_regular 74 75 or eax, -1 76 test xCX, xCX 77 jnz .x87_special 78 %ifdef RT_STRICT 79 int3 80 %endif 81 jmp .return 82 83 ; 84 ; Special x87 state. Clear all pending exceptions. 85 ; 86 ; We have 4 special environments with only some differences in FCW differs, so set 87 ; up FCW in AX, starting with a NOMASK environment as it has the fewest bits set. 88 ; 89 .x87_special: 90 and word [xBP - 20h + X86FSTENV32P.FSW], ~X86_FSW_XCPT_ES_MASK 91 mov ax, [xBP - 20h + X86FSTENV32P.FCW] 92 and ax, ~(X86_FCW_MASK_ALL | X86_FCW_PC_MASK | X86_FCW_RC_MASK | X86_FCW_IC_MASK) 93 %ifdef RT_OS_WINDOWS 94 or ax, X86_FCW_DM | X86_FCW_PC_53 | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE 95 %else 96 or ax, X86_FCW_DM | X86_FCW_PC_64 | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE 97 %endif 70 98 cmp xCX, RT_NOCRT_FE_NOMASK_ENV 71 je .x87_ default_nomask_env72 jmp .x87_regular99 je .x87_special_done 100 or ax, X86_FCW_MASK_ALL 73 101 74 .x87_default_env: 75 and word [xCX + X86FSTENV32P.FCW], ~(X86_FCW_MASK_ALL | X86_FCW_PC_MASK | X86_FCW_RC_MASK | X86_FCW_IC_MASK) 76 or word [xCX + X86FSTENV32P.FCW], X86_FCW_MASK_ALL | X86_FCW_PC_64 | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE 77 and word [xCX + X86FSTENV32P.FSW], ~X86_FSW_XCPT_ES_MASK 102 %ifdef RT_OS_WINDOWS 103 cmp xCX, RT_NOCRT_FE_PC64_ENV 104 jne .x87_special_done 105 or ax, X86_FCW_PC_64 ; X86_FCW_PC_64 is a super set of X86_FCW_PC_53, so no need to clear bits 106 %else 107 cmp xCX, RT_NOCRT_FE_PC53_ENV 108 jne .x87_special_done 109 and ax, X86_FCW_PC_64 & ~X86_FCW_PC_53 ; X86_FCW_PC_64 is a super set of X86_FCW_PC_53, so clear the bit that differs. 110 %endif 111 112 .x87_special_done: 113 mov [xBP - 20h + X86FSTENV32P.FCW], ax 78 114 jmp .x87_common 79 115 80 .x87_default_nomask_env: 81 and word [xCX + X86FSTENV32P.FCW], ~(X86_FCW_MASK_ALL | X86_FCW_PC_MASK | X86_FCW_RC_MASK | X86_FCW_IC_MASK) 82 or word [xCX + X86FSTENV32P.FCW], X86_FCW_DM | X86_FCW_PC_64 | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE 83 and word [xCX + X86FSTENV32P.FSW], ~X86_FSW_XCPT_ES_MASK 84 jmp .x87_common 85 116 ; 117 ; Merge input and current. 118 ; 86 119 .x87_regular: 87 120 ; FCW: … … 111 144 fldenv [xBP - 20h] 112 145 146 113 147 ; 114 148 ; Now for SSE, if supported, where we'll restore everything as is. … … 122 156 %endif 123 157 124 cmp xCX, RT_NOCRT_FE_DFL_ENV 125 je .sse_special_env 126 cmp xCX, RT_NOCRT_FE_NOMASK_ENV 127 je .sse_special_env 158 cmp xCX, RT_NOCRT_FE_LAST_ENV 159 jb .sse_special_env 128 160 ldmxcsr [xCX + 28] 129 161 jmp .return_okay … … 134 166 and eax, ~(X86_MXCSR_XCPT_FLAGS | X86_MXCSR_XCPT_MASK | X86_MXCSR_RC_MASK | X86_MXCSR_DAZ | X86_MXCSR_FZ) 135 167 or eax, X86_MXCSR_RC_NEAREST | X86_MXCSR_DM 136 cmp xCX, RT_NOCRT_FE_NOMASK_ENV 168 cmp xCX, RT_NOCRT_FE_NOMASK_ENV ; Only the NOMASK one differs here. 137 169 je .sse_special_load_eax 138 or eax, X86_MXCSR_RC_NEAREST | X86_MXCSR_XCPT_MASK ; default envi ornment masks all exceptions170 or eax, X86_MXCSR_RC_NEAREST | X86_MXCSR_XCPT_MASK ; default environment masks all exceptions 139 171 .sse_special_load_eax: 140 172 mov [xBP - 10h], eax … … 146 178 .return_okay: 147 179 xor eax, eax 180 .return: 148 181 leave 149 182 ret -
trunk/src/VBox/Runtime/common/math/fesetexceptflag.asm
r96205 r96213 37 37 ; 38 38 ; @returns eax = 0 on success, non-zero on failure. 39 ; @param pfXcpts 32-bit: [xBP+8] msc64: rcx gcc64: rdi - pointer to fexcept_t (16-bit) 40 ; @param fXcptMask 32-bit: [xBP+c] msc64: edx gcc64: esi - X86_FSW_XCPT_MASK 39 ; @param pfXcpts 32-bit: [xBP+8]; msc64: rcx; gcc64: rdi; -- pointer to fexcept_t (16-bit) 40 ; @param fXcptMask 32-bit: [xBP+c]; msc64: edx; gcc64: esi; -- X86_MXCSR_XCPT_FLAGS (X86_FSW_XCPT_MASK) 41 ; Accepts X86_FSW_SF. 41 42 ; 42 43 RT_NOCRT_BEGINPROC fesetexceptflag … … 50 51 51 52 ; 52 ; Load the parameter into ecx (*pfXcpts) and edx (fXcptMask) .53 ; Load the parameter into ecx (*pfXcpts) and edx (fXcptMask) and validate the latter. 53 54 ; 54 55 %ifdef ASM_CALL64_GCC … … 73 74 %endif 74 75 76 ; 75 77 ; Apply the AND mask to ECX and invert it so we can use it to clear flags 76 78 ; before OR'ing in the new values. 79 ; 77 80 and ecx, edx 78 81 not edx … … 84 87 ; Modify the pending x87 exceptions (FSW). 85 88 fnstenv [xBP - 20h] 86 mov ax, [xBP - 20h + 4] ; FSW is the 2nd qword in the 32-bit protected mode layout 87 and ax, dx 88 or ax, cx 89 mov [xBP - 20h + 4], ax 89 and [xBP - 20h + X86FSTENV32P.FSW], dx 90 or [xBP - 20h + X86FSTENV32P.FSW], cx 90 91 fldenv [xSP - 20h] 91 92 … … 101 102 stmxcsr [xBP - 10h] 102 103 mov eax, [xBP - 10h] 104 or edx, X86_FSW_XCPT_MASK & ~X86_MXCSR_XCPT_FLAGS ; Don't mix X86_FSW_SF with X86_MXCSR_DAZ. 105 and ecx, X86_MXCSR_XCPT_FLAGS ; Ditto 103 106 and eax, edx 104 107 or eax, ecx -
trunk/src/VBox/Runtime/common/math/fesetx87precision.asm
r96205 r96213 37 37 ; 38 38 ; @returns eax = previous precision mode, -1 on failure. 39 ; @param i RoundingMode32-bit: [xBP+8] msc64: ecx gcc64: edi39 ; @param iPrecisionMode 32-bit: [xBP+8] msc64: ecx gcc64: edi 40 40 ; 41 41 RT_NOCRT_BEGINPROC fesetx87precision -
trunk/src/VBox/Runtime/common/math/fetestexcept.asm
r96205 r96213 39 39 ; 40 40 ; @returns eax = pending exceptions (X86_FSW_XCPT_MASK) & fXcptMask. 41 ; @param fXcptMask 32-bit: [xBP+8] msc64: ecx gcc64: edi - exceptions to test for (X86_FSW_XCPT_MASK). 41 ; @param fXcptMask 32-bit: [xBP+8]; msc64: ecx; gcc64: edi; -- Exceptions to test for (X86_FSW_XCPT_MASK). 42 ; Accepts X86_FSW_SF and will return it if given as input. 42 43 ; 43 44 RT_NOCRT_BEGINPROC fetestexcept … … 87 88 stmxcsr [xBP - 10h] 88 89 and ecx, [xBP - 10h] 90 and ecx, X86_MXCSR_XCPT_FLAGS 89 91 or eax, ecx 90 92 -
trunk/src/VBox/Runtime/common/math/feupdateenv.asm
r96205 r96213 42 42 ; 43 43 ; @returns eax = 0 on success, -1 on failure. 44 ; @param pEnv 32-bit: [xBP+8] msc64: rcx gcc64: rdi - Saved envi ornment.44 ; @param pEnv 32-bit: [xBP+8] msc64: rcx gcc64: rdi - Saved environment. 45 45 ; 46 46 RT_NOCRT_BEGINPROC feupdateenv … … 74 74 stmxcsr [xBP - 10h] 75 75 mov edx, [xBP - 10h] 76 and edx, X86_MXCSR_XCPT_FLAGS 76 77 .no_sse: 77 78 fnstsw ax 78 79 or edx, eax 79 mov [xBP - 8h], edx ; save the pending exceptions here (will apply masklater).80 mov [xBP - 8h], edx ; save the pending exceptions here (will apply X86_FSW_XCPT_MASK later). 80 81 81 82 ; … … 95 96 %ifdef ASM_CALL64_GCC 96 97 mov edi, [xBP - 8h] 97 and edi, X86_F CW_XCPT_MASK98 and edi, X86_FSW_XCPT_MASK 98 99 %elifdef ASM_CALL64_MSC 99 100 mov ecx, [xBP - 8h] 100 and ecx, X86_F CW_XCPT_MASK101 and ecx, X86_FSW_XCPT_MASK 101 102 %else 102 103 mov ecx, [xBP - 8h] 103 and ecx, X86_F CW_XCPT_MASK104 and ecx, X86_FSW_XCPT_MASK 104 105 mov [xSP], ecx 105 106 %endif
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