Index: trunk/src/VBox/Runtime/common/math/feclearexcept.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/feclearexcept.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/feclearexcept.asm	(revision 96213)
@@ -37,5 +37,5 @@
 ;
 ; @returns  eax = 0 on success, non-zero on failure.
-; @param    fXcpts  32-bit: [xBP+8]     msc64: ecx      gcc64: edi   - X86_FSW_XCPT_MASK
+; @param    fXcpts  32-bit: [xBP+8]; msc64: ecx; gcc64: edi; -- Zero or more bits from X86_FSW_XCPT_MASK
 ;
 RT_NOCRT_BEGINPROC feclearexcept
@@ -49,5 +49,5 @@
 
         ;
-        ; Load the parameter into ecx.
+        ; Load the parameter into ecx, validate and adjust it.
         ;
 %ifdef ASM_CALL64_GCC
@@ -64,4 +64,10 @@
 %endif
 
+        ; #IE implies #SF
+        mov     al, cl
+        and     al, X86_FSW_IE
+        shl     al, X86_FSW_SF_BIT - X86_FSW_IE_BIT
+        or      cl, al
+
         ; Make it into and AND mask suitable for clearing the specified exceptions.
         not     ecx
@@ -72,6 +78,6 @@
 
         ; Modify the x87 flags first (ecx preserved).
-        cmp     ecx, X86_FSW_XCPT_MASK
-        jne     .partial_mask
+        cmp     ecx, ~X86_FSW_XCPT_MASK     ; This includes all the x87 exceptions, including stack error.
+        jne    .partial_mask
         fnclex
         jmp     .do_sse
@@ -93,4 +99,5 @@
         ; Modify the SSE flags (modifies ecx).
         stmxcsr [xBP - 10h]
+        or      ecx, X86_FSW_XCPT_MASK & ~X86_MXCSR_XCPT_FLAGS      ; Don't mix X86_FSW_SF with X86_MXCSR_DAZ.
         and     [xBP - 10h], ecx
         ldmxcsr [xBP - 10h]
Index: trunk/src/VBox/Runtime/common/math/fedisableexcept.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fedisableexcept.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fedisableexcept.asm	(revision 96213)
@@ -38,5 +38,5 @@
 ; @returns  eax = Previous enabled exceptions on success (not subject to fXcpt),
 ;                 -1 on failure.
-; @param    fXcpt   32-bit: [xBP+8]     msc64: ecx      gcc64: edi - Mask of exceptions to disable.
+; @param    fXcpt   32-bit: [xBP+8]; msc64: ecx; gcc64: edi; -- Mask of exceptions to disable.
 ;
 RT_NOCRT_BEGINPROC fedisableexcept
@@ -52,5 +52,4 @@
         ; Load the parameter into ecx.
         ;
-        or      eax, -1
 %ifdef ASM_CALL64_GCC
         mov     ecx, edi
@@ -58,6 +57,14 @@
         mov     ecx, [xBP + xCB*2]
 %endif
+        or      eax, -1
         test    ecx, ~X86_FCW_XCPT_MASK
+%ifndef RT_STRICT
         jnz     .return
+%else
+        jz      .input_ok
+        int3
+        jmp     .return
+.input_ok:
+%endif
 
         ;
Index: trunk/src/VBox/Runtime/common/math/feenableexcept.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/feenableexcept.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/feenableexcept.asm	(revision 96213)
@@ -52,5 +52,4 @@
         ; Load the parameter into ecx.
         ;
-        or      eax, -1
 %ifdef ASM_CALL64_GCC
         mov     ecx, edi
@@ -58,6 +57,14 @@
         mov     ecx, [xBP + xCB*2]
 %endif
+        or      eax, -1
         test    ecx, ~X86_FCW_XCPT_MASK
+%ifndef RT_STRICT
         jnz     .return
+%else
+        jz      .input_ok
+        int3
+        jmp     .return
+.input_ok:
+%endif
 
         ; Invert the mask as we're enabling the exceptions, not masking them.
@@ -71,5 +78,6 @@
         fstcw   [xBP - 10h]
 %ifdef RT_ARCH_X86 ; Return the inverted x87 mask in 32-bit mode.
-        movzx   eax, word [xBP - 10h]
+        mov     ax, word [xBP - 10h]
+        and     eax, X86_FCW_XCPT_MASK
 %endif
         and     word [xBP - 10h], cx
@@ -88,4 +96,5 @@
 %ifdef RT_ARCH_AMD64 ; Return the inverted MXCSR exception mask on AMD64 because windows doesn't necessarily set the x87 one.
         mov     eax, [xBP - 10h]
+        and     eax, X86_MXCSR_XCPT_MASK
         shr     eax, X86_MXCSR_XCPT_MASK_SHIFT
 %endif
@@ -96,5 +105,4 @@
 .return_ok:
         not     eax                     ; Invert it as we return the enabled rather than masked exceptions.
-        and     eax, X86_FCW_XCPT_MASK
 .return:
         leave
Index: trunk/src/VBox/Runtime/common/math/fegetenv.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fegetenv.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fegetenv.asm	(revision 96213)
@@ -36,6 +36,6 @@
 ; Gets the FPU+SSE environment.
 ;
-; @returns  eax = x87 exception mask (X86_FCW_XCPT_MASK)
-; @param    pEnv    32-bit: [xBP+8]     msc64: rcx      gcc64: rdi
+; @returns  eax = 0 on success (-1 on failure),
+; @param    pEnv    32-bit: [xBP+8]; msc64: rcx; gcc64: rdi -- Pointer to where to store the enviornment.
 ;
 RT_NOCRT_BEGINPROC fegetenv
Index: trunk/src/VBox/Runtime/common/math/fegetexcept.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fegetexcept.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fegetexcept.asm	(revision 96213)
@@ -34,7 +34,8 @@
 
 ;;
-; Gets the mask of enabled exceptions, e.g. unmaksed (BSD/GNU extension).
+; Gets the mask of enabled exceptions, e.g. unmasked (BSD/GNU extension).
 ;
-; @returns  eax = inverted x87 exception mask (X86_FCW_XCPT_MASK)
+; @returns  eax = inverted x87/sse exception mask (X86_MXCSR_XCPT_FLAGS).
+;           Will not return X86_FSW_SF.
 ;
 RT_NOCRT_BEGINPROC fegetexcept
@@ -62,6 +63,6 @@
 %endif
 
-        not     eax                     ; Invert it as we return the enabled rather than masked exceptions.
-        and     eax, X86_FCW_XCPT_MASK
+        not     eax                         ; Invert it as we return the enabled rather than masked exceptions.
+        and     eax, X86_MXCSR_XCPT_FLAGS   ; Use the SSE mask so we don't return X86_FSW_SF here.
 
 .return_val:
Index: trunk/src/VBox/Runtime/common/math/fegetexceptflag.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fegetexceptflag.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fegetexceptflag.asm	(revision 96213)
@@ -37,6 +37,7 @@
 ;
 ; @returns  eax = 0 on success, non-zero on failure.
-; @param    pfXcpts   32-bit: [xBP+8]     msc64: rcx      gcc64: rdi   - pointer to fexcept_t (16-bit)
-; @param    fXcptMask 32-bit: [xBP+c]     msc64: edx      gcc64: esi   - X86_FSW_XCPT_MASK
+; @param    pfXcpts     32-bit: [xBP+8]; msc64: rcx; gcc64: rdi; -- Where to store the flags (pointer to fexcept_t (16-bit)).
+; @param    fXcptMask   32-bit: [xBP+c]; msc64: edx; gcc64: esi; -- The exception flags to get (X86_FSW_XCPT_MASK).
+;                       Accepts X86_FSW_SF and will return it if given as input.
 ;
 RT_NOCRT_BEGINPROC fegetexceptflag
@@ -64,5 +65,12 @@
         or      eax, -1
         test    edx, ~X86_FSW_XCPT_MASK
+ %ifndef RT_STRICT
         jnz     .return
+ %else
+        jz      .input_ok
+        int3
+        jmp     .return
+.input_ok:
+ %endif
 %endif
 
@@ -88,4 +96,5 @@
         mov     ax, [xBP - 10h]
         and     ax, dx
+        and     ax, X86_MXCSR_XCPT_FLAGS        ; Don't confuse X86_MXCSR_DAZ for X86_FSW_SF.
         or      [xCX], ax
 
Index: trunk/src/VBox/Runtime/common/math/feholdexcept.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/feholdexcept.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/feholdexcept.asm	(revision 96213)
@@ -36,5 +36,5 @@
 ; Gets the FPU+SSE environment and disables (masks) all exceptions.
 ;
-; @returns  eax = x87 exception mask (X86_FCW_XCPT_MASK)
+; @returns  eax = 0 on success (-1 on failure)
 ; @param    pEnv    32-bit: [xBP+8]     msc64: rcx      gcc64: rdi
 ;
Index: trunk/src/VBox/Runtime/common/math/feraiseexcept.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/feraiseexcept.asm	(revision 96213)
+++ trunk/src/VBox/Runtime/common/math/feraiseexcept.asm	(revision 96213)
@@ -0,0 +1,178 @@
+; $Id$
+;; @file
+; IPRT - No-CRT feraiseexcept - AMD64 & X86.
+;
+
+;
+; Copyright (C) 2022 Oracle Corporation
+;
+; This file is part of VirtualBox Open Source Edition (OSE), as
+; available from http://www.virtualbox.org. This file is free software;
+; you can redistribute it and/or modify it under the terms of the GNU
+; General Public License (GPL) as published by the Free Software
+; Foundation, in version 2 as it comes in the "COPYING" file of the
+; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
+; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
+;
+; The contents of this file may alternatively be used under the terms
+; of the Common Development and Distribution License Version 1.0
+; (CDDL) only, as it comes in the "COPYING.CDDL" file of the
+; VirtualBox OSE distribution, in which case the provisions of the
+; CDDL are applicable instead of those of the GPL.
+;
+; You may elect to license modified versions of this file under the
+; terms and conditions of either the GPL or the CDDL or both.
+;
+
+
+%define RT_ASM_WITH_SEH64
+%include "iprt/asmdefs.mac"
+%include "iprt/x86.mac"
+
+
+%ifdef RT_ARCH_AMD64
+ %define RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+%endif
+
+
+BEGINCODE
+
+;;
+; Raises the given FPU/SSE exceptions.
+;
+; @returns  eax = 0 on success, -1 on failure.
+; @param    fXcpt   32-bit: [xBP+8]; msc64: ecx; gcc64: edi; --  The exceptions to raise.
+;                   Accepts X86_FSW_XCPT_MASK, but ignores X86_FSW_DE and X86_FSW_SF.
+;
+RT_NOCRT_BEGINPROC feraiseexcept
+        push    xBP
+        SEH64_PUSH_xBP
+        mov     xBP, xSP
+        SEH64_SET_FRAME_xBP 0
+%ifndef RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+        sub     xBP, 20h
+        SEH64_ALLOCATE_STACK 20h
+%endif
+        SEH64_END_PROLOGUE
+
+        ;
+        ; Load the parameter into rcx.
+        ;
+%ifdef ASM_CALL64_GCC
+        mov     rcx, rdi
+%elifdef RT_ARCH_X86
+        mov     ecx, [xBP + xCB*2]
+%endif
+%ifdef RT_STRICT
+        test    ecx, ~X86_FSW_XCPT_MASK
+        jz      .input_ok
+        int3
+.input_ok:
+%endif
+
+        ;
+        ; We have to raise these buggers one-by-one and order is said to be important.
+        ; We ASSUME that x86 runs is okay with the x87 raising the exception.
+        ;
+
+        ; 1. Invalid operation.  Like +0.0 / +0.0.
+        test    cl, X86_FSW_IE
+        jz      .not_ie
+%ifdef RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+        movss   xmm0, [g_r32Zero xWrtRIP]
+        divss   xmm0, xmm0
+%else
+        fnstenv [xBP - 20h]
+        or      byte [xBP - 20h + X86FSTENV32P.FSW], X86_FSW_IE
+        fldenv  [xBP - 20h]
+        fwait
+%endif
+.not_ie:
+
+        ; 2. Division by zero.
+        test    cl, X86_FSW_ZE
+        jz      .not_ze
+%ifdef RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+        movss   xmm0, [g_r32Zero xWrtRIP]
+        movss   xmm0, [g_r32One  xWrtRIP]
+        divss   xmm0, xmm1
+%else
+        fnstenv [xBP - 20h]
+        or      byte [xBP - 20h + X86FSTENV32P.FSW], X86_FSW_ZE
+        fldenv  [xBP - 20h]
+        fwait
+%endif
+.not_ze:
+
+        ; 3. Overflow.
+        test    cl, X86_FSW_OE
+        jz      .not_oe
+%ifdef RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+        xorps   xmm0, [g_r32Large xWrtRIP]
+        movss   xmm1, [g_r32Tiny  xWrtRIP]
+        divss   xmm0, xmm1
+%else
+        fnstenv [xBP - 20h]
+        or      byte [xBP - 20h + X86FSTENV32P.FSW], X86_FSW_OE
+        fldenv  [xBP - 20h]
+        fwait
+%endif
+.not_oe:
+
+        ; 4. Underflow.
+        test    cl, X86_FSW_UE
+        jz      .not_ue
+%ifdef RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+        xorps   xmm0, [g_r32Tiny  xWrtRIP]
+        movss   xmm1, [g_r32Large xWrtRIP]
+        divss   xmm0, xmm1
+%else
+        fnstenv [xBP - 20h]
+        or      byte [xBP - 20h + X86FSTENV32P.FSW], X86_FSW_UE
+        fldenv  [xBP - 20h]
+        fwait
+%endif
+.not_ue:
+
+        ; 5. Precision.
+        test    cl, X86_FSW_PE
+        jz      .not_pe
+%ifdef RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+        xorps   xmm0, [g_r32Two   xWrtRIP]
+        movss   xmm1, [g_r32Three xWrtRIP]
+        divss   xmm0, xmm1
+%else
+        fnstenv [xBP - 20h]
+        or      byte [xBP - 20h + X86FSTENV32P.FSW], X86_FSW_PE
+        fldenv  [xBP - 20h]
+        fwait
+%endif
+.not_pe:
+
+        ; We currently do not raise X86_FSW_DE or X86_FSW_SF.
+
+        ;
+        ; Return success.
+        ;
+        xor     eax, eax
+.return:
+        leave
+        ret
+ENDPROC   RT_NOCRT(feraiseexcept)
+
+
+%ifdef RT_NOCRT_RAISE_FPU_EXCEPT_IN_SSE_MODE
+g_r32Zero:
+        dd      0.0
+g_r32One:
+        dd      1.0
+g_r32Two:
+        dd      2.0
+g_r32Three:
+        dd      3.0
+g_r32Large:
+        dd      1.0e+38
+g_r32Tiny:
+        dd      1.0e-37
+%endif
+
Index: trunk/src/VBox/Runtime/common/math/fesetenv.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fesetenv.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fesetenv.asm	(revision 96213)
@@ -32,4 +32,7 @@
 %define RT_NOCRT_FE_DFL_ENV     1
 %define RT_NOCRT_FE_NOMASK_ENV  2
+%define RT_NOCRT_FE_PC53_ENV    3
+%define RT_NOCRT_FE_PC64_ENV    4
+%define RT_NOCRT_FE_LAST_ENV    4
 
 
@@ -66,22 +69,52 @@
         fnstenv [xBP - 20h]
 
-        cmp     xCX, RT_NOCRT_FE_DFL_ENV
-        je      .x87_default_env
+        ; Check for special "pointer" values:
+        cmp     xCX, RT_NOCRT_FE_LAST_ENV
+        ja      .x87_regular
+
+        or      eax, -1
+        test    xCX, xCX
+        jnz     .x87_special
+%ifdef RT_STRICT
+        int3
+%endif
+        jmp     .return
+
+        ;
+        ; Special x87 state. Clear all pending exceptions.
+        ;
+        ; We have 4 special environments with only some differences in FCW differs, so set
+        ; up FCW in AX, starting with a NOMASK environment as it has the fewest bits set.
+        ;
+.x87_special:
+        and     word [xBP - 20h  + X86FSTENV32P.FSW], ~X86_FSW_XCPT_ES_MASK
+        mov     ax, [xBP - 20h  + X86FSTENV32P.FCW]
+        and     ax, ~(X86_FCW_MASK_ALL | X86_FCW_PC_MASK | X86_FCW_RC_MASK    | X86_FCW_IC_MASK)
+%ifdef RT_OS_WINDOWS
+        or      ax,         X86_FCW_DM | X86_FCW_PC_53   | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE
+%else
+        or      ax,         X86_FCW_DM | X86_FCW_PC_64   | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE
+%endif
         cmp     xCX, RT_NOCRT_FE_NOMASK_ENV
-        je      .x87_default_nomask_env
-        jmp     .x87_regular
+        je      .x87_special_done
+        or      ax, X86_FCW_MASK_ALL
 
-.x87_default_env:
-        and     word [xCX + X86FSTENV32P.FCW], ~(X86_FCW_MASK_ALL | X86_FCW_PC_MASK | X86_FCW_RC_MASK    | X86_FCW_IC_MASK)
-        or      word [xCX + X86FSTENV32P.FCW],   X86_FCW_MASK_ALL | X86_FCW_PC_64   | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE
-        and     word [xCX + X86FSTENV32P.FSW], ~X86_FSW_XCPT_ES_MASK
+%ifdef RT_OS_WINDOWS
+        cmp     xCX, RT_NOCRT_FE_PC64_ENV
+        jne     .x87_special_done
+        or      ax, X86_FCW_PC_64                   ; X86_FCW_PC_64 is a super set of X86_FCW_PC_53, so no need to clear bits
+%else
+        cmp     xCX, RT_NOCRT_FE_PC53_ENV
+        jne     .x87_special_done
+        and     ax, X86_FCW_PC_64 & ~X86_FCW_PC_53  ; X86_FCW_PC_64 is a super set of X86_FCW_PC_53, so clear the bit that differs.
+%endif
+
+.x87_special_done:
+        mov     [xBP - 20h  + X86FSTENV32P.FCW], ax
         jmp     .x87_common
 
-.x87_default_nomask_env:
-        and     word [xCX + X86FSTENV32P.FCW], ~(X86_FCW_MASK_ALL | X86_FCW_PC_MASK | X86_FCW_RC_MASK    | X86_FCW_IC_MASK)
-        or      word [xCX + X86FSTENV32P.FCW],         X86_FCW_DM | X86_FCW_PC_64   | X86_FCW_RC_NEAREST | X86_FCW_IC_PROJECTIVE
-        and     word [xCX + X86FSTENV32P.FSW], ~X86_FSW_XCPT_ES_MASK
-        jmp     .x87_common
-
+        ;
+        ; Merge input and current.
+        ;
 .x87_regular:
         ; FCW:
@@ -111,4 +144,5 @@
         fldenv  [xBP - 20h]
 
+
         ;
         ; Now for SSE, if supported, where we'll restore everything as is.
@@ -122,8 +156,6 @@
 %endif
 
-        cmp     xCX, RT_NOCRT_FE_DFL_ENV
-        je      .sse_special_env
-        cmp     xCX, RT_NOCRT_FE_NOMASK_ENV
-        je      .sse_special_env
+        cmp     xCX, RT_NOCRT_FE_LAST_ENV
+        jb      .sse_special_env
         ldmxcsr [xCX + 28]
         jmp     .return_okay
@@ -134,7 +166,7 @@
         and     eax, ~(X86_MXCSR_XCPT_FLAGS | X86_MXCSR_XCPT_MASK | X86_MXCSR_RC_MASK | X86_MXCSR_DAZ | X86_MXCSR_FZ)
         or      eax, X86_MXCSR_RC_NEAREST | X86_MXCSR_DM
-        cmp     xCX, RT_NOCRT_FE_NOMASK_ENV
+        cmp     xCX, RT_NOCRT_FE_NOMASK_ENV                     ; Only the NOMASK one differs here.
         je      .sse_special_load_eax
-        or      eax, X86_MXCSR_RC_NEAREST | X86_MXCSR_XCPT_MASK ; default enviornment masks all exceptions
+        or      eax, X86_MXCSR_RC_NEAREST | X86_MXCSR_XCPT_MASK ; default environment masks all exceptions
 .sse_special_load_eax:
         mov     [xBP - 10h], eax
@@ -146,4 +178,5 @@
 .return_okay:
         xor     eax, eax
+.return:
         leave
         ret
Index: trunk/src/VBox/Runtime/common/math/fesetexceptflag.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fesetexceptflag.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fesetexceptflag.asm	(revision 96213)
@@ -37,6 +37,7 @@
 ;
 ; @returns  eax = 0 on success, non-zero on failure.
-; @param    pfXcpts   32-bit: [xBP+8]     msc64: rcx      gcc64: rdi   - pointer to fexcept_t (16-bit)
-; @param    fXcptMask 32-bit: [xBP+c]     msc64: edx      gcc64: esi   - X86_FSW_XCPT_MASK
+; @param    pfXcpts     32-bit: [xBP+8]; msc64: rcx; gcc64: rdi; -- pointer to fexcept_t (16-bit)
+; @param    fXcptMask   32-bit: [xBP+c]; msc64: edx; gcc64: esi; -- X86_MXCSR_XCPT_FLAGS (X86_FSW_XCPT_MASK)
+;                       Accepts X86_FSW_SF.
 ;
 RT_NOCRT_BEGINPROC fesetexceptflag
@@ -50,5 +51,5 @@
 
         ;
-        ; Load the parameter into ecx (*pfXcpts) and edx (fXcptMask).
+        ; Load the parameter into ecx (*pfXcpts) and edx (fXcptMask) and validate the latter.
         ;
 %ifdef ASM_CALL64_GCC
@@ -73,6 +74,8 @@
 %endif
 
+        ;
         ; Apply the AND mask to ECX and invert it so we can use it to clear flags
         ; before OR'ing in the new values.
+        ;
         and     ecx, edx
         not     edx
@@ -84,8 +87,6 @@
         ; Modify the pending x87 exceptions (FSW).
         fnstenv [xBP - 20h]
-        mov     ax, [xBP - 20h + 4]       ; FSW is the 2nd qword in the 32-bit protected mode layout
-        and     ax, dx
-        or      ax, cx
-        mov     [xBP - 20h + 4], ax
+        and     [xBP - 20h + X86FSTENV32P.FSW], dx
+        or      [xBP - 20h + X86FSTENV32P.FSW], cx
         fldenv  [xSP - 20h]
 
@@ -101,4 +102,6 @@
         stmxcsr [xBP - 10h]
         mov     eax, [xBP - 10h]
+        or      edx, X86_FSW_XCPT_MASK & ~X86_MXCSR_XCPT_FLAGS      ; Don't mix X86_FSW_SF with X86_MXCSR_DAZ.
+        and     ecx, X86_MXCSR_XCPT_FLAGS                           ; Ditto
         and     eax, edx
         or      eax, ecx
Index: trunk/src/VBox/Runtime/common/math/fesetx87precision.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fesetx87precision.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fesetx87precision.asm	(revision 96213)
@@ -37,5 +37,5 @@
 ;
 ; @returns  eax = previous precision mode, -1 on failure.
-; @param    iRoundingMode   32-bit: [xBP+8]     msc64: ecx      gcc64: edi
+; @param    iPrecisionMode  32-bit: [xBP+8]     msc64: ecx      gcc64: edi
 ;
 RT_NOCRT_BEGINPROC fesetx87precision
Index: trunk/src/VBox/Runtime/common/math/fetestexcept.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/fetestexcept.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/fetestexcept.asm	(revision 96213)
@@ -39,5 +39,6 @@
 ;
 ; @returns  eax = pending exceptions (X86_FSW_XCPT_MASK) & fXcptMask.
-; @param    fXcptMask 32-bit: [xBP+8]     msc64: ecx      gcc64: edi - exceptions to test for (X86_FSW_XCPT_MASK).
+; @param    fXcptMask   32-bit: [xBP+8]; msc64: ecx; gcc64: edi; -- Exceptions to test for (X86_FSW_XCPT_MASK).
+;                       Accepts X86_FSW_SF and will return it if given as input.
 ;
 RT_NOCRT_BEGINPROC fetestexcept
@@ -87,4 +88,5 @@
         stmxcsr [xBP - 10h]
         and     ecx, [xBP - 10h]
+        and     ecx, X86_MXCSR_XCPT_FLAGS
         or      eax, ecx
 
Index: trunk/src/VBox/Runtime/common/math/feupdateenv.asm
===================================================================
--- trunk/src/VBox/Runtime/common/math/feupdateenv.asm	(revision 96206)
+++ trunk/src/VBox/Runtime/common/math/feupdateenv.asm	(revision 96213)
@@ -42,5 +42,5 @@
 ;
 ; @returns  eax = 0 on success, -1 on failure.
-; @param    pEnv    32-bit: [xBP+8]     msc64: rcx      gcc64: rdi - Saved enviornment.
+; @param    pEnv    32-bit: [xBP+8]     msc64: rcx      gcc64: rdi - Saved environment.
 ;
 RT_NOCRT_BEGINPROC feupdateenv
@@ -74,8 +74,9 @@
         stmxcsr [xBP - 10h]
         mov     edx, [xBP - 10h]
+        and     edx, X86_MXCSR_XCPT_FLAGS
 .no_sse:
         fnstsw  ax
         or      edx, eax
-        mov     [xBP - 8h], edx        ; save the pending exceptions here (will apply mask later).
+        mov     [xBP - 8h], edx        ; save the pending exceptions here (will apply X86_FSW_XCPT_MASK later).
 
         ;
@@ -95,11 +96,11 @@
 %ifdef ASM_CALL64_GCC
         mov     edi, [xBP - 8h]
-        and     edi, X86_FCW_XCPT_MASK
+        and     edi, X86_FSW_XCPT_MASK
 %elifdef ASM_CALL64_MSC
         mov     ecx, [xBP - 8h]
-        and     ecx, X86_FCW_XCPT_MASK
+        and     ecx, X86_FSW_XCPT_MASK
 %else
         mov     ecx, [xBP - 8h]
-        and     ecx, X86_FCW_XCPT_MASK
+        and     ecx, X86_FSW_XCPT_MASK
         mov     [xSP], ecx
 %endif
