Changeset 96335 in vbox

Timestamp:

Aug 19, 2022 12:07:40 PM (2 years ago)

Author:

vboxsync

Message:

VMM/IEM: Implement maxps/maxpd instructions, bugref:9898

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/IEMAllAImpl.asm (modified) (1 diff)
• VMMAll/IEMAllAImplC.cpp (modified) (1 diff)
• VMMAll/IEMAllInstructionsTwoByte0f.cpp.h (modified) (1 diff)
• include/IEMInternal.h (modified) (3 diffs)
• testcase/tstIEMCheckMc.cpp (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm

@@ -4595 +4595 @@
 IEMIMPL_FP_F2 divps
 IEMIMPL_FP_F2 divpd
+IEMIMPL_FP_F2 maxps
+IEMIMPL_FP_F2 maxpd

trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp

@@ -14491 +14491 @@
 }
 #endif
+
+
+/**
+ * MAXPS
+ */
+#ifdef IEM_WITHOUT_ASSEMBLY
+static uint32_t iemAImpl_maxps_u128_worker(PRTFLOAT32U pr32Res, uint32_t fMxcsr, PCRTFLOAT32U pr32Val1, PCRTFLOAT32U pr32Val2)
+{
+    RTFLOAT32U r32Src1, r32Src2;
+    iemSsePrepareValueR32(&r32Src1, fMxcsr, pr32Val1);
+    iemSsePrepareValueR32(&r32Src2, fMxcsr, pr32Val2);
+
+    if (RTFLOAT32U_IS_ZERO(&r32Src1) && RTFLOAT32U_IS_ZERO(&r32Src2))
+    {
+        *pr32Res = r32Src2;
+        return fMxcsr;
+    }
+    else if (RTFLOAT32U_IS_NAN(&r32Src1) || RTFLOAT32U_IS_NAN(&r32Src2))
+    {
+        *pr32Res = r32Src2;
+        return fMxcsr | X86_MXCSR_IE;
+    }
+
+    softfloat_state_t SoftState = IEM_SOFTFLOAT_STATE_INITIALIZER_FROM_MXCSR(fMxcsr);
+    bool fLe = f32_le(iemFpSoftF32FromIprt(&r32Src1), iemFpSoftF32FromIprt(&r32Src2), &SoftState);
+    return iemSseSoftStateAndR32ToMxcsrAndIprtResultNoFz(&SoftState,
+                                                           fLe
+                                                         ? iemFpSoftF32FromIprt(&r32Src2)
+                                                         : iemFpSoftF32FromIprt(&r32Src1),
+                                                         pr32Res, fMxcsr, &r32Src1, &r32Src2);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_maxps_u128,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2))
+{
+    pResult->MXCSR |= iemAImpl_maxps_u128_worker(&pResult->uResult.ar32[0], pFpuState->MXCSR, &puSrc1->ar32[0], &puSrc2->ar32[0]);
+    pResult->MXCSR |= iemAImpl_maxps_u128_worker(&pResult->uResult.ar32[1], pFpuState->MXCSR, &puSrc1->ar32[1], &puSrc2->ar32[1]);
+    pResult->MXCSR |= iemAImpl_maxps_u128_worker(&pResult->uResult.ar32[2], pFpuState->MXCSR, &puSrc1->ar32[2], &puSrc2->ar32[2]);
+    pResult->MXCSR |= iemAImpl_maxps_u128_worker(&pResult->uResult.ar32[3], pFpuState->MXCSR, &puSrc1->ar32[3], &puSrc2->ar32[3]);
+}
+#endif
+
+
+/**
+ * MAXPD
+ */
+#ifdef IEM_WITHOUT_ASSEMBLY
+static uint32_t iemAImpl_maxpd_u128_worker(PRTFLOAT64U pr64Res, uint32_t fMxcsr, PCRTFLOAT64U pr64Val1, PCRTFLOAT64U pr64Val2)
+{
+    RTFLOAT64U r64Src1, r64Src2;
+    iemSsePrepareValueR64(&r64Src1, fMxcsr, pr64Val1);
+    iemSsePrepareValueR64(&r64Src2, fMxcsr, pr64Val2);
+
+    if (RTFLOAT64U_IS_ZERO(&r64Src1) && RTFLOAT32U_IS_ZERO(&r64Src2))
+    {
+        *pr64Res = r64Src2;
+        return fMxcsr;
+    }
+    else if (RTFLOAT64U_IS_NAN(&r64Src1) || RTFLOAT64U_IS_NAN(&r64Src2))
+    {
+        *pr64Res = r64Src2;
+        return fMxcsr | X86_MXCSR_IE;
+    }
+
+    softfloat_state_t SoftState = IEM_SOFTFLOAT_STATE_INITIALIZER_FROM_MXCSR(fMxcsr);
+    bool fLe = f64_le(iemFpSoftF64FromIprt(&r64Src1), iemFpSoftF64FromIprt(&r64Src2), &SoftState);
+    return iemSseSoftStateAndR64ToMxcsrAndIprtResultNoFz(&SoftState,
+                                                           fLe
+                                                         ? iemFpSoftF64FromIprt(&r64Src2)
+                                                         : iemFpSoftF64FromIprt(&r64Src1),
+                                                         pr64Res, fMxcsr, &r64Src1, &r64Src2);
+}
+
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_maxpd_u128,(PX86FXSTATE pFpuState, PIEMSSERESULT pResult, PCX86XMMREG puSrc1, PCX86XMMREG puSrc2))
+{
+    pResult->MXCSR |= iemAImpl_maxpd_u128_worker(&pResult->uResult.ar64[0], pFpuState->MXCSR, &puSrc1->ar64[0], &puSrc2->ar64[0]);
+    pResult->MXCSR |= iemAImpl_maxpd_u128_worker(&pResult->uResult.ar64[1], pFpuState->MXCSR, &puSrc1->ar64[1], &puSrc2->ar64[1]);
+}
+#endif

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h

@@ -4049 +4049 @@
 FNIEMOP_STUB(iemOp_divsd_Vsd_Wsd);
 
+
 /** Opcode      0x0f 0x5f - maxps Vps, Wps */
-FNIEMOP_STUB(iemOp_maxps_Vps_Wps);
+FNIEMOP_DEF(iemOp_maxps_Vps_Wps)
+{
+    IEMOP_MNEMONIC2(RM, MAXPS, maxps, Vps, Wps, DISOPTYPE_HARMLESS, 0);
+    return FNIEMOP_CALL_1(iemOpCommonSseFp_FullFull_To_Full, iemAImpl_maxps_u128);
+}
+
+
 /** Opcode 0x66 0x0f 0x5f - maxpd Vpd, Wpd */
-FNIEMOP_STUB(iemOp_maxpd_Vpd_Wpd);
+FNIEMOP_DEF(iemOp_maxpd_Vpd_Wpd)
+{
+    IEMOP_MNEMONIC2(RM, MAXPD, maxpd, Vpd, Wpd, DISOPTYPE_HARMLESS, 0);
+    return FNIEMOP_CALL_1(iemOpCommonSse2Fp_FullFull_To_Full, iemAImpl_maxpd_u128);
+}
+
+
 /** Opcode 0xf3 0x0f 0x5f - maxss Vss, Wss */
 FNIEMOP_STUB(iemOp_maxss_Vss_Wss);

trunk/src/VBox/VMM/include/IEMInternal.h

@@ -2426 +2426 @@
 FNIEMAIMPLFPSSEF2U128 iemAImpl_divps_u128;
 FNIEMAIMPLFPSSEF2U128 iemAImpl_divpd_u128;
+FNIEMAIMPLFPSSEF2U128 iemAImpl_maxps_u128;
+FNIEMAIMPLFPSSEF2U128 iemAImpl_maxpd_u128;
 
 FNIEMAIMPLFPAVXF3U128 iemAImpl_vaddps_u128, iemAImpl_vaddps_u128_fallback;
@@ -2437 +2439 @@
 FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivps_u128, iemAImpl_vdivps_u128_fallback;
 FNIEMAIMPLFPAVXF3U128 iemAImpl_vdivpd_u128, iemAImpl_vdivpd_u128_fallback;
+FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxps_u128, iemAImpl_vmaxps_u128_fallback;
+FNIEMAIMPLFPAVXF3U128 iemAImpl_vmaxpd_u128, iemAImpl_vmaxpd_u128_fallback;
 
 FNIEMAIMPLFPAVXF3U256 iemAImpl_vaddps_u256, iemAImpl_vaddps_u256_fallback;
@@ -2448 +2452 @@
 FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivps_u256, iemAImpl_vdivps_u256_fallback;
 FNIEMAIMPLFPAVXF3U256 iemAImpl_vdivpd_u256, iemAImpl_vdivpd_u256_fallback;
+FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxps_u256, iemAImpl_vmaxps_u256_fallback;
+FNIEMAIMPLFPAVXF3U256 iemAImpl_vmaxpd_u256, iemAImpl_vmaxpd_u256_fallback;
 /** @} */
 

trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp

@@ -472 +472 @@
 #define iemAImpl_divps_u128             NULL
 #define iemAImpl_divpd_u128             NULL
+#define iemAImpl_maxps_u128             NULL
+#define iemAImpl_maxpd_u128             NULL
 
 /** @}  */