Changeset 96403 in vbox
- Timestamp:
- Aug 22, 2022 4:01:16 PM (2 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 6 edited
-
VMMAll/IEMAllAImpl.asm (modified) (1 diff)
-
VMMAll/IEMAllAImplC.cpp (modified) (1 diff)
-
VMMAll/IEMAllInstructionsTwoByte0f.cpp.h (modified) (1 diff)
-
VMMAll/IEMAllInstructionsVexMap1.cpp.h (modified) (1 diff)
-
include/IEMInternal.h (modified) (1 diff)
-
testcase/tstIEMCheckMc.cpp (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r96394 r96403 4803 4803 EPILOGUE_4_ARGS 4804 4804 ENDPROC iemAImpl_vcvtpd2ps_u256 4805 4806 4807 ;; 4808 ; shufps instructions with 8-bit immediates. 4809 ; 4810 ; @param A0 Pointer to the destination media register size operand (input/output). 4811 ; @param A1 Pointer to the first source media register size operand (input). 4812 ; @param A2 The 8-bit immediate 4813 ; 4814 BEGINPROC_FASTCALL iemAImpl_shufps_u128, 16 4815 PROLOGUE_3_ARGS 4816 IEMIMPL_SSE_PROLOGUE 4817 4818 movdqu xmm0, [A0] 4819 movdqu xmm1, [A1] 4820 lea T1, [.imm0 xWrtRIP] 4821 lea T0, [A2 + A2*2] ; sizeof(shufpX+ret+int3) == 6: (A2 * 3) *2 4822 lea T1, [T1 + T0*2] 4823 call T1 4824 movdqu [A0], xmm0 4825 4826 IEMIMPL_SSE_EPILOGUE 4827 EPILOGUE_3_ARGS 4828 %assign bImm 0 4829 %rep 256 4830 .imm %+ bImm: 4831 shufps xmm0, xmm1, bImm 4832 ret 4833 int3 4834 %assign bImm bImm + 1 4835 %endrep 4836 .immEnd: ; 256*6 == 0x600 4837 dw 0xf9ff + (.immEnd - .imm0) ; will cause warning if entries are too big. 4838 dw 0x105ff - (.immEnd - .imm0) ; will cause warning if entries are too small. 4839 ENDPROC iemAImpl_shufps_u128 4840 4841 4842 ;; 4843 ; shufp{s,d} instructions with 8-bit immediates. 4844 ; 4845 ; @param 1 The instruction name. 4846 ; 4847 ; @param A0 Pointer to the destination media register size operand (input/output). 4848 ; @param A1 Pointer to the first source media register size operand (input). 4849 ; @param A2 The 8-bit immediate 4850 ; 4851 %macro IEMIMPL_MEDIA_SSE_SHUFPX 1 4852 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u128, 16 4853 PROLOGUE_3_ARGS 4854 IEMIMPL_SSE_PROLOGUE 4855 4856 movdqu xmm0, [A0] 4857 movdqu xmm1, [A1] 4858 lea T1, [.imm0 xWrtRIP] 4859 lea T0, [A2 + A2*2] ; sizeof(shufpX+ret) == 6: (A2 * 3) *2 4860 lea T1, [T1 + T0*2] 4861 call T1 4862 movdqu [A0], xmm0 4863 4864 IEMIMPL_SSE_EPILOGUE 4865 EPILOGUE_3_ARGS 4866 %assign bImm 0 4867 %rep 256 4868 .imm %+ bImm: 4869 %1 xmm0, xmm1, bImm 4870 ret 4871 %assign bImm bImm + 1 4872 %endrep 4873 .immEnd: ; 256*6 == 0x600 4874 dw 0xf9ff + (.immEnd - .imm0) ; will cause warning if entries are too big. 4875 dw 0x105ff - (.immEnd - .imm0) ; will cause warning if entries are too small. 4876 ENDPROC iemAImpl_ %+ %1 %+ _u128 4877 %endmacro 4878 4879 ;IEMIMPL_MEDIA_SSE_SHUFPX shufps 4880 IEMIMPL_MEDIA_SSE_SHUFPX shufpd 4881 4882 4883 ;; 4884 ; vshufp{s,d} instructions with 8-bit immediates. 4885 ; 4886 ; @param 1 The instruction name. 4887 ; 4888 ; @param A0 Pointer to the destination media register size operand (output). 4889 ; @param A1 Pointer to the first source media register size operand (input). 4890 ; @param A2 Pointer to the second source media register size operand (input). 4891 ; @param A3 The 8-bit immediate 4892 ; 4893 %macro IEMIMPL_MEDIA_AVX_VSHUFPX 1 4894 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u128, 16 4895 PROLOGUE_3_ARGS 4896 IEMIMPL_AVX_PROLOGUE 4897 4898 movdqu xmm0, [A1] 4899 movdqu xmm1, [A2] 4900 lea T1, [.imm0 xWrtRIP] 4901 lea T0, [A3 + A3*2] ; sizeof(vshufpX+ret) == 6: (A3 * 3) *2 4902 lea T1, [T1 + T0*2] 4903 call T1 4904 movdqu [A0], xmm0 4905 4906 IEMIMPL_AVX_EPILOGUE 4907 EPILOGUE_3_ARGS 4908 %assign bImm 0 4909 %rep 256 4910 .imm %+ bImm: 4911 %1 xmm0, xmm0, xmm1, bImm 4912 ret 4913 %assign bImm bImm + 1 4914 %endrep 4915 .immEnd: ; 256*6 == 0x600 4916 dw 0xf9ff + (.immEnd - .imm0) ; will cause warning if entries are too big. 4917 dw 0x105ff - (.immEnd - .imm0) ; will cause warning if entries are too small. 4918 ENDPROC iemAImpl_ %+ %1 %+ _u128 4919 4920 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u256, 16 4921 PROLOGUE_3_ARGS 4922 IEMIMPL_AVX_PROLOGUE 4923 4924 vmovdqu ymm0, [A1] 4925 vmovdqu ymm1, [A2] 4926 lea T1, [.imm0 xWrtRIP] 4927 lea T0, [A3 + A3*2] ; sizeof(vshufpX+ret) == 6: (A3 * 3) *2 4928 lea T1, [T1 + T0*2] 4929 call T1 4930 vmovdqu [A0], ymm0 4931 4932 IEMIMPL_AVX_EPILOGUE 4933 EPILOGUE_3_ARGS 4934 %assign bImm 0 4935 %rep 256 4936 .imm %+ bImm: 4937 %1 ymm0, ymm0, ymm1, bImm 4938 ret 4939 %assign bImm bImm + 1 4940 %endrep 4941 .immEnd: ; 256*6 == 0x600 4942 dw 0xf9ff + (.immEnd - .imm0) ; will cause warning if entries are too big. 4943 dw 0x105ff - (.immEnd - .imm0) ; will cause warning if entries are too small. 4944 ENDPROC iemAImpl_ %+ %1 %+ _u256 4945 %endmacro 4946 4947 IEMIMPL_MEDIA_AVX_VSHUFPX vshufps 4948 IEMIMPL_MEDIA_AVX_VSHUFPX vshufpd -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r96394 r96403 15032 15032 } 15033 15033 #endif 15034 15035 15036 /** 15037 * [V]SHUFPS 15038 */ 15039 #ifdef IEM_WITHOUT_ASSEMBLY 15040 IEM_DECL_IMPL_DEF(void, iemAImpl_shufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil)) 15041 { 15042 RTUINT128U const uSrc1 = *puDst; 15043 RTUINT128U const uSrc2 = *puSrc; 15044 ASMCompilerBarrier(); 15045 puDst->au32[0] = uSrc1.au32[bEvil & 0x3]; 15046 puDst->au32[1] = uSrc1.au32[(bEvil >> 2) & 0x3]; 15047 puDst->au32[2] = uSrc2.au32[(bEvil >> 4) & 0x3]; 15048 puDst->au32[3] = uSrc2.au32[(bEvil >> 6) & 0x3]; 15049 } 15050 #endif 15051 15052 15053 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil)) 15054 { 15055 RTUINT128U const uSrc1 = *puSrc1; 15056 RTUINT128U const uSrc2 = *puSrc2; 15057 ASMCompilerBarrier(); 15058 puDst->au32[0] = uSrc1.au32[bEvil & 0x3]; 15059 puDst->au32[1] = uSrc1.au32[(bEvil >> 2) & 0x3]; 15060 puDst->au32[2] = uSrc2.au32[(bEvil >> 4) & 0x3]; 15061 puDst->au32[3] = uSrc2.au32[(bEvil >> 6) & 0x3]; 15062 } 15063 15064 15065 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil)) 15066 { 15067 RTUINT256U const uSrc1 = *puSrc1; 15068 RTUINT256U const uSrc2 = *puSrc2; 15069 ASMCompilerBarrier(); 15070 puDst->au32[0] = uSrc1.au32[bEvil & 0x3]; 15071 puDst->au32[1] = uSrc1.au32[(bEvil >> 2) & 0x3]; 15072 puDst->au32[2] = uSrc2.au32[(bEvil >> 4) & 0x3]; 15073 puDst->au32[3] = uSrc2.au32[(bEvil >> 6) & 0x3]; 15074 15075 puDst->au32[4] = uSrc1.au32[4 + (bEvil & 0x3)]; 15076 puDst->au32[5] = uSrc1.au32[4 + ((bEvil >> 2) & 0x3)]; 15077 puDst->au32[6] = uSrc2.au32[4 + ((bEvil >> 4) & 0x3)]; 15078 puDst->au32[7] = uSrc2.au32[4 + ((bEvil >> 6) & 0x3)]; 15079 } 15080 15081 15082 /** 15083 * [V]SHUFPD 15084 */ 15085 #ifdef IEM_WITHOUT_ASSEMBLY 15086 IEM_DECL_IMPL_DEF(void, iemAImpl_shufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil)) 15087 { 15088 RTUINT128U const uSrc1 = *puDst; 15089 RTUINT128U const uSrc2 = *puSrc; 15090 ASMCompilerBarrier(); 15091 puDst->au64[0] = (bEvil & RT_BIT(0)) ? uSrc1.au64[1] : uSrc1.au64[0]; 15092 puDst->au64[1] = (bEvil & RT_BIT(1)) ? uSrc2.au64[1] : uSrc2.au64[0]; 15093 } 15094 #endif 15095 15096 15097 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil)) 15098 { 15099 RTUINT128U const uSrc1 = *puSrc1; 15100 RTUINT128U const uSrc2 = *puSrc2; 15101 ASMCompilerBarrier(); 15102 puDst->au64[0] = (bEvil & RT_BIT(0)) ? uSrc1.au64[1] : uSrc1.au64[0]; 15103 puDst->au64[1] = (bEvil & RT_BIT(1)) ? uSrc2.au64[1] : uSrc2.au64[0]; 15104 } 15105 15106 15107 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil)) 15108 { 15109 RTUINT256U const uSrc1 = *puSrc1; 15110 RTUINT256U const uSrc2 = *puSrc2; 15111 ASMCompilerBarrier(); 15112 puDst->au64[0] = (bEvil & RT_BIT(0)) ? uSrc1.au64[1] : uSrc1.au64[0]; 15113 puDst->au64[1] = (bEvil & RT_BIT(1)) ? uSrc2.au64[1] : uSrc2.au64[0]; 15114 puDst->au64[2] = (bEvil & RT_BIT(2)) ? uSrc1.au64[3] : uSrc1.au64[2]; 15115 puDst->au64[3] = (bEvil & RT_BIT(3)) ? uSrc2.au64[3] : uSrc2.au64[2]; 15116 } -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r96394 r96403 9950 9950 9951 9951 /** Opcode 0x0f 0xc6 - shufps Vps, Wps, Ib */ 9952 FNIEMOP_STUB(iemOp_shufps_Vps_Wps_Ib); 9952 FNIEMOP_DEF(iemOp_shufps_Vps_Wps_Ib) 9953 { 9954 IEMOP_MNEMONIC3(RMI, SHUFPS, shufps, Vps, Wps, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 9955 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 9956 if (IEM_IS_MODRM_REG_MODE(bRm)) 9957 { 9958 /* 9959 * Register, register. 9960 */ 9961 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); 9962 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9963 IEM_MC_BEGIN(3, 0); 9964 IEM_MC_ARG(PRTUINT128U, pDst, 0); 9965 IEM_MC_ARG(PCRTUINT128U, pSrc, 1); 9966 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 2); 9967 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 9968 IEM_MC_PREPARE_SSE_USAGE(); 9969 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 9970 IEM_MC_REF_XREG_U128_CONST(pSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 9971 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_shufps_u128, pDst, pSrc, bEvilArg); 9972 IEM_MC_ADVANCE_RIP(); 9973 IEM_MC_END(); 9974 } 9975 else 9976 { 9977 /* 9978 * Register, memory. 9979 */ 9980 IEM_MC_BEGIN(3, 2); 9981 IEM_MC_ARG(PRTUINT128U, pDst, 0); 9982 IEM_MC_LOCAL(RTUINT128U, uSrc); 9983 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, pSrc, uSrc, 1); 9984 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 9985 9986 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 9987 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); 9988 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 2); 9989 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 9990 IEM_MC_MAYBE_RAISE_SSE_RELATED_XCPT(); 9991 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 9992 9993 IEM_MC_PREPARE_SSE_USAGE(); 9994 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 9995 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_shufps_u128, pDst, pSrc, bEvilArg); 9996 9997 IEM_MC_ADVANCE_RIP(); 9998 IEM_MC_END(); 9999 } 10000 return VINF_SUCCESS; 10001 } 10002 10003 9953 10004 /** Opcode 0x66 0x0f 0xc6 - shufpd Vpd, Wpd, Ib */ 9954 FNIEMOP_STUB(iemOp_shufpd_Vpd_Wpd_Ib); 10005 FNIEMOP_DEF(iemOp_shufpd_Vpd_Wpd_Ib) 10006 { 10007 IEMOP_MNEMONIC3(RMI, SHUFPD, shufpd, Vpd, Wpd, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0); 10008 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); 10009 if (IEM_IS_MODRM_REG_MODE(bRm)) 10010 { 10011 /* 10012 * Register, register. 10013 */ 10014 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); 10015 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10016 IEM_MC_BEGIN(3, 0); 10017 IEM_MC_ARG(PRTUINT128U, pDst, 0); 10018 IEM_MC_ARG(PCRTUINT128U, pSrc, 1); 10019 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 2); 10020 IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT(); 10021 IEM_MC_PREPARE_SSE_USAGE(); 10022 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 10023 IEM_MC_REF_XREG_U128_CONST(pSrc, IEM_GET_MODRM_RM(pVCpu, bRm)); 10024 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_shufpd_u128, pDst, pSrc, bEvilArg); 10025 IEM_MC_ADVANCE_RIP(); 10026 IEM_MC_END(); 10027 } 10028 else 10029 { 10030 /* 10031 * Register, memory. 10032 */ 10033 IEM_MC_BEGIN(3, 2); 10034 IEM_MC_ARG(PRTUINT128U, pDst, 0); 10035 IEM_MC_LOCAL(RTUINT128U, uSrc); 10036 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, pSrc, uSrc, 1); 10037 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); 10038 10039 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); 10040 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); 10041 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 2); 10042 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 10043 IEM_MC_MAYBE_RAISE_SSE2_RELATED_XCPT(); 10044 IEM_MC_FETCH_MEM_U128_ALIGN_SSE(uSrc, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); 10045 10046 IEM_MC_PREPARE_SSE_USAGE(); 10047 IEM_MC_REF_XREG_U128(pDst, IEM_GET_MODRM_REG(pVCpu, bRm)); 10048 IEM_MC_CALL_VOID_AIMPL_3(iemAImpl_shufpd_u128, pDst, pSrc, bEvilArg); 10049 10050 IEM_MC_ADVANCE_RIP(); 10051 IEM_MC_END(); 10052 } 10053 return VINF_SUCCESS; 10054 } 10055 10056 9955 10057 /* Opcode 0xf3 0x0f 0xc6 - invalid */ 9956 10058 /* Opcode 0xf2 0x0f 0xc6 - invalid */ -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsVexMap1.cpp.h
r96109 r96403 3970 3970 /* Opcode VEX.F2.0F 0xc5 - invalid */ 3971 3971 3972 3973 #define VSHUFP_X(a_Instr) \ 3974 uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm); \ 3975 if (IEM_IS_MODRM_REG_MODE(bRm)) \ 3976 { \ 3977 /* \ 3978 * Register, register. \ 3979 */ \ 3980 if (pVCpu->iem.s.uVexLength) \ 3981 { \ 3982 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); \ 3983 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2); \ 3984 IEM_MC_BEGIN(4, 3); \ 3985 IEM_MC_LOCAL(RTUINT256U, uDst); \ 3986 IEM_MC_LOCAL(RTUINT256U, uSrc1); \ 3987 IEM_MC_LOCAL(RTUINT256U, uSrc2); \ 3988 IEM_MC_ARG_LOCAL_REF(PRTUINT256U, puDst, uDst, 0); \ 3989 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc1, uSrc1, 1); \ 3990 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc2, uSrc2, 2); \ 3991 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 3); \ 3992 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); \ 3993 IEM_MC_PREPARE_AVX_USAGE(); \ 3994 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 3995 IEM_MC_FETCH_YREG_U256(uSrc2, IEM_GET_MODRM_RM(pVCpu, bRm)); \ 3996 IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_ ## a_Instr ## _u256, \ 3997 iemAImpl_ ## a_Instr ## _u256_fallback), puDst, puSrc1, puSrc2, bEvilArg); \ 3998 IEM_MC_STORE_YREG_U256_ZX_VLMAX(IEM_GET_MODRM_REG(pVCpu, bRm), uDst); \ 3999 IEM_MC_ADVANCE_RIP(); \ 4000 IEM_MC_END(); \ 4001 } \ 4002 else \ 4003 { \ 4004 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); \ 4005 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); \ 4006 IEM_MC_BEGIN(4, 0); \ 4007 IEM_MC_ARG(PRTUINT128U, puDst, 0); \ 4008 IEM_MC_ARG(PCRTUINT128U, puSrc1, 1); \ 4009 IEM_MC_ARG(PCRTUINT128U, puSrc2, 2); \ 4010 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 3); \ 4011 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); \ 4012 IEM_MC_PREPARE_AVX_USAGE(); \ 4013 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 4014 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 4015 IEM_MC_REF_XREG_U128_CONST(puSrc2, IEM_GET_MODRM_RM(pVCpu, bRm)); \ 4016 IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_ ## a_Instr ## _u128, \ 4017 iemAImpl_ ## a_Instr ## _u128_fallback), puDst, puSrc1, puSrc2, bEvilArg); \ 4018 IEM_MC_CLEAR_YREG_128_UP( IEM_GET_MODRM_REG(pVCpu, bRm)); \ 4019 IEM_MC_ADVANCE_RIP(); \ 4020 IEM_MC_END(); \ 4021 } \ 4022 } \ 4023 else \ 4024 { \ 4025 /* \ 4026 * Register, memory. \ 4027 */ \ 4028 if (pVCpu->iem.s.uVexLength) \ 4029 { \ 4030 IEM_MC_BEGIN(4, 4); \ 4031 IEM_MC_LOCAL(RTUINT256U, uDst); \ 4032 IEM_MC_LOCAL(RTUINT256U, uSrc1); \ 4033 IEM_MC_LOCAL(RTUINT256U, uSrc2); \ 4034 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); \ 4035 IEM_MC_ARG_LOCAL_REF(PRTUINT256U, puDst, uDst, 0); \ 4036 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc1, uSrc1, 1); \ 4037 IEM_MC_ARG_LOCAL_REF(PCRTUINT256U, puSrc2, uSrc2, 2); \ 4038 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 4039 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); \ 4040 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 3); \ 4041 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx2); \ 4042 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); \ 4043 IEM_MC_PREPARE_AVX_USAGE(); \ 4044 IEM_MC_FETCH_MEM_U256_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 4045 IEM_MC_FETCH_YREG_U256(uSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 4046 IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_ ## a_Instr ## _u256, \ 4047 iemAImpl_ ## a_Instr ## _u256_fallback), puDst, puSrc1, puSrc2, bEvilArg); \ 4048 IEM_MC_STORE_YREG_U256_ZX_VLMAX( IEM_GET_MODRM_REG(pVCpu, bRm), uDst); \ 4049 IEM_MC_ADVANCE_RIP(); \ 4050 IEM_MC_END(); \ 4051 } \ 4052 else \ 4053 { \ 4054 IEM_MC_BEGIN(4, 2); \ 4055 IEM_MC_LOCAL(RTUINT128U, uSrc2); \ 4056 IEM_MC_LOCAL(RTGCPTR, GCPtrEffSrc); \ 4057 IEM_MC_ARG(PRTUINT128U, puDst, 0); \ 4058 IEM_MC_ARG(PCRTUINT128U, puSrc1, 1); \ 4059 IEM_MC_ARG_LOCAL_REF(PCRTUINT128U, puSrc2, uSrc2, 2); \ 4060 IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 0); \ 4061 uint8_t bEvil; IEM_OPCODE_GET_NEXT_U8(&bEvil); \ 4062 IEM_MC_ARG_CONST(uint8_t, bEvilArg, /*=*/ bEvil, 3); \ 4063 IEMOP_HLP_DONE_VEX_DECODING_EX(fAvx); \ 4064 IEM_MC_MAYBE_RAISE_AVX2_RELATED_XCPT(); \ 4065 IEM_MC_PREPARE_AVX_USAGE(); \ 4066 IEM_MC_FETCH_MEM_U128_NO_AC(uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc); \ 4067 IEM_MC_REF_XREG_U128(puDst, IEM_GET_MODRM_REG(pVCpu, bRm)); \ 4068 IEM_MC_REF_XREG_U128_CONST(puSrc1, IEM_GET_EFFECTIVE_VVVV(pVCpu)); \ 4069 IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fAvx2, iemAImpl_ ## a_Instr ## _u128, \ 4070 iemAImpl_ ## a_Instr ## _u128_fallback), puDst, puSrc1, puSrc2, bEvilArg); \ 4071 IEM_MC_CLEAR_YREG_128_UP( IEM_GET_MODRM_REG(pVCpu, bRm)); \ 4072 IEM_MC_ADVANCE_RIP(); \ 4073 IEM_MC_END(); \ 4074 } \ 4075 } \ 4076 return VINF_SUCCESS; 4077 3972 4078 /** Opcode VEX.0F 0xc6 - vshufps Vps,Hps,Wps,Ib */ 3973 FNIEMOP_STUB(iemOp_vshufps_Vps_Hps_Wps_Ib); 4079 FNIEMOP_DEF(iemOp_vshufps_Vps_Hps_Wps_Ib) 4080 { 4081 IEMOP_MNEMONIC4(VEX_RMI, VSHUFPS, vshufps, Vpd, Hpd, Wpd, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_AVX, IEMOPHINT_SKIP_PYTHON); /** @todo */ 4082 VSHUFP_X(vshufps); 4083 } 4084 4085 3974 4086 /** Opcode VEX.66.0F 0xc6 - vshufpd Vpd,Hpd,Wpd,Ib */ 3975 FNIEMOP_STUB(iemOp_vshufpd_Vpd_Hpd_Wpd_Ib); 4087 FNIEMOP_DEF(iemOp_vshufpd_Vpd_Hpd_Wpd_Ib) 4088 { 4089 IEMOP_MNEMONIC4(VEX_RMI, VSHUFPD, vshufpd, Vpd, Hpd, Wpd, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_AVX, IEMOPHINT_SKIP_PYTHON); /** @todo */ 4090 VSHUFP_X(vshufpd); 4091 } 4092 #undef VSHUFP_X 4093 4094 3976 4095 /* Opcode VEX.F3.0F 0xc6 - invalid */ 3977 4096 /* Opcode VEX.F2.0F 0xc6 - invalid */ -
trunk/src/VBox/VMM/include/IEMInternal.h
r96394 r96403 2150 2150 IEM_DECL_IMPL_DEF(void, iemAImpl_vpmovzxdq_u256_fallback,(PRTUINT256U puDst, PCRTUINT128U puSrc)); 2151 2151 2152 IEM_DECL_IMPL_DEF(void, iemAImpl_shufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil)); 2153 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil)); 2154 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil)); 2155 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil)); 2156 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufpd_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil)); 2157 2158 IEM_DECL_IMPL_DEF(void, iemAImpl_shufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc, uint8_t bEvil)); 2159 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil)); 2160 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc1, PCRTUINT128U puSrc2, uint8_t bEvil)); 2161 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil)); 2162 IEM_DECL_IMPL_DEF(void, iemAImpl_vshufps_u256_fallback,(PRTUINT256U puDst, PCRTUINT256U puSrc1, PCRTUINT256U puSrc2, uint8_t bEvil)); 2152 2163 /** @} */ 2153 2164 -
trunk/src/VBox/VMM/testcase/tstIEMCheckMc.cpp
r96394 r96403 483 483 #define iemAImpl_addsubpd_u128 NULL 484 484 #define iemAImpl_cvtpd2ps_u128 NULL 485 #define iemAImpl_shufpd_u128 NULL 486 #define iemAImpl_shufps_u128 NULL 485 487 486 488 #define iemAImpl_addss_u128_r32 NULL
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