Changeset 96538 in vbox for trunk/src/VBox/ValidationKit/bootsectors
- Timestamp:
- Aug 27, 2022 2:33:52 PM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 153404
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 2 edited
-
bs3-cpu-instr-3-template.mac (modified) (1 diff)
-
bs3-cpu-instr-3.c32 (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac
r96534 r96538 2730 2730 %endif 2731 2731 2732 ; 2733 ; [V]PBLENDW 2734 ; 2735 EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, XMM2, 0FFh 2736 EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, FSxBX, 0FFh 2737 EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, XMM2, 000h 2738 EMIT_INSTR_PLUS_ICEBP pblendw, XMM1, FSxBX, 000h 2739 2740 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, XMM3, 0FFh 2741 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, FSxBX, 0FFh 2742 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, XMM3, 000h 2743 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM1, XMM2, FSxBX, 000h 2744 2745 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, YMM3, 0FFh 2746 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, FSxBX, 0FFh 2747 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, YMM3, 000h 2748 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM1, YMM2, FSxBX, 000h 2749 2750 %if TMPL_BITS == 64 2751 EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, XMM9, 0FFh 2752 EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, FSxBX, 0FFh 2753 EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, XMM9, 000h 2754 EMIT_INSTR_PLUS_ICEBP pblendw, XMM8, FSxBX, 000h 2755 2756 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, XMM10, 0FFh 2757 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, FSxBX, 0FFh 2758 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, XMM10, 000h 2759 EMIT_INSTR_PLUS_ICEBP vpblendw, XMM8, XMM9, FSxBX, 000h 2760 2761 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, YMM10, 0FFh 2762 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, FSxBX, 0FFh 2763 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, YMM10, 000h 2764 EMIT_INSTR_PLUS_ICEBP vpblendw, YMM8, YMM9, FSxBX, 000h 2765 %endif 2766 2767 ; 2768 ; [V]BLENDPS 2769 ; 2770 EMIT_INSTR_PLUS_ICEBP blendps, XMM1, XMM2, 0FFh 2771 EMIT_INSTR_PLUS_ICEBP blendps, XMM1, FSxBX, 0FFh 2772 EMIT_INSTR_PLUS_ICEBP blendps, XMM1, XMM2, 000h 2773 EMIT_INSTR_PLUS_ICEBP blendps, XMM1, FSxBX, 000h 2774 2775 EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, XMM3, 0FFh 2776 EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, FSxBX, 0FFh 2777 EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, XMM3, 000h 2778 EMIT_INSTR_PLUS_ICEBP vblendps, XMM1, XMM2, FSxBX, 000h 2779 2780 EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, YMM3, 0FFh 2781 EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, FSxBX, 0FFh 2782 EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, YMM3, 000h 2783 EMIT_INSTR_PLUS_ICEBP vblendps, YMM1, YMM2, FSxBX, 000h 2784 2785 %if TMPL_BITS == 64 2786 EMIT_INSTR_PLUS_ICEBP blendps, XMM8, XMM9, 0FFh 2787 EMIT_INSTR_PLUS_ICEBP blendps, XMM8, FSxBX, 0FFh 2788 EMIT_INSTR_PLUS_ICEBP blendps, XMM8, XMM9, 000h 2789 EMIT_INSTR_PLUS_ICEBP blendps, XMM8, FSxBX, 000h 2790 2791 EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, XMM10, 0FFh 2792 EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, FSxBX, 0FFh 2793 EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, XMM10, 000h 2794 EMIT_INSTR_PLUS_ICEBP vblendps, XMM8, XMM9, FSxBX, 000h 2795 2796 EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, YMM10, 0FFh 2797 EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, FSxBX, 0FFh 2798 EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, YMM10, 000h 2799 EMIT_INSTR_PLUS_ICEBP vblendps, YMM8, YMM9, FSxBX, 000h 2800 %endif 2801 2802 ; 2803 ; [V]BLENDPD 2804 ; 2805 EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, XMM2, 0FFh 2806 EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, FSxBX, 0FFh 2807 EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, XMM2, 000h 2808 EMIT_INSTR_PLUS_ICEBP blendpd, XMM1, FSxBX, 000h 2809 2810 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, XMM3, 0FFh 2811 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, FSxBX, 0FFh 2812 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, XMM3, 000h 2813 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM1, XMM2, FSxBX, 000h 2814 2815 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, YMM3, 0FFh 2816 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, FSxBX, 0FFh 2817 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, YMM3, 000h 2818 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM1, YMM2, FSxBX, 000h 2819 2820 %if TMPL_BITS == 64 2821 EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, XMM9, 0FFh 2822 EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, FSxBX, 0FFh 2823 EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, XMM9, 000h 2824 EMIT_INSTR_PLUS_ICEBP blendpd, XMM8, FSxBX, 000h 2825 2826 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, XMM10, 0FFh 2827 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, FSxBX, 0FFh 2828 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, XMM10, 000h 2829 EMIT_INSTR_PLUS_ICEBP vblendpd, XMM8, XMM9, FSxBX, 000h 2830 2831 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, YMM10, 0FFh 2832 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, FSxBX, 0FFh 2833 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, YMM10, 000h 2834 EMIT_INSTR_PLUS_ICEBP vblendpd, YMM8, YMM9, FSxBX, 000h 2835 %endif 2836 2837 2732 2838 %endif ; BS3_INSTANTIATING_CMN 2733 2839 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32
r96534 r96538 7009 7009 { bs3CpuInstr3_vpalignr_YMM8_YMM9_YMM10_013h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues256B_13), s_aValues256B_13 }, 7010 7010 { bs3CpuInstr3_vpalignr_YMM8_YMM9_FSxBX_013h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues256B_13), s_aValues256B_13 }, 7011 }; 7012 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 7013 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 7014 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 7015 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 7016 } 7017 7018 7019 /* 7020 * [V]PBLENDW - Blend packed words based on an 8-bit immediate. 7021 */ 7022 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pblendw_XMM1_XMM2_0FFh_icebp); 7023 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pblendw_XMM1_FSxBX_0FFh_icebp); 7024 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pblendw_XMM1_XMM2_000h_icebp); 7025 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pblendw_XMM1_FSxBX_000h_icebp); 7026 extern FNBS3FAR bs3CpuInstr3_pblendw_XMM8_XMM9_0FFh_icebp_c64; 7027 extern FNBS3FAR bs3CpuInstr3_pblendw_XMM8_FSxBX_0FFh_icebp_c64; 7028 extern FNBS3FAR bs3CpuInstr3_pblendw_XMM8_XMM9_000h_icebp_c64; 7029 extern FNBS3FAR bs3CpuInstr3_pblendw_XMM8_FSxBX_000h_icebp_c64; 7030 7031 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_0FFh_icebp); 7032 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_0FFh_icebp); 7033 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_000h_icebp); 7034 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_000h_icebp); 7035 extern FNBS3FAR bs3CpuInstr3_vpblendw_XMM8_XMM9_XMM10_0FFh_icebp_c64; 7036 extern FNBS3FAR bs3CpuInstr3_vpblendw_XMM8_XMM9_FSxBX_0FFh_icebp_c64; 7037 extern FNBS3FAR bs3CpuInstr3_vpblendw_XMM8_XMM9_XMM10_000h_icebp_c64; 7038 extern FNBS3FAR bs3CpuInstr3_vpblendw_XMM8_XMM9_FSxBX_000h_icebp_c64; 7039 7040 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_0FFh_icebp); 7041 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_0FFh_icebp); 7042 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_000h_icebp); 7043 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_000h_icebp); 7044 extern FNBS3FAR bs3CpuInstr3_vpblendw_YMM8_YMM9_YMM10_0FFh_icebp_c64; 7045 extern FNBS3FAR bs3CpuInstr3_vpblendw_YMM8_YMM9_FSxBX_0FFh_icebp_c64; 7046 extern FNBS3FAR bs3CpuInstr3_vpblendw_YMM8_YMM9_YMM10_000h_icebp_c64; 7047 extern FNBS3FAR bs3CpuInstr3_vpblendw_YMM8_YMM9_FSxBX_000h_icebp_c64; 7048 7049 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_pblendw(uint8_t bMode) 7050 { 7051 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesFF[] = 7052 { 7053 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7054 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7055 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7056 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7057 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7058 /* => */ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8) }, 7059 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7060 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7061 /* => */ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb) }, 7062 }; 7063 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] = 7064 { 7065 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7066 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7067 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7068 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7069 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7070 /* => */ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788) }, 7071 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7072 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7073 /* => */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd) }, 7074 }; 7075 7076 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 7077 { 7078 { bs3CpuInstr3_pblendw_XMM1_XMM2_0FFh_icebp_c16, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7079 { bs3CpuInstr3_pblendw_XMM1_FSxBX_0FFh_icebp_c16, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7080 { bs3CpuInstr3_pblendw_XMM1_XMM2_000h_icebp_c16, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7081 { bs3CpuInstr3_pblendw_XMM1_FSxBX_000h_icebp_c16, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7082 7083 { bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_0FFh_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7084 { bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7085 { bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_0FFh_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7086 { bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7087 7088 { bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_000h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7089 { bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7090 { bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_000h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7091 { bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7092 }; 7093 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 7094 { 7095 { bs3CpuInstr3_pblendw_XMM1_XMM2_0FFh_icebp_c32, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7096 { bs3CpuInstr3_pblendw_XMM1_FSxBX_0FFh_icebp_c32, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7097 { bs3CpuInstr3_pblendw_XMM1_XMM2_000h_icebp_c32, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7098 { bs3CpuInstr3_pblendw_XMM1_FSxBX_000h_icebp_c32, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7099 7100 { bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_0FFh_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7101 { bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7102 { bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_0FFh_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7103 { bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7104 7105 { bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_000h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7106 { bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7107 { bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_000h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7108 { bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7109 }; 7110 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 7111 { 7112 { bs3CpuInstr3_pblendw_XMM1_XMM2_0FFh_icebp_c64, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7113 { bs3CpuInstr3_pblendw_XMM1_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7114 { bs3CpuInstr3_pblendw_XMM8_XMM9_0FFh_icebp_c64, 255, RM_REG, T_SSE4_1, 8, 8, 9, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7115 { bs3CpuInstr3_pblendw_XMM8_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_SSE4_1, 8, 8, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7116 7117 { bs3CpuInstr3_pblendw_XMM1_XMM2_000h_icebp_c64, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7118 { bs3CpuInstr3_pblendw_XMM1_FSxBX_000h_icebp_c64, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7119 { bs3CpuInstr3_pblendw_XMM8_XMM9_000h_icebp_c64, 255, RM_REG, T_SSE4_1, 8, 8, 9, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7120 { bs3CpuInstr3_pblendw_XMM8_FSxBX_000h_icebp_c64, 255, RM_MEM, T_SSE4_1, 8, 8, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7121 7122 { bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_0FFh_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7123 { bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7124 { bs3CpuInstr3_vpblendw_XMM8_XMM9_XMM10_0FFh_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7125 { bs3CpuInstr3_vpblendw_XMM8_XMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7126 { bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_0FFh_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7127 { bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7128 { bs3CpuInstr3_vpblendw_YMM8_YMM9_YMM10_0FFh_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7129 { bs3CpuInstr3_vpblendw_YMM8_YMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7130 7131 { bs3CpuInstr3_vpblendw_XMM1_XMM2_XMM3_000h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7132 { bs3CpuInstr3_vpblendw_XMM1_XMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7133 { bs3CpuInstr3_vpblendw_XMM8_XMM9_XMM10_000h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7134 { bs3CpuInstr3_vpblendw_XMM8_XMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7135 { bs3CpuInstr3_vpblendw_YMM1_YMM2_YMM3_000h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7136 { bs3CpuInstr3_vpblendw_YMM1_YMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7137 { bs3CpuInstr3_vpblendw_YMM8_YMM9_YMM10_000h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7138 { bs3CpuInstr3_vpblendw_YMM8_YMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7139 }; 7140 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 7141 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 7142 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 7143 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 7144 } 7145 7146 7147 /* 7148 * [V]BLENDPS - Blend packed single precision floating point values based on an 8-bit immediate. 7149 */ 7150 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendps_XMM1_XMM2_0FFh_icebp); 7151 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendps_XMM1_FSxBX_0FFh_icebp); 7152 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendps_XMM1_XMM2_000h_icebp); 7153 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendps_XMM1_FSxBX_000h_icebp); 7154 extern FNBS3FAR bs3CpuInstr3_blendps_XMM8_XMM9_0FFh_icebp_c64; 7155 extern FNBS3FAR bs3CpuInstr3_blendps_XMM8_FSxBX_0FFh_icebp_c64; 7156 extern FNBS3FAR bs3CpuInstr3_blendps_XMM8_XMM9_000h_icebp_c64; 7157 extern FNBS3FAR bs3CpuInstr3_blendps_XMM8_FSxBX_000h_icebp_c64; 7158 7159 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_0FFh_icebp); 7160 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_0FFh_icebp); 7161 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_000h_icebp); 7162 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_000h_icebp); 7163 extern FNBS3FAR bs3CpuInstr3_vblendps_XMM8_XMM9_XMM10_0FFh_icebp_c64; 7164 extern FNBS3FAR bs3CpuInstr3_vblendps_XMM8_XMM9_FSxBX_0FFh_icebp_c64; 7165 extern FNBS3FAR bs3CpuInstr3_vblendps_XMM8_XMM9_XMM10_000h_icebp_c64; 7166 extern FNBS3FAR bs3CpuInstr3_vblendps_XMM8_XMM9_FSxBX_000h_icebp_c64; 7167 7168 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_0FFh_icebp); 7169 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_0FFh_icebp); 7170 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_000h_icebp); 7171 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_000h_icebp); 7172 extern FNBS3FAR bs3CpuInstr3_vblendps_YMM8_YMM9_YMM10_0FFh_icebp_c64; 7173 extern FNBS3FAR bs3CpuInstr3_vblendps_YMM8_YMM9_FSxBX_0FFh_icebp_c64; 7174 extern FNBS3FAR bs3CpuInstr3_vblendps_YMM8_YMM9_YMM10_000h_icebp_c64; 7175 extern FNBS3FAR bs3CpuInstr3_vblendps_YMM8_YMM9_FSxBX_000h_icebp_c64; 7176 7177 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_blendps(uint8_t bMode) 7178 { 7179 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesFF[] = 7180 { 7181 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7182 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7183 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7184 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7185 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7186 /* => */ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8) }, 7187 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7188 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7189 /* => */ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb) }, 7190 }; 7191 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] = 7192 { 7193 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7194 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7195 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7196 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7197 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7198 /* => */ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788) }, 7199 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7200 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7201 /* => */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd) }, 7202 }; 7203 7204 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 7205 { 7206 { bs3CpuInstr3_blendps_XMM1_XMM2_0FFh_icebp_c16, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7207 { bs3CpuInstr3_blendps_XMM1_FSxBX_0FFh_icebp_c16, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7208 { bs3CpuInstr3_blendps_XMM1_XMM2_000h_icebp_c16, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7209 { bs3CpuInstr3_blendps_XMM1_FSxBX_000h_icebp_c16, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7210 7211 { bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_0FFh_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7212 { bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7213 { bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_0FFh_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7214 { bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7215 7216 { bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_000h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7217 { bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7218 { bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_000h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7219 { bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7220 }; 7221 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 7222 { 7223 { bs3CpuInstr3_blendps_XMM1_XMM2_0FFh_icebp_c32, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7224 { bs3CpuInstr3_blendps_XMM1_FSxBX_0FFh_icebp_c32, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7225 { bs3CpuInstr3_blendps_XMM1_XMM2_000h_icebp_c32, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7226 { bs3CpuInstr3_blendps_XMM1_FSxBX_000h_icebp_c32, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7227 7228 { bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_0FFh_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7229 { bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7230 { bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_0FFh_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7231 { bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7232 7233 { bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_000h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7234 { bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7235 { bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_000h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7236 { bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7237 }; 7238 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 7239 { 7240 { bs3CpuInstr3_blendps_XMM1_XMM2_0FFh_icebp_c64, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7241 { bs3CpuInstr3_blendps_XMM1_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7242 { bs3CpuInstr3_blendps_XMM8_XMM9_0FFh_icebp_c64, 255, RM_REG, T_SSE4_1, 8, 8, 9, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7243 { bs3CpuInstr3_blendps_XMM8_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_SSE4_1, 8, 8, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7244 7245 { bs3CpuInstr3_blendps_XMM1_XMM2_000h_icebp_c64, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7246 { bs3CpuInstr3_blendps_XMM1_FSxBX_000h_icebp_c64, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7247 { bs3CpuInstr3_blendps_XMM8_XMM9_000h_icebp_c64, 255, RM_REG, T_SSE4_1, 8, 8, 9, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7248 { bs3CpuInstr3_blendps_XMM8_FSxBX_000h_icebp_c64, 255, RM_MEM, T_SSE4_1, 8, 8, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7249 7250 { bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_0FFh_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7251 { bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7252 { bs3CpuInstr3_vblendps_XMM8_XMM9_XMM10_0FFh_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7253 { bs3CpuInstr3_vblendps_XMM8_XMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7254 { bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_0FFh_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7255 { bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7256 { bs3CpuInstr3_vblendps_YMM8_YMM9_YMM10_0FFh_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7257 { bs3CpuInstr3_vblendps_YMM8_YMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7258 7259 { bs3CpuInstr3_vblendps_XMM1_XMM2_XMM3_000h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7260 { bs3CpuInstr3_vblendps_XMM1_XMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7261 { bs3CpuInstr3_vblendps_XMM8_XMM9_XMM10_000h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7262 { bs3CpuInstr3_vblendps_XMM8_XMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7263 { bs3CpuInstr3_vblendps_YMM1_YMM2_YMM3_000h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7264 { bs3CpuInstr3_vblendps_YMM1_YMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7265 { bs3CpuInstr3_vblendps_YMM8_YMM9_YMM10_000h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7266 { bs3CpuInstr3_vblendps_YMM8_YMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7267 }; 7268 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); 7269 unsigned const iTest = BS3CPUINSTR3_TEST_MODES_INDEX(bMode); 7270 return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests, 7271 g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4)); 7272 } 7273 7274 7275 /* 7276 * [V]BLENDPD - Blend packed double precision floating point values based on an 8-bit immediate. 7277 */ 7278 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendpd_XMM1_XMM2_0FFh_icebp); 7279 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendpd_XMM1_FSxBX_0FFh_icebp); 7280 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendpd_XMM1_XMM2_000h_icebp); 7281 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_blendpd_XMM1_FSxBX_000h_icebp); 7282 extern FNBS3FAR bs3CpuInstr3_blendpd_XMM8_XMM9_0FFh_icebp_c64; 7283 extern FNBS3FAR bs3CpuInstr3_blendpd_XMM8_FSxBX_0FFh_icebp_c64; 7284 extern FNBS3FAR bs3CpuInstr3_blendpd_XMM8_XMM9_000h_icebp_c64; 7285 extern FNBS3FAR bs3CpuInstr3_blendpd_XMM8_FSxBX_000h_icebp_c64; 7286 7287 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_0FFh_icebp); 7288 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_0FFh_icebp); 7289 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_000h_icebp); 7290 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_000h_icebp); 7291 extern FNBS3FAR bs3CpuInstr3_vblendpd_XMM8_XMM9_XMM10_0FFh_icebp_c64; 7292 extern FNBS3FAR bs3CpuInstr3_vblendpd_XMM8_XMM9_FSxBX_0FFh_icebp_c64; 7293 extern FNBS3FAR bs3CpuInstr3_vblendpd_XMM8_XMM9_XMM10_000h_icebp_c64; 7294 extern FNBS3FAR bs3CpuInstr3_vblendpd_XMM8_XMM9_FSxBX_000h_icebp_c64; 7295 7296 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_0FFh_icebp); 7297 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_0FFh_icebp); 7298 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_000h_icebp); 7299 BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_000h_icebp); 7300 extern FNBS3FAR bs3CpuInstr3_vblendpd_YMM8_YMM9_YMM10_0FFh_icebp_c64; 7301 extern FNBS3FAR bs3CpuInstr3_vblendpd_YMM8_YMM9_FSxBX_0FFh_icebp_c64; 7302 extern FNBS3FAR bs3CpuInstr3_vblendpd_YMM8_YMM9_YMM10_000h_icebp_c64; 7303 extern FNBS3FAR bs3CpuInstr3_vblendpd_YMM8_YMM9_FSxBX_000h_icebp_c64; 7304 7305 BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_blendpd(uint8_t bMode) 7306 { 7307 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesFF[] = 7308 { 7309 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7310 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7311 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7312 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7313 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7314 /* => */ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8) }, 7315 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7316 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7317 /* => */ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb) }, 7318 }; 7319 static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] = 7320 { 7321 { /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0), 7322 /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0), 7323 /* => */ RTUINT256_INIT_C(0, 0, 0, 0) }, 7324 { /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8), 7325 /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788), 7326 /* => */ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788) }, 7327 { /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb), 7328 /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd), 7329 /* => */ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd) }, 7330 }; 7331 7332 static BS3CPUINSTR3_TEST1_T const s_aTests16[] = 7333 { 7334 { bs3CpuInstr3_blendpd_XMM1_XMM2_0FFh_icebp_c16, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7335 { bs3CpuInstr3_blendpd_XMM1_FSxBX_0FFh_icebp_c16, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7336 { bs3CpuInstr3_blendpd_XMM1_XMM2_000h_icebp_c16, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7337 { bs3CpuInstr3_blendpd_XMM1_FSxBX_000h_icebp_c16, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7338 7339 { bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_0FFh_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7340 { bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7341 { bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_0FFh_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7342 { bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7343 7344 { bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_000h_icebp_c16, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7345 { bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7346 { bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_000h_icebp_c16, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7347 { bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7348 }; 7349 static BS3CPUINSTR3_TEST1_T const s_aTests32[] = 7350 { 7351 { bs3CpuInstr3_blendpd_XMM1_XMM2_0FFh_icebp_c32, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7352 { bs3CpuInstr3_blendpd_XMM1_FSxBX_0FFh_icebp_c32, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7353 { bs3CpuInstr3_blendpd_XMM1_XMM2_000h_icebp_c32, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7354 { bs3CpuInstr3_blendpd_XMM1_FSxBX_000h_icebp_c32, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7355 7356 { bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_0FFh_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7357 { bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7358 { bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_0FFh_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7359 { bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7360 7361 { bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_000h_icebp_c32, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7362 { bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7363 { bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_000h_icebp_c32, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7364 { bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7365 }; 7366 static BS3CPUINSTR3_TEST1_T const s_aTests64[] = 7367 { 7368 { bs3CpuInstr3_blendpd_XMM1_XMM2_0FFh_icebp_c64, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7369 { bs3CpuInstr3_blendpd_XMM1_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7370 { bs3CpuInstr3_blendpd_XMM8_XMM9_0FFh_icebp_c64, 255, RM_REG, T_SSE4_1, 8, 8, 9, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7371 { bs3CpuInstr3_blendpd_XMM8_FSxBX_0FFh_icebp_c64, 255, RM_MEM, T_SSE4_1, 8, 8, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7372 7373 { bs3CpuInstr3_blendpd_XMM1_XMM2_000h_icebp_c64, 255, RM_REG, T_SSE4_1, 1, 1, 2, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7374 { bs3CpuInstr3_blendpd_XMM1_FSxBX_000h_icebp_c64, 255, RM_MEM, T_SSE4_1, 1, 1, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7375 { bs3CpuInstr3_blendpd_XMM8_XMM9_000h_icebp_c64, 255, RM_REG, T_SSE4_1, 8, 8, 9, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7376 { bs3CpuInstr3_blendpd_XMM8_FSxBX_000h_icebp_c64, 255, RM_MEM, T_SSE4_1, 8, 8, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7377 7378 { bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_0FFh_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7379 { bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7380 { bs3CpuInstr3_vblendpd_XMM8_XMM9_XMM10_0FFh_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7381 { bs3CpuInstr3_vblendpd_XMM8_XMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7382 { bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_0FFh_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7383 { bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7384 { bs3CpuInstr3_vblendpd_YMM8_YMM9_YMM10_0FFh_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7385 { bs3CpuInstr3_vblendpd_YMM8_YMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValuesFF), s_aValuesFF }, 7386 7387 { bs3CpuInstr3_vblendpd_XMM1_XMM2_XMM3_000h_icebp_c64, 255, RM_REG, T_AVX_128, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7388 { bs3CpuInstr3_vblendpd_XMM1_XMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7389 { bs3CpuInstr3_vblendpd_XMM8_XMM9_XMM10_000h_icebp_c64, 255, RM_REG, T_AVX_128, 8, 9, 10, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7390 { bs3CpuInstr3_vblendpd_XMM8_XMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128, 8, 9, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7391 { bs3CpuInstr3_vblendpd_YMM1_YMM2_YMM3_000h_icebp_c64, 255, RM_REG, T_AVX2_256, 1, 2, 3, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7392 { bs3CpuInstr3_vblendpd_YMM1_YMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 1, 2, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7393 { bs3CpuInstr3_vblendpd_YMM8_YMM9_YMM10_000h_icebp_c64, 255, RM_REG, T_AVX2_256, 8, 9, 10, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7394 { bs3CpuInstr3_vblendpd_YMM8_YMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256, 8, 9, 255, RT_ELEMENTS(s_aValues00), s_aValues00 }, 7011 7395 }; 7012 7396 static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64); … … 11045 11429 #endif 11046 11430 #if defined(ALL_TESTS) 11047 { "[v]palignr", bs3CpuInstr3_v_palignr, 0 } 11431 { "[v]palignr", bs3CpuInstr3_v_palignr, 0 }, 11432 #endif 11433 #if defined(ALL_TESTS) 11434 { "[v]pblendw", bs3CpuInstr3_v_pblendw, 0 }, 11435 { "[v]blendps", bs3CpuInstr3_v_blendps, 0 }, 11436 { "[v]blendpd", bs3CpuInstr3_v_blendpd, 0 }, 11048 11437 #endif 11049 11438 };
Note:
See TracChangeset
for help on using the changeset viewer.
