Changeset 9656 in vbox for trunk/src/VBox
- Timestamp:
- Jun 12, 2008 11:56:51 AM (17 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/DBGFDisas.cpp
r9421 r9656 103 103 int rc = DISCoreOneEx(GCPtr, 104 104 pSelInfo->Raw.Gen.u1DefBig 105 ? enmMode >= PGMMODE_AMD64 && pSelInfo->Raw.Gen.u1 Reserved105 ? enmMode >= PGMMODE_AMD64 && pSelInfo->Raw.Gen.u1Long 106 106 ? CPUMODE_64BIT 107 107 : CPUMODE_32BIT -
trunk/src/VBox/VMM/SELM.cpp
r9531 r9656 265 265 pDesc->Gen.u1Present = 1; 266 266 pDesc->Gen.u1Available = 0; 267 pDesc->Gen.u1 Reserved= 0;267 pDesc->Gen.u1Long = 0; 268 268 pDesc->Gen.u1DefBig = 1; /* def 32 bit */ 269 269 pDesc->Gen.u1Granularity = 1; /* 4KB limit */ … … 281 281 pDesc->Gen.u1Present = 1; 282 282 pDesc->Gen.u1Available = 0; 283 pDesc->Gen.u1 Reserved= 0;283 pDesc->Gen.u1Long = 0; 284 284 pDesc->Gen.u1DefBig = 1; /* big */ 285 285 pDesc->Gen.u1Granularity = 1; /* 4KB limit */ … … 297 297 pDesc->Gen.u1Present = 1; 298 298 pDesc->Gen.u1Available = 0; 299 pDesc->Gen.u1 Reserved= 1; /* The Long (L) attribute bit. */299 pDesc->Gen.u1Long = 1; /* The Long (L) attribute bit. */ 300 300 pDesc->Gen.u1DefBig = 0; /* With L=1 this must be 0. */ 301 301 pDesc->Gen.u1Granularity = 1; /* 4KB limit */ … … 316 316 pDesc->Gen.u1Present = 1; 317 317 pDesc->Gen.u1Available = 0; 318 pDesc->Gen.u1 Reserved= 0;318 pDesc->Gen.u1Long = 0; 319 319 pDesc->Gen.u1DefBig = 0; 320 320 pDesc->Gen.u1Granularity = 0; /* byte limit */ … … 335 335 pDesc->Gen.u1Present = 1; 336 336 pDesc->Gen.u1Available = 0; 337 pDesc->Gen.u1 Reserved= 0;337 pDesc->Gen.u1Long = 0; 338 338 pDesc->Gen.u1DefBig = 0; 339 339 pDesc->Gen.u1Granularity = 0; /* byte limit */ … … 1192 1192 pDesc->Gen.u8BaseHigh2 = RT_BYTE4(GCPtrShadowLDT); 1193 1193 pDesc->Gen.u1Available = 0; 1194 pDesc->Gen.u1 Reserved= 0;1194 pDesc->Gen.u1Long = 0; 1195 1195 if (cbLdt > 0xffff) 1196 1196 { -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r9651 r9656 2034 2034 uint64_t uTicks = TMCpuTickGet(pVM); 2035 2035 2036 /* Same behaviour in 32 & 64 bits mode */ 2036 2037 pRegFrame->eax = uTicks; 2037 2038 pRegFrame->edx = (uTicks >> 32ULL); -
trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
r9421 r9656 88 88 SELMDECL(RTGCPTR) SELMToFlat(PVM pVM, X86EFLAGS eflags, RTSEL Sel, CPUMSELREGHID *pHiddenSel, RTGCPTR Addr) 89 89 { 90 Assert(!CPUMIsGuestInLongMode(pVM)); /** @todo */ 90 91 Assert(pHiddenSel || !CPUMAreHiddenSelRegsValid(pVM)); 91 92 … … 131 132 SELMDECL(int) SELMToFlatEx(PVM pVM, X86EFLAGS eflags, RTSEL Sel, RTGCPTR Addr, CPUMSELREGHID *pHiddenSel, unsigned fFlags, PRTGCPTR ppvGC, uint32_t *pcb) 132 133 { 134 Assert(!CPUMIsGuestInLongMode(pVM)); /** @todo */ 133 135 /* 134 136 * Deal with real & v86 mode first. … … 450 452 ) 451 453 { 454 /* 64 bits mode: CS, DS, ES and SS are treated as if each segment base is 0 (Intel® 64 and IA-32 Architectures Software Developer's Manual: 3.4.2.1). */ 455 if ( CPUMIsGuestInLongMode(pVM) 456 && pHidCS->Attr.n.u1Long) 457 { 458 *ppvFlat = Addr; 459 return VINF_SUCCESS; 460 } 461 452 462 /* 453 463 * Limit check. Note that the limit in the hidden register is the 454 464 * final value. The granularity bit was included in its calculation. 455 465 */ 456 uint32_t 466 uint32_t u32Limit = pHidCS->u32Limit; 457 467 if ((RTGCUINTPTR)Addr <= u32Limit) 458 468 { … … 615 625 } 616 626 617 627 #ifndef IN_RING0 618 628 /** 619 629 * Gets ss:esp for ring1 in main Hypervisor's TSS. … … 690 700 return VINF_SUCCESS; 691 701 } 692 702 #endif 693 703 694 704 /** -
trunk/src/VBox/VMM/VMMTests.cpp
r9421 r9656 445 445 pHyperCtx->reg##Hid.Attr.n.u2Dpl = selInfo.Raw.Gen.u2Dpl; \ 446 446 pHyperCtx->reg##Hid.Attr.n.u1DescType = selInfo.Raw.Gen.u1DescType; \ 447 pHyperCtx->reg##Hid.Attr.n.u1 Reserved = selInfo.Raw.Gen.u1Reserved;\447 pHyperCtx->reg##Hid.Attr.n.u1Long = selInfo.Raw.Gen.u1Long; \ 448 448 } 449 449
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