- Timestamp:
- Sep 27, 2022 1:30:45 PM (2 years ago)
- svn:sync-xref-src-repo-rev:
- 153807
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/PGMAll.cpp
r96879 r96900 3449 3449 { 3450 3450 pVCpu->pgm.s.enmShadowMode = enmShadowMode; 3451 int rc = g_aPgmShadowModeData[idxNewShw].pfnEnter(pVCpu , enmGuestMode >= PGMMODE_AMD64);3451 int rc = g_aPgmShadowModeData[idxNewShw].pfnEnter(pVCpu); 3452 3452 AssertLogRelMsgRCReturnStmt(rc, ("Entering enmShadowMode=%s failed: %Rrc\n", PGMGetModeName(enmShadowMode), rc), 3453 3453 pVCpu->pgm.s.enmShadowMode = PGMMODE_INVALID, rc); -
trunk/src/VBox/VMM/VMMAll/PGMAllShw.h
r96879 r96900 215 215 PGM_SHW_DECL(int, GetPage)(PVMCPUCC pVCpu, RTGCUINTPTR GCPtr, uint64_t *pfFlags, PRTHCPHYS pHCPhys); 216 216 PGM_SHW_DECL(int, ModifyPage)(PVMCPUCC pVCpu, RTGCUINTPTR GCPtr, size_t cbPages, uint64_t fFlags, uint64_t fMask, uint32_t fOpFlags); 217 PGM_SHW_DECL(int, Enter)(PVMCPUCC pVCpu, bool fIs64BitsPagingMode);218 217 PGM_SHW_DECL(int, Exit)(PVMCPUCC pVCpu); 219 218 #ifdef IN_RING3 … … 228 227 * @returns VBox status code. 229 228 * @param pVCpu The cross context virtual CPU structure. 230 * @param fIs64BitsPagingMode New shadow paging mode is for 64 bits? (only relevant for 64 bits guests on a 32 bits AMD-V nested paging host)231 229 */ 232 PGM_SHW_DECL(int, Enter)(PVMCPUCC pVCpu , bool fIs64BitsPagingMode)230 PGM_SHW_DECL(int, Enter)(PVMCPUCC pVCpu) 233 231 { 234 232 #if PGM_TYPE_IS_NESTED_OR_EPT(PGM_SHW_TYPE) 235 233 236 # if PGM_TYPE_IS_NESTED(PGM_SHW_TYPE) && HC_ARCH_BITS == 32 237 /* Must distinguish between 32 and 64 bits guest paging modes as we'll use 238 a different shadow paging root/mode in both cases. */ 239 RTGCPHYS GCPhysCR3 = (fIs64BitsPagingMode) ? RT_BIT_64(63) : RT_BIT_64(62); 240 PGMPOOLKIND enmKind = PGMPOOLKIND_ROOT_NESTED; 241 # elif defined(VBOX_WITH_NESTED_HWVIRT_VMX_EPT) 234 # ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT 242 235 RTGCPHYS GCPhysCR3; 243 236 PGMPOOLKIND enmKind; 244 237 if (pVCpu->pgm.s.enmGuestSlatMode != PGMSLAT_EPT) 245 238 { 246 GCPhysCR3 = RT_BIT_64(63); NOREF(fIs64BitsPagingMode);239 GCPhysCR3 = RT_BIT_64(63); 247 240 enmKind = PGMPOOLKIND_ROOT_NESTED; 248 241 } … … 253 246 } 254 247 # else 255 RTGCPHYS GCPhysCR3 = RT_BIT_64(63); NOREF(fIs64BitsPagingMode); 256 PGMPOOLKIND const enmKind = PGMPOOLKIND_ROOT_NESTED; 257 # endif 258 PPGMPOOLPAGE pNewShwPageCR3; 259 PVMCC pVM = pVCpu->CTX_SUFF(pVM); 248 RTGCPHYS const GCPhysCR3 = RT_BIT_64(63); 249 PGMPOOLKIND const enmKind = PGMPOOLKIND_ROOT_NESTED; 250 # endif 251 PVMCC const pVM = pVCpu->CTX_SUFF(pVM); 260 252 261 253 Assert(HMIsNestedPagingActive(pVM)); … … 265 257 PGM_LOCK_VOID(pVM); 266 258 259 PPGMPOOLPAGE pNewShwPageCR3; 267 260 int rc = pgmPoolAlloc(pVM, GCPhysCR3, enmKind, PGMPOOLACCESS_DONTCARE, PGM_A20_IS_ENABLED(pVCpu), 268 261 NIL_PGMPOOL_IDX, UINT32_MAX, true /*fLockPage*/, … … 277 270 Log(("Enter nested shadow paging mode: root %RHv phys %RHp\n", pVCpu->pgm.s.pShwPageCR3R3, pVCpu->pgm.s.CTX_SUFF(pShwPageCR3)->Core.Key)); 278 271 #else 279 NOREF(pVCpu); NOREF(fIs64BitsPagingMode);272 NOREF(pVCpu); 280 273 #endif 281 274 return VINF_SUCCESS; -
trunk/src/VBox/VMM/include/PGMInternal.h
r96879 r96900 2746 2746 DECLCALLBACKMEMBER(int, pfnModifyPage,(PVMCPUCC pVCpu, RTGCPTR GCPtr, size_t cbPages, uint64_t fFlags, 2747 2747 uint64_t fMask, uint32_t fOpFlags)); 2748 DECLCALLBACKMEMBER(int, pfnEnter,(PVMCPUCC pVCpu , bool fIs64BitsPagingMode));2748 DECLCALLBACKMEMBER(int, pfnEnter,(PVMCPUCC pVCpu)); 2749 2749 DECLCALLBACKMEMBER(int, pfnExit,(PVMCPUCC pVCpu)); 2750 2750 #ifdef IN_RING3
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