Changeset 97060 in vbox
- Timestamp:
- Oct 9, 2022 10:20:19 PM (2 years ago)
- svn:sync-xref-src-repo-rev:
- 154009
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h
r97057 r97060 3235 3235 * 3236 3236 * @param pVCpu The cross context virtual CPU structure. 3237 * @ param iSegRegThe segment register number (X86_SREG_XXX).3237 * @tparam a_iSegReg The segment register number (X86_SREG_XXX). 3238 3238 * 3239 3239 * @remarks Called with interrupts and/or preemption disabled. 3240 3240 */ 3241 static void vmxHCImportGuestSegReg(PVMCPUCC pVCpu, uint32_t iSegReg) 3242 { 3243 Assert(iSegReg < X86_SREG_COUNT); 3244 Assert((uint32_t)VMX_VMCS16_GUEST_SEG_SEL(iSegReg) == g_aVmcsSegSel[iSegReg]); 3245 Assert((uint32_t)VMX_VMCS32_GUEST_SEG_LIMIT(iSegReg) == g_aVmcsSegLimit[iSegReg]); 3246 Assert((uint32_t)VMX_VMCS32_GUEST_SEG_ACCESS_RIGHTS(iSegReg) == g_aVmcsSegAttr[iSegReg]); 3247 Assert((uint32_t)VMX_VMCS_GUEST_SEG_BASE(iSegReg) == g_aVmcsSegBase[iSegReg]); 3248 3249 PCPUMSELREG pSelReg = &pVCpu->cpum.GstCtx.aSRegs[iSegReg]; 3241 template<uint32_t const a_iSegReg> 3242 DECLINLINE(void) vmxHCImportGuestSegReg(PVMCPUCC pVCpu) 3243 { 3244 AssertCompile(a_iSegReg < X86_SREG_COUNT); 3245 Assert((uint32_t)VMX_VMCS16_GUEST_SEG_SEL(a_iSegReg) == g_aVmcsSegSel[a_iSegReg]); 3246 Assert((uint32_t)VMX_VMCS32_GUEST_SEG_LIMIT(a_iSegReg) == g_aVmcsSegLimit[a_iSegReg]); 3247 Assert((uint32_t)VMX_VMCS32_GUEST_SEG_ACCESS_RIGHTS(a_iSegReg) == g_aVmcsSegAttr[a_iSegReg]); 3248 Assert((uint32_t)VMX_VMCS_GUEST_SEG_BASE(a_iSegReg) == g_aVmcsSegBase[a_iSegReg]); 3249 3250 PCPUMSELREG pSelReg = &pVCpu->cpum.GstCtx.aSRegs[a_iSegReg]; 3250 3251 3251 3252 uint16_t u16Sel; 3252 int rc = VMX_VMCS_READ_16(pVCpu, VMX_VMCS16_GUEST_SEG_SEL( iSegReg), &u16Sel); AssertRC(rc);3253 int rc = VMX_VMCS_READ_16(pVCpu, VMX_VMCS16_GUEST_SEG_SEL(a_iSegReg), &u16Sel); AssertRC(rc); 3253 3254 pSelReg->Sel = u16Sel; 3254 3255 pSelReg->ValidSel = u16Sel; 3255 3256 3256 rc = VMX_VMCS_READ_32(pVCpu, VMX_VMCS32_GUEST_SEG_LIMIT( iSegReg), &pSelReg->u32Limit); AssertRC(rc);3257 rc = VMX_VMCS_READ_NW(pVCpu, VMX_VMCS_GUEST_SEG_BASE( iSegReg), &pSelReg->u64Base); AssertRC(rc);3257 rc = VMX_VMCS_READ_32(pVCpu, VMX_VMCS32_GUEST_SEG_LIMIT(a_iSegReg), &pSelReg->u32Limit); AssertRC(rc); 3258 rc = VMX_VMCS_READ_NW(pVCpu, VMX_VMCS_GUEST_SEG_BASE(a_iSegReg), &pSelReg->u64Base); AssertRC(rc); 3258 3259 3259 3260 uint32_t u32Attr; 3260 rc = VMX_VMCS_READ_32(pVCpu, VMX_VMCS32_GUEST_SEG_ACCESS_RIGHTS( iSegReg), &u32Attr); AssertRC(rc);3261 rc = VMX_VMCS_READ_32(pVCpu, VMX_VMCS32_GUEST_SEG_ACCESS_RIGHTS(a_iSegReg), &u32Attr); AssertRC(rc); 3261 3262 pSelReg->Attr.u = u32Attr; 3262 3263 if (u32Attr & X86DESCATTR_UNUSABLE) 3263 vmxHCFixUnusableSegRegAttr(pVCpu, pSelReg, "ES\0CS\0SS\0DS\0FS\0GS" + iSegReg * 3);3264 vmxHCFixUnusableSegRegAttr(pVCpu, pSelReg, "ES\0CS\0SS\0DS\0FS\0GS" + a_iSegReg * 3); 3264 3265 3265 3266 pSelReg->fFlags = CPUMSELREG_FLAGS_VALID; … … 3302 3303 * @remarks Called with interrupts and/or preemption disabled. 3303 3304 */ 3304 static voidvmxHCImportGuestTr(PVMCPUCC pVCpu)3305 DECLINLINE(void) vmxHCImportGuestTr(PVMCPUCC pVCpu) 3305 3306 { 3306 3307 uint16_t u16Sel; … … 3332 3333 * instead!!! 3333 3334 */ 3334 static voidvmxHCImportGuestRip(PVMCPUCC pVCpu)3335 DECLINLINE(void) vmxHCImportGuestRip(PVMCPUCC pVCpu) 3335 3336 { 3336 3337 uint64_t u64Val; … … 3358 3359 * instead!!! 3359 3360 */ 3360 static voidvmxHCImportGuestRFlags(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)3361 DECLINLINE(void) vmxHCImportGuestRFlags(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo) 3361 3362 { 3362 3363 PCPUMCTX pCtx = &pVCpu->cpum.GstCtx; … … 3395 3396 * instead!!! 3396 3397 */ 3397 static voidvmxHCImportGuestIntrState(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo)3398 DECLINLINE(void) vmxHCImportGuestIntrState(PVMCPUCC pVCpu, PCVMXVMCSINFO pVmcsInfo) 3398 3399 { 3399 3400 uint32_t u32Val; … … 3495 3496 if (fWhat & CPUMCTX_EXTRN_CS) 3496 3497 { 3497 vmxHCImportGuestSegReg (pVCpu, X86_SREG_CS);3498 vmxHCImportGuestRip(pVCpu); 3498 vmxHCImportGuestSegReg<X86_SREG_CS>(pVCpu); 3499 vmxHCImportGuestRip(pVCpu); /** @todo WTF? */ 3499 3500 if (fRealOnV86Active) 3500 3501 pCtx->cs.Attr.u = pVmcsInfoShared->RealMode.AttrCS.u; … … 3503 3504 if (fWhat & CPUMCTX_EXTRN_SS) 3504 3505 { 3505 vmxHCImportGuestSegReg (pVCpu, X86_SREG_SS);3506 vmxHCImportGuestSegReg<X86_SREG_SS>(pVCpu); 3506 3507 if (fRealOnV86Active) 3507 3508 pCtx->ss.Attr.u = pVmcsInfoShared->RealMode.AttrSS.u; … … 3509 3510 if (fWhat & CPUMCTX_EXTRN_DS) 3510 3511 { 3511 vmxHCImportGuestSegReg (pVCpu, X86_SREG_DS);3512 vmxHCImportGuestSegReg<X86_SREG_DS>(pVCpu); 3512 3513 if (fRealOnV86Active) 3513 3514 pCtx->ds.Attr.u = pVmcsInfoShared->RealMode.AttrDS.u; … … 3515 3516 if (fWhat & CPUMCTX_EXTRN_ES) 3516 3517 { 3517 vmxHCImportGuestSegReg (pVCpu, X86_SREG_ES);3518 vmxHCImportGuestSegReg<X86_SREG_ES>(pVCpu); 3518 3519 if (fRealOnV86Active) 3519 3520 pCtx->es.Attr.u = pVmcsInfoShared->RealMode.AttrES.u; … … 3521 3522 if (fWhat & CPUMCTX_EXTRN_FS) 3522 3523 { 3523 vmxHCImportGuestSegReg (pVCpu, X86_SREG_FS);3524 vmxHCImportGuestSegReg<X86_SREG_FS>(pVCpu); 3524 3525 if (fRealOnV86Active) 3525 3526 pCtx->fs.Attr.u = pVmcsInfoShared->RealMode.AttrFS.u; … … 3527 3528 if (fWhat & CPUMCTX_EXTRN_GS) 3528 3529 { 3529 vmxHCImportGuestSegReg (pVCpu, X86_SREG_GS);3530 vmxHCImportGuestSegReg<X86_SREG_GS>(pVCpu); 3530 3531 if (fRealOnV86Active) 3531 3532 pCtx->gs.Attr.u = pVmcsInfoShared->RealMode.AttrGS.u; … … 8910 8911 | HMVMX_READ_GUEST_PHYSICAL_ADDR>(pVCpu, pVmxTransient); 8911 8912 vmxHCImportGuestRip(pVCpu); 8912 vmxHCImportGuestSegReg (pVCpu, X86_SREG_CS);8913 vmxHCImportGuestSegReg<X86_SREG_CS>(pVCpu; 8913 8914 8914 8915 /* -
trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
r97056 r97060 4498 4498 if (fWhat & CPUMCTX_EXTRN_CS) 4499 4499 { 4500 vmxHCImportGuestSegReg (pVCpu, X86_SREG_CS);4500 vmxHCImportGuestSegReg<X86_SREG_CS>(pVCpu); 4501 4501 vmxHCImportGuestRip(pVCpu); 4502 4502 if (fRealOnV86Active) … … 4506 4506 if (fWhat & CPUMCTX_EXTRN_SS) 4507 4507 { 4508 vmxHCImportGuestSegReg (pVCpu, X86_SREG_SS);4508 vmxHCImportGuestSegReg<X86_SREG_SS>(pVCpu); 4509 4509 if (fRealOnV86Active) 4510 4510 pCtx->ss.Attr.u = pVmcsInfoShared->RealMode.AttrSS.u; … … 4512 4512 if (fWhat & CPUMCTX_EXTRN_DS) 4513 4513 { 4514 vmxHCImportGuestSegReg (pVCpu, X86_SREG_DS);4514 vmxHCImportGuestSegReg<X86_SREG_DS>(pVCpu); 4515 4515 if (fRealOnV86Active) 4516 4516 pCtx->ds.Attr.u = pVmcsInfoShared->RealMode.AttrDS.u; … … 4518 4518 if (fWhat & CPUMCTX_EXTRN_ES) 4519 4519 { 4520 vmxHCImportGuestSegReg (pVCpu, X86_SREG_ES);4520 vmxHCImportGuestSegReg<X86_SREG_ES>(pVCpu); 4521 4521 if (fRealOnV86Active) 4522 4522 pCtx->es.Attr.u = pVmcsInfoShared->RealMode.AttrES.u; … … 4524 4524 if (fWhat & CPUMCTX_EXTRN_FS) 4525 4525 { 4526 vmxHCImportGuestSegReg (pVCpu, X86_SREG_FS);4526 vmxHCImportGuestSegReg<X86_SREG_FS>(pVCpu); 4527 4527 if (fRealOnV86Active) 4528 4528 pCtx->fs.Attr.u = pVmcsInfoShared->RealMode.AttrFS.u; … … 4530 4530 if (fWhat & CPUMCTX_EXTRN_GS) 4531 4531 { 4532 vmxHCImportGuestSegReg (pVCpu, X86_SREG_GS);4532 vmxHCImportGuestSegReg<X86_SREG_GS>(pVCpu); 4533 4533 if (fRealOnV86Active) 4534 4534 pCtx->gs.Attr.u = pVmcsInfoShared->RealMode.AttrGS.u;
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