Changeset 97183 in vbox for trunk/include/VBox

Timestamp:

Oct 17, 2022 10:27:05 PM (2 years ago)

Author:

vboxsync

Message:

VMM/CPUM,HMVMX,IEM: Use the individual CPUMCTX_INHIBIT_SHADOW_SS and CPUMCTX_INHIBIT_SHADOW_STI flags with IEM (only setting), VT-x and NEM/kvm. bugref:9941

File:

• trunk/include/VBox/vmm/cpum.h (modified) (5 diffs)

trunk/include/VBox/vmm/cpum.h

@@ -1939 +1939 @@
 
 /**
- * Checks if we're in an "interrupt shadow", i.e. after a STI, POPF or MOV SS,
+ * Checks if we're in an "interrupt shadow", i.e. after a STI, POP SS or MOV SS,
  * updating the state if stale.
  *
  * This also inhibit NMIs, except perhaps for nested guests.
  *
- * @returns true if interrupts are inhibited by interrupt shadow, false if not.
+ * @retval  true if interrupts are inhibited by interrupt shadow.
+ * @retval  false if not.
  * @param   pCtx    Current guest CPU context.
  * @note    Requires pCtx->rip to be up to date.
@@ -1962 +1963 @@
 
 /**
- * Sets the "interrupt shadow" flag, after a STI, POPF or MOV SS instruction.
+ * Checks if we're in an "interrupt shadow" due to a POP SS or MOV SS
+ * instruction.
+ *
+ * This also inhibit NMIs, except perhaps for nested guests.
+ *
+ * @retval  true if interrupts are inhibited due to POP/MOV SS.
+ * @retval  false if not.
+ * @param   pCtx    Current guest CPU context.
+ * @note    Requires pCtx->rip to be up to date.
+ * @note    Does not clear fInhibit when CPUMCTX::uRipInhibitInt differs
+ *          from CPUMCTX::rip.
+ * @note    Both CPUMIsInInterruptShadowAfterSti() and this function may return
+ *          true depending on the execution engine being used.
+ */
+DECLINLINE(bool) CPUMIsInInterruptShadowAfterSs(PCCPUMCTX pCtx)
+{
+    if (!(pCtx->fInhibit & CPUMCTX_INHIBIT_SHADOW_SS))
+        return false;
+
+    CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
+    return pCtx->uRipInhibitInt == pCtx->rip;
+}
+
+/**
+ * Checks if we're in an "interrupt shadow" due to an STI instruction.
+ *
+ * This also inhibit NMIs, except perhaps for nested guests.
+ *
+ * @retval  true if interrupts are inhibited due to STI.
+ * @retval  false if not.
+ * @param   pCtx    Current guest CPU context.
+ * @note    Requires pCtx->rip to be up to date.
+ * @note    Does not clear fInhibit when CPUMCTX::uRipInhibitInt differs
+ *          from CPUMCTX::rip.
+ * @note    Both CPUMIsInInterruptShadowAfterSs() and this function may return
+ *          true depending on the execution engine being used.
+ */
+DECLINLINE(bool) CPUMIsInInterruptShadowAfterSti(PCCPUMCTX pCtx)
+{
+    if (!(pCtx->fInhibit & CPUMCTX_INHIBIT_SHADOW_STI))
+        return false;
+
+    CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
+    return pCtx->uRipInhibitInt == pCtx->rip;
+}
+
+/**
+ * Sets the "interrupt shadow" flag, after a STI, POP SS or MOV SS instruction.
  *
  * @param   pCtx    Current guest CPU context.
@@ -1975 +2023 @@
 
 /**
- * Sets the "interrupt shadow" flag, after a STI, POPF or MOV SS instruction,
+ * Sets the "interrupt shadow" flag, after a STI, POP SS or MOV SS instruction,
  * extended version.
  *
@@ -1985 +2033 @@
     pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW;
     pCtx->uRipInhibitInt = rip;
+}
+
+/**
+ * Sets the "interrupt shadow" flag after a POP SS or MOV SS instruction.
+ *
+ * @param   pCtx    Current guest CPU context.
+ * @note    Requires pCtx->rip to be up to date.
+ */
+DECLINLINE(void) CPUMSetInInterruptShadowSs(PCPUMCTX pCtx)
+{
+    CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
+    pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW_SS;
+    pCtx->uRipInhibitInt = pCtx->rip;
+}
+
+/**
+ * Sets the "interrupt shadow" flag after an STI instruction.
+ *
+ * @param   pCtx    Current guest CPU context.
+ * @note    Requires pCtx->rip to be up to date.
+ */
+DECLINLINE(void) CPUMSetInInterruptShadowSti(PCPUMCTX pCtx)
+{
+    CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
+    pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW_STI;
+    pCtx->uRipInhibitInt = pCtx->rip;
 }
 
@@ -2034 +2108 @@
     }
     return fInhibited;
+}
+
+/**
+ * Update the two "interrupt shadow" flags separately, extended version.
+ *
+ * @param   pCtx            Current guest CPU context.
+ * @param   fInhibitedBySs  The new state for the MOV SS & POP SS aspect.
+ * @param   fInhibitedBySti The new state for the STI aspect.
+ * @param   rip             The RIP for which it is inhibited.
+ */
+DECLINLINE(void) CPUMUpdateInterruptShadowSsStiEx(PCPUMCTX pCtx, bool fInhibitedBySs, bool fInhibitedBySti, uint64_t rip)
+{
+    if (!(fInhibitedBySs | fInhibitedBySti))
+        pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_SHADOW;
+    else
+    {
+        pCtx->fInhibit |= (fInhibitedBySs  ? CPUMCTX_INHIBIT_SHADOW_SS  : 0)
+                       |  (fInhibitedBySti ? CPUMCTX_INHIBIT_SHADOW_STI : 0);
+        pCtx->uRipInhibitInt = rip;
+    }
 }