Changeset 97193 in vbox
- Timestamp:
- Oct 18, 2022 10:18:45 AM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 154168
- Location:
- trunk
- Files:
-
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/em.h
r97178 r97193 268 268 /** @name Deprecated interpretation related APIs (use IEM). 269 269 * @{ */ 270 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMC C pVM, PVMCPUCC pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr);271 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMC C pVM, PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore,270 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMCPUCC pVCpu, PDISCPUSTATE pCpu, unsigned *pcbInstr); 271 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, 272 272 PDISCPUSTATE pDISState, unsigned *pcbInstr); 273 273 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPUCC pVCpu, PCPUMCTXCORE pCoreCtx, RTGCPTR pvFault); -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r97178 r97193 901 901 * details. 902 902 * 903 * @param pVM The cross context VM structure.904 903 * @param pVCpu The cross context virtual CPU structure. 905 904 * @param pDis Where to return the parsed instruction info. 906 905 * @param pcbInstr Where to return the instruction size. (optional) 907 906 */ 908 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMC C pVM, PVMCPUCC pVCpu, PDISCPUSTATE pDis, unsigned *pcbInstr)909 { 910 PCPUMCTX CORE pCtxCore = CPUMCTX2CORE(CPUMQueryGuestCtxPtr(pVCpu));911 RTGCPTR GCPtrInstr;907 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMCPUCC pVCpu, PDISCPUSTATE pDis, unsigned *pcbInstr) 908 { 909 PCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu); 910 RTGCPTR GCPtrInstr; 912 911 #if 0 913 int rc = SELMToFlatEx(pVCpu, DISSELREG_CS, pCtx Core, pCtxCore->rip, 0, &GCPtrInstr);912 int rc = SELMToFlatEx(pVCpu, DISSELREG_CS, pCtx, pCtx->rip, 0, &GCPtrInstr); 914 913 #else 915 914 /** @todo Get the CPU mode as well while we're at it! */ 916 int rc = SELMValidateAndConvertCSAddr(pVCpu, pCtxCore->eflags, pCtxCore->ss.Sel, pCtxCore->cs.Sel, &pCtxCore->cs, 917 pCtxCore->rip, &GCPtrInstr); 915 int rc = SELMValidateAndConvertCSAddr(pVCpu, pCtx->eflags, pCtx->ss.Sel, pCtx->cs.Sel, &pCtx->cs, pCtx->rip, &GCPtrInstr); 918 916 #endif 919 if (RT_FAILURE(rc)) 920 { 921 Log(("EMInterpretDisasOne: Failed to convert %RTsel:%RGv (cpl=%d) - rc=%Rrc !!\n", 922 pCtxCore->cs.Sel, (RTGCPTR)pCtxCore->rip, pCtxCore->ss.Sel & X86_SEL_RPL, rc)); 923 return rc; 924 } 925 return EMInterpretDisasOneEx(pVM, pVCpu, (RTGCUINTPTR)GCPtrInstr, pCtxCore, pDis, pcbInstr); 917 if (RT_SUCCESS(rc)) 918 return EMInterpretDisasOneEx(pVCpu, (RTGCUINTPTR)GCPtrInstr, pDis, pcbInstr); 919 920 Log(("EMInterpretDisasOne: Failed to convert %RTsel:%RGv (cpl=%d) - rc=%Rrc !!\n", 921 pCtx->cs.Sel, (RTGCPTR)pCtx->rip, pCtx->ss.Sel & X86_SEL_RPL, rc)); 922 return rc; 926 923 } 927 924 … … 934 931 * @returns VBox status code. 935 932 * 936 * @param pVM The cross context VM structure.937 933 * @param pVCpu The cross context virtual CPU structure. 938 934 * @param GCPtrInstr The flat address of the instruction. 939 * @param pCtxCore The context core (used to determine the cpu mode).940 935 * @param pDis Where to return the parsed instruction info. 941 936 * @param pcbInstr Where to return the instruction size. (optional) 942 937 */ 943 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMCC pVM, PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, PCCPUMCTXCORE pCtxCore, 944 PDISCPUSTATE pDis, unsigned *pcbInstr) 945 { 946 NOREF(pVM); 947 Assert(pCtxCore == CPUMGetGuestCtxCore(pVCpu)); NOREF(pCtxCore); 938 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, PDISCPUSTATE pDis, unsigned *pcbInstr) 939 { 948 940 DISCPUMODE enmCpuMode = CPUMGetGuestDisMode(pVCpu); 949 941 /** @todo Deal with too long instruction (=> \#GP), opcode read errors (=> -
trunk/src/VBox/VMM/VMMAll/GIMAll.cpp
r96407 r97193 247 247 unsigned cbInstr; 248 248 DISCPUSTATE Dis; 249 int rc = EMInterpretDisasCurrent(pV M, pVCpu, &Dis, &cbInstr);249 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbInstr); 250 250 if (RT_SUCCESS(rc)) 251 251 { -
trunk/src/VBox/VMM/VMMAll/GIMAllHv.cpp
r96407 r97193 1479 1479 unsigned cbInstr; 1480 1480 DISCPUSTATE Dis; 1481 int rc = EMInterpretDisasCurrent(pVCpu ->CTX_SUFF(pVM), pVCpu, &Dis, &cbInstr);1481 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbInstr); 1482 1482 if (RT_SUCCESS(rc)) 1483 1483 { -
trunk/src/VBox/VMM/VMMAll/GIMAllKvm.cpp
r96407 r97193 434 434 unsigned cbInstr; 435 435 DISCPUSTATE Dis; 436 int rc = EMInterpretDisasCurrent(pV M, pVCpu, &Dis, &cbInstr);436 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbInstr); 437 437 if (RT_SUCCESS(rc)) 438 438 { -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r97145 r97193 224 224 uint32_t cbOp; 225 225 PDISCPUSTATE pDis = &pVCpu->pgm.s.DisState; 226 rc = EMInterpretDisasCurrent(pV M, pVCpu, pDis, &cbOp);226 rc = EMInterpretDisasCurrent(pVCpu, pDis, &cbOp); 227 227 if ( RT_SUCCESS(rc) 228 228 && pDis->uCpuMode == DISCPUMODE_32BIT /** @todo why does this matter? */ -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r97147 r97193 1153 1153 */ 1154 1154 PDISCPUSTATE pDis = &pVCpu->pgm.s.DisState; 1155 int rc = EMInterpretDisasCurrent(pV M, pVCpu, pDis, NULL);1155 int rc = EMInterpretDisasCurrent(pVCpu, pDis, NULL); 1156 1156 if (RT_UNLIKELY(rc != VINF_SUCCESS)) 1157 1157 { -
trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
r97178 r97193 7414 7414 { 7415 7415 PDISCPUSTATE pDis = &pVCpu->hmr0.s.svm.DisState; 7416 int rc = EMInterpretDisasCurrent(pVCpu ->CTX_SUFF(pVM), pVCpu, pDis, &cbInstr);7416 int rc = EMInterpretDisasCurrent(pVCpu, pDis, &cbInstr); 7417 7417 if ( rc == VINF_SUCCESS 7418 7418 && pDis->pCurInstr->uOpcode == OP_WRMSR) … … 8115 8115 { 8116 8116 PDISCPUSTATE pDis = &pVCpu->hmr0.s.svm.DisState; 8117 int rc = EMInterpretDisasCurrent(pVCpu ->CTX_SUFF(pVM), pVCpu, pDis, &cbInstr);8117 int rc = EMInterpretDisasCurrent(pVCpu, pDis, &cbInstr); 8118 8118 if ( rc == VINF_SUCCESS 8119 8119 && pDis->pCurInstr->uOpcode == OP_VMMCALL) … … 8159 8159 { 8160 8160 PDISCPUSTATE pDis = &pVCpu->hmr0.s.svm.DisState; 8161 int rc = EMInterpretDisasCurrent(pVCpu ->CTX_SUFF(pVM), pVCpu, pDis, &cbInstr);8161 int rc = EMInterpretDisasCurrent(pVCpu, pDis, &cbInstr); 8162 8162 if ( rc == VINF_SUCCESS 8163 8163 && pDis->pCurInstr->uOpcode == OP_PAUSE) … … 8512 8512 if (!(pCtx->cr0 & X86_CR0_NE)) 8513 8513 { 8514 PVMCC pVM = pVCpu->CTX_SUFF(pVM);8515 8514 PDISSTATE pDis = &pVCpu->hmr0.s.svm.DisState; 8516 8515 unsigned cbInstr; 8517 int rc = EMInterpretDisasCurrent(pV M, pVCpu, pDis, &cbInstr);8516 int rc = EMInterpretDisasCurrent(pVCpu, pDis, &cbInstr); 8518 8517 if (RT_SUCCESS(rc)) 8519 8518 { -
trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp
r96407 r97193 383 383 * Get the Sel and GCPtr if fFlags requests that. 384 384 */ 385 PCCPUMCTX CORE pCtxCore = NULL;386 PCCPUMSELREG pSRegCS 385 PCCPUMCTX pCtx = CPUMQueryGuestCtxPtr(pVCpu); 386 PCCPUMSELREG pSRegCS = NULL; 387 387 if (fFlags & DBGF_DISAS_FLAGS_CURRENT_GUEST) 388 388 { 389 pCtxCore = CPUMGetGuestCtxCore(pVCpu); 390 Sel = pCtxCore->cs.Sel; 391 pSRegCS = &pCtxCore->cs; 392 GCPtr = pCtxCore->rip; 389 Sel = pCtx->cs.Sel; 390 pSRegCS = &pCtx->cs; 391 GCPtr = pCtx->rip; 393 392 } 394 393 /* … … 398 397 else 399 398 { 400 pCtxCore = CPUMGetGuestCtxCore(pVCpu); 401 if (pCtxCore->cs.Sel == Sel && Sel != DBGF_SEL_FLAT) 402 pSRegCS = &pCtxCore->cs; 399 if (pCtx->cs.Sel == Sel && Sel != DBGF_SEL_FLAT) 400 pSRegCS = &pCtx->cs; 403 401 else 404 pCtx Core= NULL;402 pCtx = NULL; 405 403 } 406 404 … … 425 423 SelInfo.fFlags = PGMMODE_IS_LONG_MODE(enmMode) 426 424 ? DBGFSELINFO_FLAGS_LONG_MODE 427 : enmMode != PGMMODE_REAL && !pCtx Core->eflags.Bits.u1VM425 : enmMode != PGMMODE_REAL && !pCtx->eflags.Bits.u1VM 428 426 ? DBGFSELINFO_FLAGS_PROT_MODE 429 427 : DBGFSELINFO_FLAGS_REAL_MODE; … … 478 476 } 479 477 } 480 else if ( (pCtx Core && pCtxCore->eflags.Bits.u1VM)478 else if ( (pCtx && pCtx->eflags.Bits.u1VM) 481 479 || enmMode == PGMMODE_REAL 482 480 || (fFlags & DBGF_DISAS_FLAGS_MODE_MASK) == DBGF_DISAS_FLAGS_16BIT_REAL_MODE) -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r97100 r97193 2274 2274 DISCPUSTATE Dis; 2275 2275 uint32_t cbOp; 2276 int rc = EMInterpretDisasCurrent(pV M, pVCpu, &Dis, &cbOp);2276 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbOp); 2277 2277 AssertRC(rc); 2278 2278 if ( rc == VINF_SUCCESS … … 2327 2327 2328 2328 pCtx->rip += cbOp; 2329 rc = EMInterpretDisasCurrent(pV M, pVCpu, &Dis, &cbOp);2329 rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbOp); 2330 2330 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, "Following read"); 2331 2331 pCtx->rip = uSavedRip; … … 2450 2450 DISCPUSTATE Dis; 2451 2451 uint32_t cbOp; 2452 int rc = EMInterpretDisasCurrent(pV M, pVCpu, &Dis, &cbOp);2452 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbOp); 2453 2453 AssertRC(rc); 2454 2454 if ( rc == VINF_SUCCESS
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