Changeset 9720 in vbox
- Timestamp:
- Jun 16, 2008 1:12:04 PM (17 years ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r9713 r9720 2144 2144 int rc; 2145 2145 2146 /* Note: works the same in 32 and 64 bits modes. */ 2146 /** @todo According to the Intel manuals, there's a REX version of RDMSR that is slightly different. 2147 * That version clears the high dwords of both RDX & RAX */ 2147 2148 rc = CPUMQueryGuestCtxPtr(pVM, &pCtx); 2148 2149 AssertRC(rc); … … 2228 2229 static int emInterpretRdmsr(PVM pVM, PDISCPUSTATE pCpu, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, uint32_t *pcbSize) 2229 2230 { 2231 Assert(!(pCpu->prefix & PREFIX_REX)); 2230 2232 return EMInterpretRdmsr(pVM, pRegFrame); 2231 2233 } -
trunk/src/VBox/VMM/VMMR0/HWSVMR0.cpp
r9718 r9720 1714 1714 /* Emulate in ring 3. */ 1715 1715 case SVM_EXIT_MSR: 1716 /* Note: If we decide to emulate them here, then we must sync the MSRs that could have been changed (sysenter, fs/gs base)!!! */ 1717 rc = VERR_EM_INTERPRETER; 1716 { 1717 uint32_t cbSize; 1718 1719 /* Note: the intel manual claims there's a REX version of RDMSR that's slightly different, so we play safe by completely disassembling the instruction. */ 1720 Log(("SVM: %s\n", (pVMCB->ctrl.u64ExitInfo1 == 0) ? "rdmsr" : "wrmsr")); 1721 rc = EMInterpretInstruction(pVM, CPUMCTX2CORE(pCtx), 0, &cbSize); 1722 if (rc == VINF_SUCCESS) 1723 { 1724 /* EIP has been updated already. */ 1725 1726 /* Only resume if successful. */ 1727 STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x); 1728 goto ResumeExecution; 1729 } 1730 AssertMsg(rc == VERR_EM_INTERPRETER, ("EMU: %s failed with %Vrc\n", (pVMCB->ctrl.u64ExitInfo1 == 0) ? "rdmsr" : "wrmsr", rc)); 1718 1731 break; 1732 } 1719 1733 1720 1734 case SVM_EXIT_MONITOR: -
trunk/src/VBox/VMM/VMMR0/HWVMXR0.cpp
r9719 r9720 1699 1699 } 1700 1700 1701 case VMX_EXIT_RDMSR: /* 31 RDMSR. Guest software attempted to execute RDMSR. */ 1702 case VMX_EXIT_WRMSR: /* 32 WRMSR. Guest software attempted to execute WRMSR. */ 1703 { 1704 uint32_t cbSize; 1705 1706 /* Note: the intel manual claims there's a REX version of RDMSR that's slightly different, so we play safe by completely disassembling the instruction. */ 1707 Log2(("VMX: %s\n", (exitReason == VMX_EXIT_RDMSR) ? "rdmsr" : "wrmsr")); 1708 rc = EMInterpretInstruction(pVM, CPUMCTX2CORE(pCtx), 0, &cbSize); 1709 if (rc == VINF_SUCCESS) 1710 { 1711 /* EIP has been updated already. */ 1712 1713 /* Only resume if successful. */ 1714 STAM_PROFILE_ADV_STOP(&pVM->hwaccm.s.StatExit, x); 1715 goto ResumeExecution; 1716 } 1717 AssertMsg(rc == VERR_EM_INTERPRETER, ("EMU: %s failed with %Vrc\n", (exitReason == VMX_EXIT_RDMSR) ? "rdmsr" : "wrmsr", rc)); 1718 break; 1719 } 1720 1701 1721 case VMX_EXIT_CRX_MOVE: /* 28 Control-register accesses. */ 1702 1722 {
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