Changeset 97202 in vbox

Timestamp:

Oct 18, 2022 11:55:00 AM (2 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

154177

Message:

VMM/PGM: More CPUMCTXCORE elimination, now in the PGMR0Trap0eHandlerNestedPaging and PGMR0NestedTrap0eHandlerNestedPaging area.

Location:

trunk

Files:

• include/VBox/vmm/pgm.h (modified) (2 diffs)
• src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h (modified) (3 diffs)
• src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (1 diff)
• src/VBox/VMM/VMMR0/PGMR0.cpp (modified) (6 diffs)
• src/VBox/VMM/VMMR0/PGMR0Bth.h (modified) (1 diff)

trunk/include/VBox/vmm/pgm.h

@@ -981 +981 @@
                                             PCRTGCPTR64 paRegionsGCPtrs);
 VMMR0DECL(int)       PGMR0Trap0eHandlerNestedPaging(PGVM pGVM, PGVMCPU pGVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr,
-                                                    PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault);
+                                                    PCPUMCTX pCtx, RTGCPHYS pvFault);
 VMMR0DECL(VBOXSTRICTRC) PGMR0Trap0eHandlerNPMisconfig(PGVM pGVM, PGVMCPU pGVCpu, PGMMODE enmShwPagingMode,
                                                       PCPUMCTX pCtx, RTGCPHYS GCPhysFault, uint32_t uErr);
@@ -988 +988 @@
 # ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
 VMMR0DECL(VBOXSTRICTRC) PGMR0NestedTrap0eHandlerNestedPaging(PGVMCPU pGVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr,
-                                                             PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysNestedFault,
+                                                             PCPUMCTX pCtx, RTGCPHYS GCPhysNestedFault,
                                                              bool fIsLinearAddrValid, RTGCPTR GCPtrNestedFault, PPGMPTWALK pWalk);
 # endif

trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h

@@ -9391 +9391 @@
      */
     TRPMAssertXcptPF(pVCpu, GCPhys, uErrorCode);
-    rcStrict = PGMR0Trap0eHandlerNestedPaging(pVM, pVCpu, PGMMODE_EPT, uErrorCode, CPUMCTX2CORE(pCtx), GCPhys);
+    rcStrict = PGMR0Trap0eHandlerNestedPaging(pVM, pVCpu, PGMMODE_EPT, uErrorCode, pCtx, GCPhys);
     TRPMResetTrap(pVCpu);
 
@@ -10748 +10748 @@
         PGMPTWALK Walk;
         PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
-        rcStrict = PGMR0NestedTrap0eHandlerNestedPaging(pVCpu, PGMMODE_EPT, uErr, CPUMCTX2CORE(pCtx),
-                                                        GCPhysNestedFault, fIsLinearAddrValid, GCPtrNestedFault,
-                                                        &Walk);
+        rcStrict = PGMR0NestedTrap0eHandlerNestedPaging(pVCpu, PGMMODE_EPT, uErr, pCtx, GCPhysNestedFault,
+                                                        fIsLinearAddrValid, GCPtrNestedFault, &Walk);
         Log7Func(("PGM (uExitQual=%#RX64, %RGp, %RGv) -> %Rrc (fFailed=%d)\n",
                   uExitQual, GCPhysNestedFault, GCPtrNestedFault, VBOXSTRICTRC_VAL(rcStrict), Walk.fFailed));
@@ -10799 +10798 @@
         PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
         RTGCPHYS const GCPhysNestedFault = pVmxTransient->uGuestPhysicalAddr;
-        VBOXSTRICTRC rcStrict = PGMR0NestedTrap0eHandlerNestedPaging(pVCpu, PGMMODE_EPT, X86_TRAP_PF_RSVD, CPUMCTX2CORE(pCtx),
+        VBOXSTRICTRC rcStrict = PGMR0NestedTrap0eHandlerNestedPaging(pVCpu, PGMMODE_EPT, X86_TRAP_PF_RSVD, pCtx,
                                                                      GCPhysNestedFault, false /* fIsLinearAddrValid */,
                                                                      0 /* GCPtrNestedFault */, &Walk);

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -7994 +7994 @@
      */
     TRPMAssertXcptPF(pVCpu, GCPhysFaultAddr, u32ErrCode);
-    int rc = PGMR0Trap0eHandlerNestedPaging(pVM, pVCpu, enmNestedPagingMode, u32ErrCode, CPUMCTX2CORE(pCtx), GCPhysFaultAddr);
+    int rc = PGMR0Trap0eHandlerNestedPaging(pVM, pVCpu, enmNestedPagingMode, u32ErrCode, pCtx, GCPhysFaultAddr);
     TRPMResetTrap(pVCpu);
 

trunk/src/VBox/VMM/VMMR0/PGMR0.cpp

@@ -1112 +1112 @@
  * @param   enmShwPagingMode    Paging mode for the nested page tables.
  * @param   uErr                The trap error code.
- * @param   pRegFrame           Trap register frame.
+ * @param   pCtx                Pointer to the register context for the CPU.
  * @param   GCPhysFault         The fault address.
  */
 VMMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PGVM pGVM, PGVMCPU pGVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr,
-                                              PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysFault)
+                                              PCPUMCTX pCtx, RTGCPHYS GCPhysFault)
 {
     int rc;
 
-    LogFlow(("PGMTrap0eHandler: uErr=%RGx GCPhysFault=%RGp eip=%RGv\n", uErr, GCPhysFault, (RTGCPTR)pRegFrame->rip));
+    LogFlow(("PGMTrap0eHandler: uErr=%RGx GCPhysFault=%RGp eip=%RGv\n", uErr, GCPhysFault, (RTGCPTR)pCtx->rip));
     STAM_PROFILE_START(&pGVCpu->pgm.s.StatRZTrap0e, a);
     STAM_STATS({ pGVCpu->pgmr0.s.pStatTrap0eAttributionR0 = NULL; } );
@@ -1183 +1183 @@
     {
         case PGMMODE_32_BIT:
-            rc = PGM_BTH_NAME_32BIT_PROT(Trap0eHandler)(pGVCpu, uErr, pRegFrame, GCPhysFault, &fLockTaken);
+            rc = PGM_BTH_NAME_32BIT_PROT(Trap0eHandler)(pGVCpu, uErr, pCtx, GCPhysFault, &fLockTaken);
             break;
         case PGMMODE_PAE:
         case PGMMODE_PAE_NX:
-            rc = PGM_BTH_NAME_PAE_PROT(Trap0eHandler)(pGVCpu, uErr, pRegFrame, GCPhysFault, &fLockTaken);
+            rc = PGM_BTH_NAME_PAE_PROT(Trap0eHandler)(pGVCpu, uErr, pCtx, GCPhysFault, &fLockTaken);
             break;
         case PGMMODE_AMD64:
         case PGMMODE_AMD64_NX:
-            rc = PGM_BTH_NAME_AMD64_PROT(Trap0eHandler)(pGVCpu, uErr, pRegFrame, GCPhysFault, &fLockTaken);
+            rc = PGM_BTH_NAME_AMD64_PROT(Trap0eHandler)(pGVCpu, uErr, pCtx, GCPhysFault, &fLockTaken);
             break;
         case PGMMODE_EPT:
-            rc = PGM_BTH_NAME_EPT_PROT(Trap0eHandler)(pGVCpu, uErr, pRegFrame, GCPhysFault, &fLockTaken);
+            rc = PGM_BTH_NAME_EPT_PROT(Trap0eHandler)(pGVCpu, uErr, pCtx, GCPhysFault, &fLockTaken);
             break;
         default:
@@ -1218 +1218 @@
              || rc == VERR_PAGE_MAP_LEVEL4_NOT_PRESENT)     /* precaution */
     {
-        Log(("WARNING: Unexpected VERR_PAGE_TABLE_NOT_PRESENT (%d) for page fault at %RGp error code %x (rip=%RGv)\n", rc, GCPhysFault, uErr, pRegFrame->rip));
+        Log(("WARNING: Unexpected VERR_PAGE_TABLE_NOT_PRESENT (%d) for page fault at %RGp error code %x (rip=%RGv)\n", rc, GCPhysFault, uErr, pCtx->rip));
         /* Some kind of inconsistency in the SMP case; it's safe to just execute the instruction again; not sure about
            single VCPU VMs though. */
@@ -1240 +1240 @@
  *                              EMT.
  * @param   uErr                The trap error code.
- * @param   pRegFrame           Trap register frame.
+ * @param   pCtx                Pointer to the register context for the CPU.
  * @param   GCPhysNestedFault   The nested-guest physical address causing the fault.
  * @param   fIsLinearAddrValid  Whether translation of a nested-guest linear address
@@ -1250 +1250 @@
  */
 VMMR0DECL(VBOXSTRICTRC) PGMR0NestedTrap0eHandlerNestedPaging(PGVMCPU pGVCpu, PGMMODE enmShwPagingMode, RTGCUINT uErr,
-                                                             PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysNestedFault,
+                                                             PCPUMCTX pCtx, RTGCPHYS GCPhysNestedFault,
                                                              bool fIsLinearAddrValid, RTGCPTR GCPtrNestedFault, PPGMPTWALK pWalk)
 {
@@ -1257 +1257 @@
 
     bool fLockTaken;
-    VBOXSTRICTRC rcStrict = PGM_BTH_NAME_EPT_PROT(NestedTrap0eHandler)(pGVCpu, uErr, pRegFrame, GCPhysNestedFault,
+    VBOXSTRICTRC rcStrict = PGM_BTH_NAME_EPT_PROT(NestedTrap0eHandler)(pGVCpu, uErr, pCtx, GCPhysNestedFault,
                                                                        fIsLinearAddrValid, GCPtrNestedFault, pWalk, &fLockTaken);
     if (fLockTaken)

trunk/src/VBox/VMM/VMMR0/PGMR0Bth.h

@@ -31 +31 @@
 *******************************************************************************/
 RT_C_DECLS_BEGIN
-PGM_BTH_DECL(int, Trap0eHandler)(PVMCPUCC pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPTR pvFault, bool *pfLockTaken);
-PGM_BTH_DECL(int, NestedTrap0eHandler)(PVMCPUCC pVCpu, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS GCPhysNested,
+PGM_BTH_DECL(int, Trap0eHandler)(PVMCPUCC pVCpu, RTGCUINT uErr, PCPUMCTX pCtx, RTGCPTR pvFault, bool *pfLockTaken);
+PGM_BTH_DECL(int, NestedTrap0eHandler)(PVMCPUCC pVCpu, RTGCUINT uErr, PCPUMCTX pCtx, RTGCPHYS GCPhysNested,
                                        bool fIsLinearAddrValid, RTGCPTR GCPtrNested, PPGMPTWALK pWalk, bool *pfLockTaken);
 RT_C_DECLS_END