Changeset 97257 in vbox
- Timestamp:
- Oct 20, 2022 3:30:05 PM (3 years ago)
- svn:sync-xref-src-repo-rev:
- 154239
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
r97051 r97257 6158 6158 IEMIMPL_MEDIA_SSE_MXCSR_U64_U64 cvtps2pi 6159 6159 IEMIMPL_MEDIA_SSE_MXCSR_U64_U64 cvttps2pi 6160 6161 ; 6162 ; All forms of RDRAND and RDSEED 6163 ; 6164 ; @param A0 Pointer to the destination operand. 6165 ; @param A1 Pointer to the EFLAGS value (input/output). 6166 ; 6167 %macro IEMIMPL_RDRAND_RDSEED 3 6168 BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u %+ %3, 8 6169 PROLOGUE_2_ARGS 6170 6171 %1 %2 6172 mov [A0], %2 6173 IEM_SAVE_FLAGS A1, X86_EFL_STATUS_BITS, 0 6174 6175 EPILOGUE_2_ARGS 6176 ENDPROC iemAImpl_ %+ %1 %+ _u %+ %3 6177 %endmacro 6178 6179 IEMIMPL_RDRAND_RDSEED rdrand, ax, 16 6180 IEMIMPL_RDRAND_RDSEED rdrand, eax, 32 6181 IEMIMPL_RDRAND_RDSEED rdrand, rax, 64 6182 IEMIMPL_RDRAND_RDSEED rdseed, ax, 16 6183 IEMIMPL_RDRAND_RDSEED rdseed, eax, 32 6184 IEMIMPL_RDRAND_RDSEED rdseed, rax, 64 6185 -
trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
r97236 r97257 17216 17216 } 17217 17217 #endif 17218 17219 /** 17220 * RDRAND 17221 */ 17222 IEM_DECL_IMPL_DEF(void, iemAImpl_rdrand_u16_fallback,(uint16_t *puDst, uint32_t *pEFlags)) 17223 { 17224 *puDst = 0; 17225 *pEFlags &= ~X86_EFL_STATUS_BITS; 17226 *pEFlags |= X86_EFL_CF; 17227 } 17228 17229 IEM_DECL_IMPL_DEF(void, iemAImpl_rdrand_u32_fallback,(uint32_t *puDst, uint32_t *pEFlags)) 17230 { 17231 *puDst = 0; 17232 *pEFlags &= ~X86_EFL_STATUS_BITS; 17233 *pEFlags |= X86_EFL_CF; 17234 } 17235 17236 IEM_DECL_IMPL_DEF(void, iemAImpl_rdrand_u64_fallback,(uint64_t *puDst, uint32_t *pEFlags)) 17237 { 17238 *puDst = 0; 17239 *pEFlags &= ~X86_EFL_STATUS_BITS; 17240 *pEFlags |= X86_EFL_CF; 17241 } 17242 17243 /** 17244 * RDSEED 17245 */ 17246 IEM_DECL_IMPL_DEF(void, iemAImpl_rdseed_u16_fallback,(uint16_t *puDst, uint32_t *pEFlags)) 17247 { 17248 *puDst = 0; 17249 *pEFlags &= ~X86_EFL_STATUS_BITS; 17250 *pEFlags |= X86_EFL_CF; 17251 } 17252 17253 IEM_DECL_IMPL_DEF(void, iemAImpl_rdseed_u32_fallback,(uint32_t *puDst, uint32_t *pEFlags)) 17254 { 17255 *puDst = 0; 17256 *pEFlags &= ~X86_EFL_STATUS_BITS; 17257 *pEFlags |= X86_EFL_CF; 17258 } 17259 17260 IEM_DECL_IMPL_DEF(void, iemAImpl_rdseed_u64_fallback,(uint64_t *puDst, uint32_t *pEFlags)) 17261 { 17262 *puDst = 0; 17263 *pEFlags &= ~X86_EFL_STATUS_BITS; 17264 *pEFlags |= X86_EFL_CF; 17265 } 17266 -
trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsTwoByte0f.cpp.h
r97252 r97257 12239 12239 } 12240 12240 12241 12241 12242 /** Opcode 0x0f 0xc7 11/6. */ 12242 FNIEMOP_STUB_1(iemOp_Grp9_rdrand_Rv, uint8_t, bRm); 12243 FNIEMOP_DEF_1(iemOp_Grp9_rdrand_Rv, uint8_t, bRm) 12244 { 12245 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fRdRand) 12246 return IEMOP_RAISE_INVALID_OPCODE(); 12247 12248 if (IEM_IS_MODRM_REG_MODE(bRm)) 12249 { 12250 /* register destination. */ 12251 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12252 switch (pVCpu->iem.s.enmEffOpSize) 12253 { 12254 case IEMMODE_16BIT: 12255 IEM_MC_BEGIN(2, 0); 12256 IEM_MC_ARG(uint16_t *, pu16Dst, 0); 12257 IEM_MC_ARG(uint32_t *, pEFlags, 1); 12258 12259 IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); 12260 IEM_MC_REF_EFLAGS(pEFlags); 12261 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fRdRand, iemAImpl_rdrand_u16, iemAImpl_rdrand_u16_fallback), 12262 pu16Dst, pEFlags); 12263 12264 IEM_MC_ADVANCE_RIP(); 12265 IEM_MC_END(); 12266 return VINF_SUCCESS; 12267 12268 case IEMMODE_32BIT: 12269 IEM_MC_BEGIN(2, 0); 12270 IEM_MC_ARG(uint32_t *, pu32Dst, 0); 12271 IEM_MC_ARG(uint32_t *, pEFlags, 1); 12272 12273 IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); 12274 IEM_MC_REF_EFLAGS(pEFlags); 12275 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fRdRand, iemAImpl_rdrand_u32, iemAImpl_rdrand_u32_fallback), 12276 pu32Dst, pEFlags); 12277 12278 IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(pu32Dst); 12279 IEM_MC_ADVANCE_RIP(); 12280 IEM_MC_END(); 12281 return VINF_SUCCESS; 12282 12283 case IEMMODE_64BIT: 12284 IEM_MC_BEGIN(2, 0); 12285 IEM_MC_ARG(uint64_t *, pu64Dst, 0); 12286 IEM_MC_ARG(uint32_t *, pEFlags, 1); 12287 12288 IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); 12289 IEM_MC_REF_EFLAGS(pEFlags); 12290 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fRdRand, iemAImpl_rdrand_u64, iemAImpl_rdrand_u64_fallback), 12291 pu64Dst, pEFlags); 12292 12293 IEM_MC_ADVANCE_RIP(); 12294 IEM_MC_END(); 12295 return VINF_SUCCESS; 12296 12297 IEM_NOT_REACHED_DEFAULT_CASE_RET(); 12298 } 12299 } 12300 else 12301 { 12302 /* Register only. */ 12303 return IEMOP_RAISE_INVALID_OPCODE(); 12304 } 12305 } 12243 12306 12244 12307 /** Opcode 0x0f 0xc7 !11/6. */ … … 12326 12389 12327 12390 /** Opcode 0x0f 0xc7 11/7. */ 12328 FNIEMOP_STUB_1(iemOp_Grp9_rdseed_Rv, uint8_t, bRm); 12329 12391 FNIEMOP_DEF_1(iemOp_Grp9_rdseed_Rv, uint8_t, bRm) 12392 { 12393 if (!IEM_GET_GUEST_CPU_FEATURES(pVCpu)->fRdSeed) 12394 return IEMOP_RAISE_INVALID_OPCODE(); 12395 12396 if (IEM_IS_MODRM_REG_MODE(bRm)) 12397 { 12398 /* register destination. */ 12399 IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX(); 12400 switch (pVCpu->iem.s.enmEffOpSize) 12401 { 12402 case IEMMODE_16BIT: 12403 IEM_MC_BEGIN(2, 0); 12404 IEM_MC_ARG(uint16_t *, pu16Dst, 0); 12405 IEM_MC_ARG(uint32_t *, pEFlags, 1); 12406 12407 IEM_MC_REF_GREG_U16(pu16Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); 12408 IEM_MC_REF_EFLAGS(pEFlags); 12409 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fRdSeed, iemAImpl_rdseed_u16, iemAImpl_rdseed_u16_fallback), 12410 pu16Dst, pEFlags); 12411 12412 IEM_MC_ADVANCE_RIP(); 12413 IEM_MC_END(); 12414 return VINF_SUCCESS; 12415 12416 case IEMMODE_32BIT: 12417 IEM_MC_BEGIN(2, 0); 12418 IEM_MC_ARG(uint32_t *, pu32Dst, 0); 12419 IEM_MC_ARG(uint32_t *, pEFlags, 1); 12420 12421 IEM_MC_REF_GREG_U32(pu32Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); 12422 IEM_MC_REF_EFLAGS(pEFlags); 12423 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fRdSeed, iemAImpl_rdseed_u32, iemAImpl_rdseed_u32_fallback), 12424 pu32Dst, pEFlags); 12425 12426 IEM_MC_CLEAR_HIGH_GREG_U64_BY_REF(pu32Dst); 12427 IEM_MC_ADVANCE_RIP(); 12428 IEM_MC_END(); 12429 return VINF_SUCCESS; 12430 12431 case IEMMODE_64BIT: 12432 IEM_MC_BEGIN(2, 0); 12433 IEM_MC_ARG(uint64_t *, pu64Dst, 0); 12434 IEM_MC_ARG(uint32_t *, pEFlags, 1); 12435 12436 IEM_MC_REF_GREG_U64(pu64Dst, IEM_GET_MODRM_RM(pVCpu, bRm)); 12437 IEM_MC_REF_EFLAGS(pEFlags); 12438 IEM_MC_CALL_VOID_AIMPL_2(IEM_SELECT_HOST_OR_FALLBACK(fRdSeed, iemAImpl_rdseed_u64, iemAImpl_rdseed_u64_fallback), 12439 pu64Dst, pEFlags); 12440 12441 IEM_MC_ADVANCE_RIP(); 12442 IEM_MC_END(); 12443 return VINF_SUCCESS; 12444 12445 IEM_NOT_REACHED_DEFAULT_CASE_RET(); 12446 } 12447 } 12448 else 12449 { 12450 /* Register only. */ 12451 return IEMOP_RAISE_INVALID_OPCODE(); 12452 } 12453 } 12330 12454 12331 12455 /** -
trunk/src/VBox/VMM/include/IEMInternal.h
r96945 r97257 1575 1575 /** @} */ 1576 1576 1577 /** @name RDRAND and RDSEED 1578 * @{ */ 1579 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU16,(uint16_t *puDst, uint32_t *pEFlags)); 1580 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU32,(uint32_t *puDst, uint32_t *pEFlags)); 1581 typedef IEM_DECL_IMPL_TYPE(void, FNIEMAIMPLRDRANDSEEDU64,(uint64_t *puDst, uint32_t *pEFlags)); 1582 typedef FNIEMAIMPLRDRANDSEEDU16 *FNIEMAIMPLPRDRANDSEEDU16; 1583 typedef FNIEMAIMPLRDRANDSEEDU32 *FNIEMAIMPLPRDRANDSEEDU32; 1584 typedef FNIEMAIMPLRDRANDSEEDU64 *FNIEMAIMPLPRDRANDSEEDU64; 1585 1586 FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdrand_u16, iemAImpl_rdrand_u16_fallback; 1587 FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdrand_u32, iemAImpl_rdrand_u32_fallback; 1588 FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdrand_u64, iemAImpl_rdrand_u64_fallback; 1589 FNIEMAIMPLRDRANDSEEDU16 iemAImpl_rdseed_u16, iemAImpl_rdseed_u16_fallback; 1590 FNIEMAIMPLRDRANDSEEDU32 iemAImpl_rdseed_u32, iemAImpl_rdseed_u32_fallback; 1591 FNIEMAIMPLRDRANDSEEDU64 iemAImpl_rdseed_u64, iemAImpl_rdseed_u64_fallback; 1592 /** @} */ 1577 1593 1578 1594 /** @name FPU operations taking a 32-bit float argument
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