Changeset 97286 in vbox for trunk/include

Timestamp:

Oct 24, 2022 10:15:44 PM (2 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

154277

Message:

VMM/CPUM,IEM: Moved the CPUMCTX_INHIBIT_XXX flags into reserved EFLAGS space.

Location:

trunk/include/VBox/vmm

Files:

• cpum.h (modified) (19 diffs)
• cpum.mac (modified) (1 diff)
• cpumctx.h (modified) (5 diffs)
• vm.h (modified) (1 diff)

trunk/include/VBox/vmm/cpum.h

@@ -1931 +1931 @@
  * @param   pCtx    Current guest CPU context.
  * @note    Requires pCtx->rip to be up to date.
- * @note    Does not clear fInhibit when CPUMCTX::uRipInhibitInt differs
- *          from CPUMCTX::rip.
+ * @note    Does NOT clear CPUMCTX_INHIBIT_SHADOW when CPUMCTX::uRipInhibitInt
+ *          differs from CPUMCTX::rip.
  */
 DECLINLINE(bool) CPUMIsInInterruptShadow(PCCPUMCTX pCtx)
 {
-    if (!(pCtx->fInhibit & CPUMCTX_INHIBIT_SHADOW))
+    if (!(pCtx->eflags.uBoth & CPUMCTX_INHIBIT_SHADOW))
         return false;
 
@@ -1956 +1956 @@
 DECLINLINE(bool) CPUMIsInInterruptShadowWithUpdate(PCPUMCTX pCtx)
 {
-    if (!(pCtx->fInhibit & CPUMCTX_INHIBIT_SHADOW))
+    if (!(pCtx->eflags.uBoth & CPUMCTX_INHIBIT_SHADOW))
         return false;
 
@@ -1963 +1963 @@
         return true;
 
-    pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_SHADOW;
+    pCtx->eflags.uBoth &= ~CPUMCTX_INHIBIT_SHADOW;
     return false;
 }
@@ -1977 +1977 @@
  * @param   pCtx    Current guest CPU context.
  * @note    Requires pCtx->rip to be up to date.
- * @note    Does not clear fInhibit when CPUMCTX::uRipInhibitInt differs
- *          from CPUMCTX::rip.
+ * @note    Does NOT clear CPUMCTX_INHIBIT_SHADOW when CPUMCTX::uRipInhibitInt
+ *          differs from CPUMCTX::rip.
  * @note    Both CPUMIsInInterruptShadowAfterSti() and this function may return
  *          true depending on the execution engine being used.
@@ -1984 +1984 @@
 DECLINLINE(bool) CPUMIsInInterruptShadowAfterSs(PCCPUMCTX pCtx)
 {
-    if (!(pCtx->fInhibit & CPUMCTX_INHIBIT_SHADOW_SS))
+    if (!(pCtx->eflags.uBoth & CPUMCTX_INHIBIT_SHADOW_SS))
         return false;
 
@@ -2000 +2000 @@
  * @param   pCtx    Current guest CPU context.
  * @note    Requires pCtx->rip to be up to date.
- * @note    Does not clear fInhibit when CPUMCTX::uRipInhibitInt differs
- *          from CPUMCTX::rip.
+ * @note    Does NOT clear CPUMCTX_INHIBIT_SHADOW when CPUMCTX::uRipInhibitInt
+ *          differs from CPUMCTX::rip.
  * @note    Both CPUMIsInInterruptShadowAfterSs() and this function may return
  *          true depending on the execution engine being used.
@@ -2007 +2007 @@
 DECLINLINE(bool) CPUMIsInInterruptShadowAfterSti(PCCPUMCTX pCtx)
 {
-    if (!(pCtx->fInhibit & CPUMCTX_INHIBIT_SHADOW_STI))
+    if (!(pCtx->eflags.uBoth & CPUMCTX_INHIBIT_SHADOW_STI))
         return false;
 
@@ -2023 +2023 @@
 {
     CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
-    pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW;
+    pCtx->eflags.uBoth |= CPUMCTX_INHIBIT_SHADOW;
     pCtx->uRipInhibitInt = pCtx->rip;
 }
@@ -2036 +2036 @@
 DECLINLINE(void) CPUMSetInInterruptShadowEx(PCPUMCTX pCtx, uint64_t rip)
 {
-    pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW;
+    pCtx->eflags.uBoth  |= CPUMCTX_INHIBIT_SHADOW;
     pCtx->uRipInhibitInt = rip;
 }
@@ -2049 +2049 @@
 {
     CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
-    pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW_SS;
+    pCtx->eflags.uBoth  |= CPUMCTX_INHIBIT_SHADOW_SS;
     pCtx->uRipInhibitInt = pCtx->rip;
 }
@@ -2062 +2062 @@
 {
     CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
-    pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW_STI;
+    pCtx->eflags.uBoth  |= CPUMCTX_INHIBIT_SHADOW_STI;
     pCtx->uRipInhibitInt = pCtx->rip;
 }
@@ -2073 +2073 @@
 DECLINLINE(void) CPUMClearInterruptShadow(PCPUMCTX pCtx)
 {
-    pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_SHADOW;
+    pCtx->eflags.uBoth &= ~CPUMCTX_INHIBIT_SHADOW;
 }
 
@@ -2087 +2087 @@
     CPUMCTX_ASSERT_NOT_EXTRN(pCtx, CPUMCTX_EXTRN_RIP);
     if (!fInhibited)
-        pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_SHADOW;
+        pCtx->eflags.uBoth  &= ~CPUMCTX_INHIBIT_SHADOW;
     else
     {
-        pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW;
+        pCtx->eflags.uBoth  |= CPUMCTX_INHIBIT_SHADOW;
         pCtx->uRipInhibitInt = pCtx->rip;
     }
@@ -2106 +2106 @@
 {
     if (!fInhibited)
-        pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_SHADOW;
+        pCtx->eflags.uBoth  &= ~CPUMCTX_INHIBIT_SHADOW;
     else
     {
-        pCtx->fInhibit |= CPUMCTX_INHIBIT_SHADOW;
+        pCtx->eflags.uBoth  |= CPUMCTX_INHIBIT_SHADOW;
         pCtx->uRipInhibitInt = rip;
     }
@@ -2126 +2126 @@
 {
     if (!(fInhibitedBySs | fInhibitedBySti))
-        pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_SHADOW;
+        pCtx->eflags.uBoth &= ~CPUMCTX_INHIBIT_SHADOW;
     else
     {
-        pCtx->fInhibit |= (fInhibitedBySs  ? (uint8_t)CPUMCTX_INHIBIT_SHADOW_SS  : (uint8_t)0)
-                       |  (fInhibitedBySti ? (uint8_t)CPUMCTX_INHIBIT_SHADOW_STI : (uint8_t)0);
+        pCtx->eflags.uBoth |= (fInhibitedBySs  ? CPUMCTX_INHIBIT_SHADOW_SS  : UINT32_C(0))
+                           |  (fInhibitedBySti ? CPUMCTX_INHIBIT_SHADOW_STI : UINT32_C(0));
         pCtx->uRipInhibitInt = rip;
     }
@@ -2153 +2153 @@
 DECLINLINE(bool) CPUMAreInterruptsInhibitedByNmi(PCCPUMCTX pCtx)
 {
-    return (pCtx->fInhibit & CPUMCTX_INHIBIT_NMI) != 0;
+    return (pCtx->eflags.uBoth & CPUMCTX_INHIBIT_NMI) != 0;
 }
 
@@ -2180 +2180 @@
 DECLINLINE(void) CPUMSetInterruptInhibitingByNmi(PCPUMCTX pCtx)
 {
-    pCtx->fInhibit |= CPUMCTX_INHIBIT_NMI;
+    pCtx->eflags.uBoth |= CPUMCTX_INHIBIT_NMI;
 }
 
@@ -2207 +2207 @@
 DECLINLINE(void) CPUMClearInterruptInhibitingByNmi(PCPUMCTX pCtx)
 {
-    pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_NMI;
+    pCtx->eflags.uBoth &= ~CPUMCTX_INHIBIT_NMI;
 }
 
@@ -2236 +2236 @@
 {
     if (!fInhibited)
-        pCtx->fInhibit &= (uint8_t)~CPUMCTX_INHIBIT_NMI;
+        pCtx->eflags.uBoth &= ~CPUMCTX_INHIBIT_NMI;
     else
-        pCtx->fInhibit |= CPUMCTX_INHIBIT_NMI;
+        pCtx->eflags.uBoth |= CPUMCTX_INHIBIT_NMI;
 }
 

trunk/include/VBox/vmm/cpum.mac

@@ -165 +165 @@
     .eip                resq    1
     .eflags             resq    1
-    .fInhibit           resb    1
+    .abPadding          resb    8
     alignb 8
     .uRipInhibitInt     resq    1

trunk/include/VBox/vmm/cpumctx.h

@@ -274 +274 @@
 #endif
 
-/** Mask of internal flags kept with EFLAGS, 64-bit version.   */
-#define CPUMX86EFLAGS_INT_MASK_64   UINT64_C(0x0000000000000000)
-/** Mask of internal flags kept with EFLAGS, 32-bit version.   */
-#define CPUMX86EFLAGS_INT_MASK_32   UINT64_C(0x0000000000000000)
+/** Mask of internal flags kept with EFLAGS, 64-bit version.
+ * The first 3 available bits are taken by CPUMCTX_INHIBIT_SHADOW_SS,
+ * CPUMCTX_INHIBIT_SHADOW_STI and CPUMCTX_INHIBIT_NMI.
+ */
+#define CPUMX86EFLAGS_INT_MASK_64   UINT64_C(0x0000000007000000)
+/** Mask of internal flags kept with EFLAGS, 32-bit version. */
+#define CPUMX86EFLAGS_INT_MASK_32           UINT32_C(0x07000000)
 
 
@@ -414 +417 @@
     } CPUM_UNION_NM(rflags);
 
-    /** Interrupt & exception inhibiting (CPUMCTX_INHIBIT_XXX). */
-    uint8_t             fInhibit;
-    uint8_t             abPadding[7];
-    /** The RIP value fInhibit is/was valid for. */
+    uint8_t             abPadding[8];
+    /** The RIP value an interrupt shadow is/was valid for. */
     uint64_t            uRipInhibitInt;
 
@@ -674 +675 @@
 AssertCompileMemberOffset(CPUMCTX,                                       rip, 0x0140);
 AssertCompileMemberOffset(CPUMCTX,                                    rflags, 0x0148);
-AssertCompileMemberOffset(CPUMCTX,                                  fInhibit, 0x0150);
 AssertCompileMemberOffset(CPUMCTX,                            uRipInhibitInt, 0x0158);
 AssertCompileMemberOffset(CPUMCTX,                                       cr0, 0x0160);
@@ -1016 +1016 @@
  * instructions will have any effect on the instruction following the last one
  * of them. */
-#define CPUMCTX_INHIBIT_SHADOW_SS   UINT8_C(0x01)
+#define CPUMCTX_INHIBIT_SHADOW_SS       RT_BIT_32(0 + CPUMX86EFLAGS_HW_BITS)
 /** Interrupt shadow following STI.
  * Same as CPUMCTX_INHIBIT_SHADOW_SS but without blocking any debug exceptions. */
-#define CPUMCTX_INHIBIT_SHADOW_STI  UINT8_C(0x02)
+#define CPUMCTX_INHIBIT_SHADOW_STI      RT_BIT_32(1 + CPUMX86EFLAGS_HW_BITS)
 /** Mask combining STI and SS shadowing. */
-#define CPUMCTX_INHIBIT_SHADOW      (CPUMCTX_INHIBIT_SHADOW_SS | CPUMCTX_INHIBIT_SHADOW_STI)
+#define CPUMCTX_INHIBIT_SHADOW          (CPUMCTX_INHIBIT_SHADOW_SS | CPUMCTX_INHIBIT_SHADOW_STI)
 
 /** Interrupts blocked by NMI delivery.  This condition is cleared by IRET.
@@ -1030 +1030 @@
  * handler has completed executing."  This flag indicates that these
  * conditions are currently active.  */
-#define CPUMCTX_INHIBIT_NMI         UINT8_C(0x04)
+#define CPUMCTX_INHIBIT_NMI             RT_BIT_32(2 + CPUMX86EFLAGS_HW_BITS)
+
+/** Mask containing all the interrupt inhibit bits. */
+#define CPUMCTX_INHIBIT_ALL_MASK        (CPUMCTX_INHIBIT_SHADOW_SS | CPUMCTX_INHIBIT_SHADOW_STI | CPUMCTX_INHIBIT_NMI)
+AssertCompile(CPUMCTX_INHIBIT_ALL_MASK < UINT32_MAX);
 /** @} */
 

trunk/include/VBox/vmm/vm.h

@@ -521 +521 @@
 /* 22 used to be VMCPU_FF_SELM_SYNC_GDT (raw-mode only). */
 /* 23 used to be VMCPU_FF_SELM_SYNC_LDT (raw-mode only). */
-/* 24 used to be VMCPU_FF_INHIBIT_INTERRUPTS, which moved to CPUMCTX::fInhibit in v7.0.4. */
-/* 25 used to be VMCPU_FF_BLOCK_NMIS, which moved to CPUMCTX::fInhibit in v7.0.4. */
+/* 24 used to be VMCPU_FF_INHIBIT_INTERRUPTS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
+/* 25 used to be VMCPU_FF_BLOCK_NMIS, which moved to CPUMCTX::eflags.uBoth in v7.0.4. */
 /** Force return to Ring-3. */
 #define VMCPU_FF_TO_R3                      RT_BIT_64(VMCPU_FF_TO_R3_BIT)