Changeset 97286 in vbox for trunk/src

Timestamp:

Oct 24, 2022 10:15:44 PM (3 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

154277

Message:

VMM/CPUM,IEM: Moved the CPUMCTX_INHIBIT_XXX flags into reserved EFLAGS space.

Location:

trunk/src/VBox/VMM

Files:

• VMMAll/CPUMAllRegs.cpp (modified) (3 diffs)
• VMMAll/IEMAllCImplSvmInstr.cpp (modified) (2 diffs)
• VMMAll/IEMAllCImplVmxInstr.cpp (modified) (2 diffs)
• VMMR3/CPUM.cpp (modified) (4 diffs)
• include/CPUMInternal.mac (modified) (1 diff)

trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

@@ -197 +197 @@
 VMM_INT_DECL(bool) CPUMAssertGuestRFlagsCookie(PVM pVM, PVMCPU pVCpu)
 {
-    AssertLogRelMsgReturn(      (pVCpu->cpum.s.Guest.rflags.uBoth & ~(uint64_t)(X86_EFL_LIVE_MASK | X86_EFL_RA1_MASK))
+    AssertLogRelMsgReturn(      (  pVCpu->cpum.s.Guest.rflags.uBoth
+                                 & ~(uint64_t)(CPUMX86EFLAGS_HW_MASK_64 | CPUMX86EFLAGS_INT_MASK_64))
                              == pVM->cpum.s.fReservedRFlagsCookie
-                          && (pVCpu->cpum.s.Guest.rflags.uBoth & X86_EFL_RA1_MASK) == X86_EFL_RA1_MASK,
+                          && (pVCpu->cpum.s.Guest.rflags.uBoth & X86_EFL_RA1_MASK) == X86_EFL_RA1_MASK
+                          && (pVCpu->cpum.s.Guest.rflags.uBoth & X86_EFL_RAZ_MASK & CPUMX86EFLAGS_HW_MASK_64) == 0,
                           ("rflags=%#RX64 vs fReservedRFlagsCookie=%#RX64\n",
                            pVCpu->cpum.s.Guest.rflags.uBoth, pVM->cpum.s.fReservedRFlagsCookie),
@@ -1951 +1953 @@
          * or raw-mode). Hence we use the function below which handles the details.
          */
-        if (   pVCpu->cpum.s.Guest.fInhibit == 0
-            || (   !(pVCpu->cpum.s.Guest.fInhibit & CPUMCTX_INHIBIT_NMI)
+        if (   !(pVCpu->cpum.s.Guest.eflags.uBoth & CPUMCTX_INHIBIT_ALL_MASK)
+            || (   !(pVCpu->cpum.s.Guest.eflags.uBoth & CPUMCTX_INHIBIT_NMI)
                 && pVCpu->cpum.s.Guest.uRipInhibitInt != pVCpu->cpum.s.Guest.rip))
         {
@@ -1983 +1985 @@
          *        NONMASKABLE INTERRUPT (NMI)" in SDM 3A seems pretty clear to me.
          */
-        if (!(pVCpu->cpum.s.Guest.fInhibit & CPUMCTX_INHIBIT_NMI))
+        if (!(pVCpu->cpum.s.Guest.eflags.uBoth & CPUMCTX_INHIBIT_NMI))
             return CPUMINTERRUPTIBILITY_INT_INHIBITED;
         return CPUMINTERRUPTIBILITY_NMI_INHIBIT;

trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp

@@ -324 +324 @@
          * Restore the subset of the inhibit flags that were preserved.
          */
-        pVCpu->cpum.GstCtx.fInhibit |= pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit;
+        pVCpu->cpum.GstCtx.eflags.uBoth |= pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit;
 
         if (rcStrict == VINF_SUCCESS)
@@ -729 +729 @@
          * preserve VMCPU_FF_INHIBIT_INTERRUPTS.
          */
-        pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit = pVCpu->cpum.GstCtx.fInhibit & CPUMCTX_INHIBIT_NMI;
-        pVCpu->cpum.GstCtx.fInhibit            &=                              ~CPUMCTX_INHIBIT_NMI;
+        pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit = pVCpu->cpum.GstCtx.eflags.uBoth & CPUMCTX_INHIBIT_NMI;
+        pVCpu->cpum.GstCtx.eflags.uBoth        &=                                  ~CPUMCTX_INHIBIT_NMI;
 
         /*

trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp

@@ -1243 +1243 @@
      * the nested-guest.
      */
-    pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit = pVCpu->cpum.GstCtx.fInhibit & CPUMCTX_INHIBIT_NMI;
+    pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit = pVCpu->cpum.GstCtx.eflags.uBoth & CPUMCTX_INHIBIT_NMI;
 }
 
@@ -1257 +1257 @@
      *        If there is some other code doing that already, it would be great
      *        to point to it here... */
-    pVCpu->cpum.GstCtx.fInhibit |= pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit;
+    pVCpu->cpum.GstCtx.eflags.uBoth        |= pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit;
     pVCpu->cpum.GstCtx.hwvirt.fSavedInhibit = 0;
 }

trunk/src/VBox/VMM/VMMR3/CPUM.cpp

@@ -162 +162 @@
 
 /** For saved state only: Block injection of non-maskable interrupts to the guest.
- * @note This flag was moved to CPUMCTX::fInhibit in v7.0.2. */
+ * @note This flag was moved to CPUMCTX::eflags.uBoth in v7.0.4. */
 #define CPUM_OLD_VMCPU_FF_BLOCK_NMIS            RT_BIT_64(25)
 
@@ -3150 +3150 @@
  *
  * @param   pszEFlags   Where to write the mnemonics. (Assumes sufficient buffer space.)
- * @param   efl         The EFLAGS value with fInhibit in bits 31:24.
+ * @param   efl         The EFLAGS value with both guest hardware and VBox
+ *                      internal bits included.
  */
 static void cpumR3InfoFormatFlags(char *pszEFlags, uint32_t efl)
@@ -3177 +3178 @@
         { "po", "pe", X86_EFL_PF },
         { "cy", "nc", X86_EFL_CF },
-        { "inh-ss",  NULL, (uint32_t)CPUMCTX_INHIBIT_SHADOW_SS  << 24 },
-        { "inh-sti", NULL, (uint32_t)CPUMCTX_INHIBIT_SHADOW_STI << 24 },
-        { "inh-nmi", NULL, (uint32_t)CPUMCTX_INHIBIT_NMI        << 24 },
+        { "inh-ss",  NULL, CPUMCTX_INHIBIT_SHADOW_SS },
+        { "inh-sti", NULL, CPUMCTX_INHIBIT_SHADOW_STI },
+        { "inh-nmi", NULL, CPUMCTX_INHIBIT_NMI },
     };
     char *psz = pszEFlags;
@@ -3212 +3213 @@
      * Format the EFLAGS.
      */
-    uint32_t efl = pCtx->eflags.u;
     char szEFlags[80];
-    cpumR3InfoFormatFlags(&szEFlags[0], efl | ((uint32_t)pCtx->fInhibit << 24));
+    cpumR3InfoFormatFlags(&szEFlags[0], pCtx->eflags.uBoth);
 
     /*
      * Format the registers.
      */
+    uint32_t const efl = pCtx->eflags.u;
     switch (enmType)
     {

trunk/src/VBox/VMM/include/CPUMInternal.mac

@@ -190 +190 @@
     .Guest.eip                  resq    1
     .Guest.eflags               resq    1
-    .Guest.fInhibit             resb    1
+    .Guest.abPadding            resb    8
     alignb 8
     .Guest.uRipInhibitInt       resq    1