Changeset 97433 in vbox for trunk/src/VBox/ValidationKit

Timestamp:

Nov 7, 2022 3:16:23 PM (2 years ago)

Author:

vboxsync

Message:

ValKit/bs3-cpu-basic-2: Single step the relative jmp instructions. bugref:9898

Location:

trunk/src/VBox/ValidationKit/bootsectors

Files:

• bs3-cpu-basic-2-template.mac (modified) (5 diffs)
• bs3-cpu-basic-2-x0.c (modified) (8 diffs)
• bs3-cpu-basic-2.c (modified) (2 diffs)

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-template.mac

@@ -517 +517 @@
 
 ; jmp rel8 (backwards)
+BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jb_back__ud2),.again), function, 2
+        ud2
+        times 7 int3
 BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jb_back__ud2
 BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jb_back__ud2, BS3_PBC_NEAR
-        jmp     .start
-.again: ud2
-        times 7 int3
-        jmp     .again
-.start:
         jmp short .again
 .post_jmp:
         int3
-AssertCompile(.post_jmp - .start == 2)
+AssertCompile(.post_jmp - BS3_LAST_LABEL == 2)
 BS3_PROC_END_CMN   bs3CpuBasic2_jmp_jb_back__ud2
 
@@ -549 +547 @@
 
 ; jmp rel16 (backwards)
+BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_back__ud2),.again), function, 2
+        ud2
+        times 6 int3
 BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jv_back__ud2
 BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jv_back__ud2, BS3_PBC_NEAR
-        jmp     .start
-.again: ud2
-        times 6 int3
-        jmp     .again
-.start:
         jmp near .again
 .post_jmp:
         int3
  %if TMPL_BITS == 16
-AssertCompile(.post_jmp - .start == 3)
+AssertCompile(.post_jmp - BS3_LAST_LABEL == 3)
  %else
-AssertCompile(.post_jmp - .start == 5)
+AssertCompile(.post_jmp - BS3_LAST_LABEL == 5)
  %endif
 BS3_PROC_END_CMN   bs3CpuBasic2_jmp_jv_back__ud2
@@ -599 +595 @@
 
 ; jmp rel8 (backwards) with opsize override.
+BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jb_opsize_back__ud2),.again), function, 2
+        ud2
+        times 19 int3
 BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jb_opsize_back__ud2
 BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jb_opsize_back__ud2, BS3_PBC_NEAR
-        jmp     .start
-.again: ud2
-        times 19 int3
-        jmp     .again
-.start:
-        db 66h
+        db      66h
         jmp short .again
 .post_jmp:
         int3
-AssertCompile(.post_jmp - .start == 3)
+AssertCompile(.post_jmp - BS3_LAST_LABEL == 3)
 BS3_PROC_END_CMN   bs3CpuBasic2_jmp_jb_opsize_back__ud2
 
@@ -617 +611 @@
 BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jv_opsize__ud2
 BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jv_opsize__ud2, BS3_PBC_NEAR
-        db 66h, 0e9h                    ; o32 jmp near .again
+        db      66h, 0e9h               ; o32 jmp near .again
  %if TMPL_BITS != 32
-        dd 11
+        dd      11
  %else
-        dw 11
+        dw      11
  %endif
 .post_jmp:
@@ -632 +626 @@
 
 ; jmp rel16 (backwards) with opsize override.
+BS3_GLOBAL_NAME_EX RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_opsize_back__ud2),.again), function, 2
+        ud2
+        times 19 int3
 BS3_CPUBAS2_UD_OFF bs3CpuBasic2_jmp_jv_opsize_back__ud2
 BS3_PROC_BEGIN_CMN bs3CpuBasic2_jmp_jv_opsize_back__ud2, BS3_PBC_NEAR
-        jmp     .start
-.again: ud2
-        int3
-        jmp     .again
-.start:
  %if TMPL_BITS != 32
         db      66h, 0e9h               ; o32 jmp near .again
-        dd      -(6 + 1 + 2 + 2)
+        dd      RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_opsize_back__ud2),.again) - .post_jmp
  %else
         db      66h, 0e9h               ; o16 jmp near .again
-        dw      -(4 + 1 + 2 + 2)
- %endif
-.post_jmp:
-        times 11 int3
+        dw      RT_CONCAT(BS3_CMN_NM(bs3CpuBasic2_jmp_jv_opsize_back__ud2),.again) - .post_jmp
+ %endif
+.post_jmp:
+        int3
 BS3_PROC_END_CMN   bs3CpuBasic2_jmp_jv_opsize_back__ud2
 

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2-x0.c

@@ -510 +510 @@
 
     if (   g_f16BitSys
+        || bXcpt == X86_XCPT_DB /* hack (10980xe)... */
         || (   !f486ResumeFlagHint
             && (g_uBs3CpuDetected & BS3CPU_TYPE_MASK) <= BS3CPU_80486 ) )
@@ -594 +595 @@
 {
     bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, 0 /*always zero*/, X86_XCPT_AC, true /*f486ResumeFlagHint*/, cbIpAdjust);
+}
+
+/**
+ * Compares \#DB trap.
+ */
+static void bs3CpuBasic2_CompareDbCtx(PCBS3TRAPFRAME pTrapCtx, PCBS3REGCTX pStartCtx)
+{
+    bs3CpuBasic2_CompareCpuTrapCtx(pTrapCtx, pStartCtx, 0 /*always zero*/, X86_XCPT_DB, false /*f486ResumeFlagHint?*/, 0 /*cbIpAdjust*/);
 }
 
@@ -3667 +3676 @@
  *          with control registers and such.
  */
-BS3_DECL_FAR(uint8_t) BS3_CMN_FAR_NM(bs3CpuBasic2_jmp)(uint8_t bMode)
+BS3_DECL_FAR(uint8_t) BS3_CMN_FAR_NM(bs3CpuBasic2_jmp_rel)(uint8_t bMode)
 {
     BS3TRAPFRAME        TrapCtx;
@@ -3734 +3743 @@
                 Bs3RegCtxSetRipCsFromLnkPtr(&Ctx, s_aTests[iTest].pfnTest);
                 fpbCode = (uint8_t const BS3_FAR *)BS3_FP_MAKE(Ctx.cs, Ctx.rip.u16);
-                CtxExpected.rip.u = Ctx.rip.u + fpbCode[-1];
+                CtxExpected.rip.u = Ctx.rip.u + (int64_t)(int8_t)fpbCode[-1];
             }
             else
@@ -3754 +3763 @@
 
             Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx);
-
             if (s_aTests[iTest].iWrap == 0 || !s_aTests[iTest].fOpSizePfx)
                 bs3CpuBasic2_CompareUdCtx(&TrapCtx, &CtxExpected);
             else
                 bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxExpected, 0);
-
+            g_usBs3TestStep++;
+
+            /* Again single stepping: */
+            Ctx.rflags.u16        |= X86_EFL_TF;
+            CtxExpected.rflags.u16 = Ctx.rflags.u16;
+            Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx);
+            if (s_aTests[iTest].iWrap == 0 || !s_aTests[iTest].fOpSizePfx)
+            {
+                /** @todo check DR6.BS. */
+                bs3CpuBasic2_CompareDbCtx(&TrapCtx, &CtxExpected);
+            }
+            else
+                bs3CpuBasic2_CompareGpCtx(&TrapCtx, &CtxExpected, 0);
+            Ctx.rflags.u16        &= ~X86_EFL_TF;
+            CtxExpected.rflags.u16 = Ctx.rflags.u16;
             g_usBs3TestStep++;
         }
@@ -3861 +3883 @@
                 {
                     uint16_t const offFn = BS3_FP_OFF(s_aTests[iTest].pfnTest);
-                    uint16_t const offUd = offFn + pbCode16[offFn - 1];
+                    uint16_t const offUd = offFn + (int16_t)(int8_t)pbCode16[offFn - 1];
                     pbCode16[offUd]     = 0xf1; /* replace original ud2 with icebp */
                     pbCode16[offUd + 1] = 0xf1;
@@ -3876 +3898 @@
                 uint8_t const BS3_FAR *fpbCode = Bs3SelLnkPtrToCurPtr(s_aTests[iTest].pfnTest);
                 Ctx.rip.u = Bs3SelLnkPtrToFlat(s_aTests[iTest].pfnTest);
-                CtxExpected.rip.u = Ctx.rip.u + fpbCode[-1];
+                CtxExpected.rip.u = Ctx.rip.u + (int64_t)(int8_t)fpbCode[-1];
                 if (s_aTests[iTest].fOpSizePfx && !fIgnPfx)
                     CtxExpected.rip.u &= UINT16_MAX;
@@ -3887 +3909 @@
                 bs3CpuBasic2_CompareUdCtx(&TrapCtx, &CtxExpected);
                 g_usBs3TestStep++;
+
+                /* Again single stepping: */
+                Ctx.rflags.u16        |= X86_EFL_TF;
+                CtxExpected.rflags.u16 = Ctx.rflags.u16;
+                Bs3TrapSetJmpAndRestore(&Ctx, &TrapCtx);
+                /** @todo check DR6.BS. */
+                bs3CpuBasic2_CompareDbCtx(&TrapCtx, &CtxExpected);
+                Ctx.rflags.u16        &= ~X86_EFL_TF;
+                CtxExpected.rflags.u16 = Ctx.rflags.u16;
+                g_usBs3TestStep++;
             }
         }

trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-basic-2.c

@@ -55 +55 @@
 FNBS3TESTDOMODE             bs3CpuBasic2_lgdt_f16;
 FNBS3TESTDOMODE             bs3CpuBasic2_iret_f16;
-FNBS3TESTDOMODE             bs3CpuBasic2_jmp_f16;
+FNBS3TESTDOMODE             bs3CpuBasic2_jmp_rel_f16;
 
 BS3_DECL_CALLBACK(void)     bs3CpuBasic2_Do32BitTests_pe32();
@@ -76 +76 @@
 #if 1
     //{ "iret", bs3CpuBasic2_iret_f16, 0 },
-    { "jmp",  bs3CpuBasic2_jmp_f16, 0 },
+    { "jmp jb / jv",  bs3CpuBasic2_jmp_rel_f16, 0 },
 #endif
 #if 0