Changeset 97584 in vbox

Timestamp:

Nov 16, 2022 11:59:04 PM (2 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

154617

Message:

VMM/IEM: Corrected opsize behaviour for near returns for intel cpus in 64-bit mode; implemented single stepping for same. bugref:9898

Location:

trunk/src/VBox/VMM/VMMAll

Files:

• IEMAllCImpl.cpp (modified) (1 diff)
• IEMAllInstructionsOneByte.cpp.h (modified) (2 diffs)

trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp

@@ -2716 +2716 @@
     pVCpu->cpum.GstCtx.rip = NewRip.u;
     pVCpu->cpum.GstCtx.rsp = NewRsp.u;
-    pVCpu->cpum.GstCtx.eflags.Bits.u1RF = 0;
 
     /* Flush the prefetch buffer. */
     IEM_FLUSH_PREFETCH_HEAVY(pVCpu, cbInstr); /** @todo only need a light flush here, don't we?  We don't really need any flushing... */
     RT_NOREF(cbInstr);
-    return VINF_SUCCESS;
+
+    return iemRegFinishClearingRF(pVCpu);
 }
 

trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsOneByte.cpp.h

@@ -6204 +6204 @@
     IEMOP_MNEMONIC(retn_Iw, "retn Iw");
     uint16_t u16Imm; IEM_OPCODE_GET_NEXT_U16(&u16Imm);
-    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
-    IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
+    IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
+    IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     switch (pVCpu->iem.s.enmEffOpSize)
     {
@@ -6225 +6225 @@
 {
     IEMOP_MNEMONIC(retn, "retn");
-    IEMOP_HLP_DEFAULT_64BIT_OP_SIZE();
+    IEMOP_HLP_DEFAULT_64BIT_OP_SIZE_AND_INTEL_IGNORES_OP_SIZE_PREFIX();
     IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
     switch (pVCpu->iem.s.enmEffOpSize)