Changeset 97621 in vbox for trunk/src/VBox

Timestamp:

Nov 21, 2022 10:27:52 AM (2 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

154667

Message:

DevVGA: Register GR4 (read map select), as the name suggests, does not affect writes.

File:

• trunk/src/VBox/Devices/Graphics/DevVGA.cpp (modified) (4 diffs)

trunk/src/VBox/Devices/Graphics/DevVGA.cpp

@@ -1391 +1391 @@
         }
     } else if (!(pThis->sr[4] & 0x04)) {    /* Host access is controlled by SR4, not GR5! */
-        /* odd/even mode (aka text mode mapping) */
-        plane = (pThis->gr[4] & 2) | (addr & 1);
+        /* odd/even mode (aka text mode mapping); GR4 does not affect writes! */
+        plane = addr & 1;
         mask = (1 << plane);
         if (pThis->sr[2] & mask) {
@@ -3516 +3516 @@
             for (i = 0; i < cbItem; i++)
             {
-                unsigned plane = (pThis->gr[4] & 2) | (GCPhysAddr & 1);
+                unsigned plane = GCPhysAddr & 1;
                 if (pThis->sr[2] & (1 << plane)) {
                     RTGCPHYS PhysAddr2 = ((GCPhysAddr & ~1) * 4) | plane;
@@ -4348 +4348 @@
     vga_retrace_s   *r = &pThis->retrace_state;
     const char      *clocks[] = { "25.175 MHz", "28.322 MHz", "External", "Reserved?!" };
+    const char      *mem_map[] = { "A000-BFFF", "A000-AFFF", "B000-B7FF", "B800-BFFF" };
     NOREF(pszArgs);
 
@@ -4353 +4354 @@
     char_dots = (pThis->sr[0x01] & 1) ? 8 : 9;
     double_scan = pThis->cr[9] >> 7;
+    pHlp->pfnPrintf(pHlp, "decoding memory at %s\n", mem_map[(pThis->gr[6] >> 2) & 3]);
     pHlp->pfnPrintf(pHlp, "Misc status reg. MSR:%02X\n", pThis->msr);
     pHlp->pfnPrintf(pHlp, "pixel clock: %s\n", clocks[(pThis->msr >> 2) & 3]);