Changeset 97736 in vbox for trunk/src/VBox/VMM/VMMAll

Timestamp:

Dec 3, 2022 2:00:54 AM (2 years ago)

Author:

vboxsync

Message:

VMM/PGM,IEM: Must flush the physical address aspect of the IEM TLBs in scenarios where MMIO2 pages are aliased onto MMIO ones (DevVGA trick). bugref:9898

File:

• trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp (modified) (10 diffs)

trunk/src/VBox/VMM/VMMAll/PGMAllHandler.cpp

@@ -34 +34 @@
 #include <VBox/vmm/dbgf.h>
 #include <VBox/vmm/pgm.h>
+#include <VBox/vmm/iem.h>
 #include <VBox/vmm/iom.h>
 #include <VBox/vmm/mm.h>
@@ -736 +737 @@
  *                          reset where pgmR3PhysRamReset doesn't have the
  *                          handler structure handy.)
- */
-void pgmHandlerPhysicalResetAliasedPage(PVMCC pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, PPGMRAMRANGE pRam, bool fDoAccounting)
+ * @param   fFlushIemTlbs   Whether to perform IEM TLB flushing or not.  This
+ *                          can be cleared only if the caller does the flushing
+ *                          after calling this function.
+ */
+void pgmHandlerPhysicalResetAliasedPage(PVMCC pVM, PPGMPAGE pPage, RTGCPHYS GCPhysPage, PPGMRAMRANGE pRam,
+                                        bool fDoAccounting, bool fFlushIemTlbs)
 {
     Assert(   PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO
@@ -763 +768 @@
     PGM_PAGE_SET_HNDL_PHYS_STATE_ONLY(pPage, PGM_PAGE_HNDL_PHYS_STATE_ALL);
 
-    /* Flush its TLB entry. */
+    /*
+     * Flush its TLB entry.
+     */
     pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
-    /* Not calling IEMTlbInvalidateAllPhysicalAllCpus here as aliased pages are handled like MMIO by the IEM TLB. */
+    if (fFlushIemTlbs)
+        IEMTlbInvalidateAllPhysicalAllCpus(pVM, NIL_VMCPUID);
 
     /*
@@ -834 +842 @@
             {
                 Assert(pCur->cAliasedPages > 0);
-                pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, pRamHint, false /*fDoAccounting*/);
+                pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhys, pRamHint, false /*fDoAccounting*/, true /*fFlushIemTlbs*/);
                 pCur->cAliasedPages--;
                 fNemNotifiedAlready = true;
@@ -1223 +1231 @@
                     if (pCur->cAliasedPages)
                     {
-                        PPGMPAGE    pPage      = &pRam->aPages[(pCur->Key - pRam->GCPhys) >> GUEST_PAGE_SHIFT];
-                        RTGCPHYS    GCPhysPage = pCur->Key;
-                        uint32_t    cLeft      = pCur->cPages;
+                        PPGMPAGE    pPage        = &pRam->aPages[(pCur->Key - pRam->GCPhys) >> GUEST_PAGE_SHIFT];
+                        RTGCPHYS    GCPhysPage   = pCur->Key;
+                        uint32_t    cLeft        = pCur->cPages;
+                        bool        fFlushIemTlb = false;
                         while (cLeft-- > 0)
                         {
@@ -1231 +1240 @@
                                 || PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_SPECIAL_ALIAS_MMIO)
                             {
+                                fFlushIemTlb |= PGM_PAGE_GET_TYPE(pPage) == PGMPAGETYPE_MMIO2_ALIAS_MMIO;
                                 Assert(pCur->cAliasedPages > 0);
-                                pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, pRam, false /*fDoAccounting*/);
+                                pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, pRam,
+                                                                   false /*fDoAccounting*/, false /*fFlushIemTlbs*/);
                                 --pCur->cAliasedPages;
 #ifndef VBOX_STRICT
@@ -1244 +1255 @@
                         }
                         Assert(pCur->cAliasedPages == 0);
+
+                        /*
+                         * Flush IEM TLBs in case they contain any references to aliased pages.
+                         * This is only necessary for MMIO2 aliases.
+                         */
+                        if (fFlushIemTlb)
+                            IEMTlbInvalidateAllPhysicalAllCpus(pVM, NIL_VMCPUID);
                     }
                 }
@@ -1592 +1610 @@
                 Log(("PGMHandlerPhysicalPageAliasMmio2: GCPhysPage=%RGp (%R[pgmpage]; %RHp -> %RHp\n",
                      GCPhysPage, pPage, PGM_PAGE_GET_HCPHYS(pPage), PGM_PAGE_GET_HCPHYS(pPageRemap)));
-                pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, pRam, false /*fDoAccounting*/);
+                pgmHandlerPhysicalResetAliasedPage(pVM, pPage, GCPhysPage, pRam,
+                                                   false /*fDoAccounting*/, false /*fFlushIemTlbs*/);
                 pCur->cAliasedPages--;
+
+                /* Since this may be present in the TLB and now be wrong, invalid
+                   the guest physical address part of the IEM TLBs.  Note, we do
+                   this here as we will not invalid */
+                IEMTlbInvalidateAllPhysicalAllCpus(pVM, NIL_VMCPUID);
             }
             Assert(PGM_PAGE_IS_ZERO(pPage));
@@ -1611 +1635 @@
             Assert(pCur->cAliasedPages <= pCur->cPages);
 
-            /* Flush its TLB entry. */
+            /*
+             * Flush its TLB entry.
+             *
+             * Not calling IEMTlbInvalidateAllPhysicalAllCpus here to conserve
+             * all the other IEM TLB entires.  When this one is kicked out and
+             * reloaded, it will be using the MMIO2 alias, but till then we'll
+             * continue doing MMIO.
+             */
             pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
-            /* Not calling IEMTlbInvalidateAllPhysicalAllCpus here as aliased pages are handled like MMIO by the IEM TLB. */
+            /** @todo Do some preformance checks of calling
+             *        IEMTlbInvalidateAllPhysicalAllCpus when in IEM mode, to see if it
+             *        actually makes sense or not.  Screen updates are typically massive
+             *        and important when this kind of aliasing is used, so it may pay of... */
 
 #ifdef VBOX_WITH_NATIVE_NEM
@@ -1735 +1769 @@
             Assert(pCur->cAliasedPages <= pCur->cPages);
 
-            /* Flush its TLB entry. */
+            /*
+             * Flush its TLB entry.
+             *
+             * Not calling IEMTlbInvalidateAllPhysicalAllCpus here as special
+             * aliased MMIO pages are handled like MMIO by the IEM TLB.
+             */
             pgmPhysInvalidatePageMapTLBEntry(pVM, GCPhysPage);
-            /* Not calling IEMTlbInvalidateAllPhysicalAllCpus here as aliased pages are handled like MMIO by the IEM TLB. */
 
 #ifdef VBOX_WITH_NATIVE_NEM