VirtualBox

Changeset 980 in vbox


Ignore:
Timestamp:
Feb 19, 2007 2:45:38 PM (18 years ago)
Author:
vboxsync
svn:sync-xref-src-repo-rev:
18765
Message:

fIgnoreAll and fIgnoreSetPage and fInStatSync - ignore all callbacks when (un)registering memory.

Location:
trunk/src
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/VMM/REMInternal.h

    r164 r980  
    158158     * I.e. the correct CPU state and some other bits are with REM. */
    159159    bool                    fInREM;
    160 
     160    /** In REMR3State. */
     161    bool                    fInStateSync;
     162
     163    /** Ignore all that can be ignored. */
     164    bool                    fIgnoreAll;
    161165    /** Ignore CR3 load notifications from the REM. */
    162166    bool                    fIgnoreCR3Load;
    … …  
    165169    /** Ignore CR0, CR4 and EFER load. */
    166170    bool                    fIgnoreCpuMode;
     171    /** Ignore set page. */
     172    bool                    fIgnoreSetPage;
     173
    167174    /** Number of times REMR3CanExecuteRaw has been called.
    168175     * It is used to prevent rescheduling on the first call. */
    … …  
    172179    RTUINT                  u32PendingInterrupt;
    173180
    174 #if HC_ARCH_BITS == 32
    175     /** Padding for MS / GC alignment difference. */
     181#if HC_ARCH_BITS == 64
     182    /** Alignment padding. */
    176183    uint32_t                u32Padding;
    177184#endif
    … …  
    186193    /** Array of recorded handler noticications.
    187194     * These are replayed when entering REM. */
    188     REMHANDLERNOTIFICATION  aHandlerNotifications[32];
     195//    REMHANDLERNOTIFICATION  aHandlerNotifications[32];
     196    REMHANDLERNOTIFICATION  aHandlerNotifications[12];
    189197
    190198    /** Pointer to an array of hc virt to gc phys records. */
    … …  
    228236#if HC_ARCH_BITS != 32
    229237    /** Padding the CPUX86State structure to 32 byte. */
    230     uint32_t                abPadding[HC_ARCH_BITS == 32 ? 0 : 6];
     238    uint32_t                abPadding[HC_ARCH_BITS == 32 ? 0 : 4];
    231239#endif
    232240

  • trunk/src/recompiler/new/VBoxRecompiler.c

    r841 r980  
    253253     */
    254254    AssertReleaseMsg(sizeof(pVM->rem.padding) >= sizeof(pVM->rem.s), ("%#x >= %#x; sizeof(Env)=%#x\n", sizeof(pVM->rem.padding), sizeof(pVM->rem.s), sizeof(pVM->rem.s.Env)));
    255     //AssertReleaseMsg(sizeof(pVM->rem.s.Env) <= REM_ENV_SIZE, ("%#x == %#x\n", sizeof(pVM->rem.s.Env), REM_ENV_SIZE));
     255    AssertReleaseMsg(sizeof(pVM->rem.s.Env) <= REM_ENV_SIZE, ("%#x == %#x\n", sizeof(pVM->rem.s.Env), REM_ENV_SIZE));
    256256    AssertReleaseMsg(!(RT_OFFSETOF(VM, rem) & 31), ("off=%#x\n", RT_OFFSETOF(VM, rem)));
    257257    Assert(!testmath());
    … …  
    285285    AssertMsg(MMR3PhysGetRamSize(pVM) == 0, ("Init order have changed! REM depends on notification about ALL physical memory registrations\n"));
    286286
     287    /* ignore all notifications */
     288    pVM->rem.s.fIgnoreAll = true;
     289
    287290    /*
    288291     * Init the recompiler.
    … …  
    319322    AssertReleaseMsg(pVM->rem.s.iHandlerMemType >= 0, ("pVM->rem.s.iHandlerMemType=%d\n", pVM->rem.s.iHandlerMemType));
    320323    Log2(("REM: iMMIOMemType=%d iHandlerMemType=%d\n", pVM->rem.s.iMMIOMemType, pVM->rem.s.iHandlerMemType));
     324
     325    /* stop ignoring. */
     326    pVM->rem.s.fIgnoreAll = false;
    321327
    322328    /*
    … …  
    422428REMR3DECL(void) REMR3Reset(PVM pVM)
    423429{
    424     pVM->rem.s.fIgnoreCR3Load = true;
    425     pVM->rem.s.fIgnoreInvlPg = true;
    426     pVM->rem.s.fIgnoreCpuMode = true;
    427 
    428430    /*
    429431     * Reset the REM cpu.
    430432     */
     433    pVM->rem.s.fIgnoreAll = true;
    431434    cpu_reset(&pVM->rem.s.Env);
    432435    pVM->rem.s.cInvalidatedPages = 0;
    433 
    434     pVM->rem.s.fIgnoreCR3Load = false;
    435     pVM->rem.s.fIgnoreInvlPg = false;
    436     pVM->rem.s.fIgnoreCpuMode = false;
     436    pVM->rem.s.fIgnoreAll = false;
    437437}
    438438
    … …  
    502502    /*
    503503     * Ignore all ignorable notifications.
    504      * Not doing this will cause big trouble.
    505      */
    506     pVM->rem.s.fIgnoreCR3Load = true;
    507     pVM->rem.s.fIgnoreInvlPg = true;
    508     pVM->rem.s.fIgnoreCpuMode = true;
     504     * (Not doing this will cause serious trouble.)
     505     */
     506    pVM->rem.s.fIgnoreAll = true;
    509507
    510508    /*
    … …  
    576574     * Stop ignoring ignornable notifications.
    577575     */
    578     pVM->rem.s.fIgnoreCpuMode = false;
    579     pVM->rem.s.fIgnoreInvlPg = false;
    580     pVM->rem.s.fIgnoreCR3Load = false;
     576    pVM->rem.s.fIgnoreAll = false;
    581577
    582578    return VINF_SUCCESS;
    … …  
    13371333     * state we disable this path.
    13381334     */
    1339     if (pVM->rem.s.fIgnoreInvlPg)
     1335    if (pVM->rem.s.fIgnoreInvlPg || pVM->rem.s.fIgnoreAll)
    13401336        return;
    13411337    Log(("remR3FlushPage: GCPtr=%VGv\n", GCPtr));
     1338    Assert(pVM->rem.s.fInREM);
    13421339
    13431340    //RAWEx_ProfileStop(env, STATS_QEMU_TOTAL);
    … …  
    13711368{
    13721369    target_ulong phys_addr, virt_addr, addend;
     1370    if (env->pVM->rem.s.fIgnoreSetPage || env->pVM->rem.s.fIgnoreAll)
     1371        return;
     1372    Assert(env->pVM->rem.s.fInREM || env->pVM->rem.s.fInStateSync);
    13731373
    13741374    if(!is_user && !(env->state & CPU_RAW_RING0))
    … …  
    14721472void remR3ProtectCode(CPUState *env, RTGCPTR GCPtr)
    14731473{
     1474    Assert(env->pVM->rem.s.fInREM);
    14741475    if (     (env->cr[0] & X86_CR0_PG)                      /* paging must be enabled */
    14751476        &&  !(env->state & CPU_EMULATE_SINGLE_INSTR)        /* ignore during single instruction execution */
    … …  
    14951496     * state we disable this path.
    14961497     */
    1497     if (pVM->rem.s.fIgnoreCR3Load)
     1498    if (pVM->rem.s.fIgnoreCR3Load || pVM->rem.s.fIgnoreAll)
    14981499        return;
     1500    Assert(pVM->rem.s.fInREM);
    14991501
    15001502    /*
    … …  
    15341536     * state this path is disabled.
    15351537     */
    1536     if (pVM->rem.s.fIgnoreCpuMode)
     1538    if (pVM->rem.s.fIgnoreCpuMode || pVM->rem.s.fIgnoreAll)
    15371539        return;
     1540    Assert(pVM->rem.s.fInREM);
    15381541
    15391542    /*
    … …  
    16771680    register const CPUMCTX *pCtx = pVM->rem.s.pCtx;
    16781681    register unsigned fFlags;
     1682
     1683    pVM->rem.s.fInStateSync = true;
    16791684
    16801685    /*
    … …  
    20762081     */
    20772082    pVM->rem.s.fInREM = true;
     2083    pVM->rem.s.fInStateSync = false;
    20782084    pVM->rem.s.cCanExecuteRaw = 0;
    20792085    STAM_PROFILE_STOP(&pVM->rem.s.StatsState, a);
    … …  
    26252631     * Register the ram.
    26262632     */
     2633    Assert(!pVM->rem.s.fIgnoreAll);
     2634    pVM->rem.s.fIgnoreAll = true;
     2635
    26272636    AssertRelease(phys_ram_base);
    26282637    cpu_register_physical_memory(GCPhys, cb, ((uintptr_t)pvRam - (uintptr_t)phys_ram_base)
    26292638                                             | (fFlags & MM_RAM_FLAGS_RESERVED ? IO_MEM_UNASSIGNED : 0));
     2639    Assert(pVM->rem.s.fIgnoreAll);
     2640    pVM->rem.s.fIgnoreAll = false;
    26302641}
    26312642
    … …  
    26562667     * Register the rom.
    26572668     */
     2669    Assert(!pVM->rem.s.fIgnoreAll);
     2670    pVM->rem.s.fIgnoreAll = true;
     2671
    26582672    AssertRelease(phys_ram_base);
    26592673    cpu_register_physical_memory(GCPhys, cb, ((uintptr_t)pvCopy - (uintptr_t)phys_ram_base) | IO_MEM_ROM);
    26602674    Log2(("%.64Vhxd\n", (char *)pvCopy + cb - 64));
     2675
     2676    Assert(pVM->rem.s.fIgnoreAll);
     2677    pVM->rem.s.fIgnoreAll = false;
    26612678}
    26622679
    … …  
    26842701     * Unassigning the memory.
    26852702     */
     2703    Assert(!pVM->rem.s.fIgnoreAll);
     2704    pVM->rem.s.fIgnoreAll = true;
     2705
    26862706    cpu_register_physical_memory(GCPhys, cb, IO_MEM_UNASSIGNED);
     2707
     2708    Assert(pVM->rem.s.fIgnoreAll);
     2709    pVM->rem.s.fIgnoreAll = false;
    26872710}
    26882711
    … …  
    27082731    Assert(RT_ALIGN_T(cb, PAGE_SIZE, RTGCPHYS) == cb);
    27092732
    2710     bool fIgnoreCR3Load = pVM->rem.s.fIgnoreCR3Load;
    2711     pVM->rem.s.fIgnoreCR3Load = true;
    2712 
    27132733    if (pVM->rem.s.cHandlerNotifications)
    27142734        REMR3ReplayHandlerNotifications(pVM);
     2735
     2736    Assert(!pVM->rem.s.fIgnoreAll);
     2737    pVM->rem.s.fIgnoreAll = true;
    27152738
    27162739    if (enmType == PGMPHYSHANDLERTYPE_MMIO)
    … …  
    27192742        cpu_register_physical_memory(GCPhys, cb, pVM->rem.s.iHandlerMemType);
    27202743
    2721     pVM->rem.s.fIgnoreCR3Load = fIgnoreCR3Load;
     2744    Assert(pVM->rem.s.fIgnoreAll);
     2745    pVM->rem.s.fIgnoreAll = false;
    27222746}
    27232747
    … …  
    27392763    VM_ASSERT_EMT(pVM);
    27402764
    2741     bool fIgnoreCR3Load = pVM->rem.s.fIgnoreCR3Load;
    2742     pVM->rem.s.fIgnoreCR3Load = true;
    2743 
    27442765    if (pVM->rem.s.cHandlerNotifications)
    27452766        REMR3ReplayHandlerNotifications(pVM);
     2767
     2768    Assert(!pVM->rem.s.fIgnoreAll);
     2769    pVM->rem.s.fIgnoreAll = true;
    27462770
    27472771    if (enmType == PGMPHYSHANDLERTYPE_MMIO)
    … …  
    27642788    }
    27652789
    2766     pVM->rem.s.fIgnoreCR3Load = fIgnoreCR3Load;
     2790    Assert(pVM->rem.s.fIgnoreAll);
     2791    pVM->rem.s.fIgnoreAll = false;
    27672792}
    27682793
    … …  
    27862811    AssertReleaseMsg(enmType != PGMPHYSHANDLERTYPE_MMIO, ("enmType=%d\n", enmType));
    27872812
    2788     bool fIgnoreCR3Load = pVM->rem.s.fIgnoreCR3Load;
    2789     pVM->rem.s.fIgnoreCR3Load = true;
    2790 
    27912813    if (pVM->rem.s.cHandlerNotifications)
    27922814        REMR3ReplayHandlerNotifications(pVM);
    … …  
    27942816    if (fHasHCHandler)
    27952817    {
     2818        Assert(!pVM->rem.s.fIgnoreAll);
     2819        pVM->rem.s.fIgnoreAll = true;
     2820
    27962821        /*
    27972822         * Reset the old page.
    … …  
    28152840        Assert(RT_ALIGN_T(cb, PAGE_SIZE, RTGCPHYS) == cb);
    28162841        cpu_register_physical_memory(GCPhysNew, cb, pVM->rem.s.iHandlerMemType);
    2817     }
    2818 
    2819     pVM->rem.s.fIgnoreCR3Load = fIgnoreCR3Load;
     2842
     2843        Assert(pVM->rem.s.fIgnoreAll);
     2844        pVM->rem.s.fIgnoreAll = false;
     2845    }
    28202846}
    28212847
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