Changeset 9863 in vbox
- Timestamp:
- Jun 20, 2008 3:38:32 PM (17 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/PGMAllBth.h
r9860 r9863 1019 1019 if (pShwPdpt->GCPhys != GCPhysPdpt) 1020 1020 { 1021 LogFlow(("InvalidatePage: Out-of-sync PML4E (GCPhys) at %VGv %VGp vs %VGp P dpeSrc=%RX64 PdpeDst=%RX64\n",1022 GCPtrPage, pShwPdpt->GCPhys, GCPhysPdpt, (uint64_t) PdpeSrc.u, (uint64_t)pPdpeDst->u));1021 LogFlow(("InvalidatePage: Out-of-sync PML4E (GCPhys) at %VGv %VGp vs %VGp Pml4eSrc=%RX64 Pml4eDst=%RX64\n", 1022 GCPtrPage, pShwPdpt->GCPhys, GCPhysPdpt, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u)); 1023 1023 pgmPoolFreeByPage(pPool, pShwPdpt, PGMPOOL_IDX_PML4, iPml4e); 1024 1024 pPml4eDst->u = 0; … … 3079 3079 { 3080 3080 PPGMPOOLPAGE pShwPdpt = NULL; 3081 PX86PML4E pPml4eSrc, pPml4eDst; 3082 RTGCPHYS GCPhysPdptSrc; 3083 3084 pPml4eSrc = &pVM->pgm.s.CTXSUFF(pGstPaePML4)->a[iPML4E]; 3085 pPml4eDst = &pVM->pgm.s.CTXMID(p,PaePML4)->a[iPML4E]; 3081 3086 3082 3087 /* Fetch the pgm pool shadow descriptor if the shadow pml4e is present. */ 3083 if (pVM->pgm.s.CTXMID(p,PaePML4)->a[iPML4E].n.u1Present) 3084 pShwPdpt = pgmPoolGetPage(pPool, pVM->pgm.s.CTXMID(p,PaePML4)->a[iPML4E].u & X86_PML4E_PG_MASK); 3085 3086 /* Guest PML4E not present (anymore). */ 3087 if (!pVM->pgm.s.CTXSUFF(pGstPaePML4)->a[iPML4E].n.u1Present) 3088 { 3089 /* Shadow PML4E present? */ 3090 if (pVM->pgm.s.CTXMID(p,PaePML4)->a[iPML4E].n.u1Present) 3091 { 3092 /* Shadow PML4 present, so free it. */ 3093 pgmPoolFreeByPage(pPool, pShwPdpt, PGMPOOL_IDX_PML4, iPML4E); 3094 pVM->pgm.s.CTXMID(p,PaePML4)->a[iPML4E].u = 0; 3095 } 3088 if (!pVM->pgm.s.CTXMID(p,PaePML4)->a[iPML4E].n.u1Present) 3089 continue; 3090 pShwPdpt = pgmPoolGetPage(pPool, pPml4eDst->u & X86_PML4E_PG_MASK); 3091 3092 GCPhysPdptSrc = pPml4eSrc->u & X86_PML4E_PG_MASK; 3093 3094 /* Anything significant changed? */ 3095 if ( pPml4eSrc->n.u1Present != pPml4eDst->n.u1Present 3096 || GCPhysPdptSrc != pShwPdpt->GCPhys) 3097 { 3098 /* Free it. */ 3099 LogFlow(("SyncCR3: Out-of-sync PML4E (GCPhys) %VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n", 3100 pShwPdpt->GCPhys, GCPhysPdptSrc, (uint64_t)pPml4eSrc->u, (uint64_t)pPml4eDst->u)); 3101 pgmPoolFreeByPage(pPool, pShwPdpt, PGMPOOL_IDX_PML4, iPML4E); 3102 pPml4eDst->u = 0; 3096 3103 continue; 3097 3104 } 3105 /* Force an attribute sync. */ 3106 pPml4eDst->n.u1User = pPml4eSrc->n.u1User; 3107 pPml4eDst->n.u1Write = pPml4eSrc->n.u1Write; 3108 pPml4eDst->n.u1NoExecute = pPml4eSrc->n.u1NoExecute; 3098 3109 3099 3110 # else … … 3105 3116 unsigned iPDSrc; 3106 3117 PPGMPOOLPAGE pShwPde = NULL; 3118 PX86PDPE pPdpeDst; 3119 RTGCPHYS GCPhysPdeSrc; 3107 3120 # if PGM_GST_TYPE == PGM_TYPE_PAE 3108 3121 PX86PDPAE pPDPAE = pVM->pgm.s.CTXMID(ap,PaePDs)[0]; … … 3110 3123 PGSTPD pPDSrc = pgmGstGetPaePDPtr(&pVM->pgm.s, iPDPTE << X86_PDPT_SHIFT, &iPDSrc); 3111 3124 PX86PDPT pPdptDst = pVM->pgm.s.CTXMID(p,PaePDPT); 3125 X86PDPE PdpeSrc = CTXSUFF(pVM->pgm.s.pGstPaePDPT)->a[iPDPTE]; 3112 3126 # else 3113 3127 PX86PML4E pPml4eSrc; … … 3133 3147 Assert(iPDSrc == 0); 3134 3148 3149 pPdpeDst = &pPdptDst->a[iPDPTE]; 3150 3135 3151 /* Fetch the pgm pool shadow descriptor if the shadow pdpte is present. */ 3136 if (pPdptDst->a[iPDPTE].n.u1Present) 3137 pShwPde = pgmPoolGetPage(pPool, pPdptDst->a[iPDPTE].u & X86_PDPE_PG_MASK); 3138 3139 if (pPDSrc == NULL) 3152 if (!pPdpeDst->n.u1Present) 3153 continue; /* next PDPTE */ 3154 3155 pShwPde = pgmPoolGetPage(pPool, pPdpeDst->u & X86_PDPE_PG_MASK); 3156 GCPhysPdeSrc = PdpeSrc.u & X86_PDPE_PG_MASK; 3157 3158 /* Anything significant changed? */ 3159 if ( PdpeSrc.n.u1Present != pPdpeDst->n.u1Present 3160 || GCPhysPdeSrc != pShwPde->GCPhys) 3140 3161 { 3141 /* PDPE not present */ 3142 if (pPdptDst->a[iPDPTE].n.u1Present) 3162 /* Free it. */ 3163 LogFlow(("SyncCR3: Out-of-sync PDPE (GCPhys) %VGp vs %VGp PdpeSrc=%RX64 PdpeDst=%RX64\n", 3164 pShwPde->GCPhys, GCPhysPdeSrc, (uint64_t)PdpeSrc.u, (uint64_t)pPdpeDst->u)); 3165 3166 /* Mark it as not present if there's no hypervisor mapping present. (bit flipped at the top of Trap0eHandler) */ 3167 if (!(pPdpeDst->u & PGM_PLXFLAGS_MAPPING)) 3143 3168 { 3144 /* Mark it as not present if there's no hypervisor mapping present. (bit flipped at the top of Trap0eHandler) */ 3145 if (!(pPdptDst->a[iPDPTE].u & PGM_PLXFLAGS_MAPPING)) 3146 { 3147 if (!(pPdptDst->a[iPDPTE].u & PGM_PLXFLAGS_PERMANENT)) 3148 { 3149 # if PGM_GST_TYPE == PGM_TYPE_AMD64 3150 Assert(pShwPde); 3151 pgmPoolFreeByPage(pPool, pShwPde, pShwPde->idx, iPDPTE); 3152 # else 3153 AssertFailed(); /* can't happen; the 4 pdpt pages are fixed! */ 3154 # endif 3155 pPdptDst->a[iPDPTE].u = 0; 3156 } 3157 else 3158 pPdptDst->a[iPDPTE].n.u1Present = 0; 3159 } 3169 pgmPoolFreeByPage(pPool, pShwPde, pShwPde->idx, iPDPTE); 3170 pPdpeDst->u = 0; 3171 continue; /* next guest PDPTE */ 3160 3172 } 3161 continue; /* next guest PDPTE */3162 3173 } 3174 # if PGM_GST_TYPE == PGM_TYPE_AMD64 3175 /* Force an attribute sync. */ 3176 pPdpeDst->lm.u1User = PdpeSrc.lm.u1User; 3177 pPdpeDst->lm.u1Write = PdpeSrc.lm.u1Write; 3178 pPdpeDst->lm.u1NoExecute = PdpeSrc.lm.u1NoExecute; 3179 # endif 3180 3163 3181 # else /* PGM_GST_TYPE != PGM_TYPE_PAE && PGM_GST_TYPE != PGM_TYPE_AMD64 */ 3164 3182 {
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