Index: /trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm	(revision 98722)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllAImpl.asm	(revision 98723)
@@ -5223,5 +5223,5 @@
 ; Need to move this as well somewhere better?
 ;
-struc IEMPCMPISTRISRC
+struc IEMPCMPXSTRXSRC
     .uSrc1        resd 4
     .uSrc2        resd 4
@@ -5229,5 +5229,5 @@
 
 ;;
-; The pcmpistri instruction.
+; The pcmpistri/pcmpestri instruction template.
 ;
 ; @param    A0      Pointer to the ECX register to store the result to (output).
@@ -5236,10 +5236,11 @@
 ; @param    A3      The 8-bit immediate
 ;
-BEGINPROC_FASTCALL iemAImpl_pcmpistri_u128, 16
+%macro IEMIMPL_MEDIA_PCMPXSTRI_INSN_IMM8_6 1
+BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u128, 16
         PROLOGUE_4_ARGS
         IEMIMPL_SSE_PROLOGUE
 
-        movdqu  xmm0, [A2 + IEMPCMPISTRISRC.uSrc1]
-        movdqu  xmm1, [A2 + IEMPCMPISTRISRC.uSrc2]
+        movdqu  xmm0, [A2 + IEMPCMPXSTRXSRC.uSrc1]
+        movdqu  xmm1, [A2 + IEMPCMPXSTRXSRC.uSrc2]
         mov     T2, A0                  ; A0 can be ecx/rcx in some calling conventions which gets overwritten later (T2 only available on AMD64)
         lea     T1, [.imm0 xWrtRIP]
@@ -5256,5 +5257,5 @@
  %rep 256
 .imm %+ bImm:
-       pcmpistri xmm0, xmm1, bImm
+       %1 xmm0, xmm1, bImm
        ret
        int3
@@ -5264,5 +5265,52 @@
 dw 0xf7ff  + (.immEnd - .imm0)          ; will cause warning if entries are too big.
 dw 0x107ff - (.immEnd - .imm0)          ; will cause warning if entries are too small.
-ENDPROC iemAImpl_pcmpistri_u128
+ENDPROC iemAImpl_ %+ %1 %+ _u128
+%endmacro
+
+IEMIMPL_MEDIA_PCMPXSTRI_INSN_IMM8_6 pcmpistri
+IEMIMPL_MEDIA_PCMPXSTRI_INSN_IMM8_6 pcmpestri
+
+
+;;
+; The pcmpistrm/pcmpestrm instruction template.
+;
+; @param    A0      Pointer to the XMM0 register to store the result to (output).
+; @param    A1      Pointer to the EFLAGS register.
+; @param    A2      Pointer to the structure containing the source operands (input).
+; @param    A3      The 8-bit immediate
+;
+%macro IEMIMPL_MEDIA_PCMPXSTRM_INSN_IMM8_6 1
+BEGINPROC_FASTCALL iemAImpl_ %+ %1 %+ _u128, 16
+        PROLOGUE_4_ARGS
+        IEMIMPL_SSE_PROLOGUE
+
+        movdqu  xmm1, [A2 + IEMPCMPXSTRXSRC.uSrc1]
+        movdqu  xmm2, [A2 + IEMPCMPXSTRXSRC.uSrc2]
+        lea     T1, [.imm0 xWrtRIP]
+        lea     T0, [A3 + A3*3]         ; sizeof(insnX+ret) == 8: (A3 * 4) * 2
+        lea     T1, [T1 + T0*2]
+        call    T1
+
+        IEM_SAVE_FLAGS A1, X86_EFL_STATUS_BITS, 0
+        movdqu  [A0], xmm0
+
+        IEMIMPL_SSE_EPILOGUE
+        EPILOGUE_4_ARGS
+ %assign bImm 0
+ %rep 256
+.imm %+ bImm:
+       %1 xmm1, xmm2, bImm
+       ret
+       int3
+  %assign bImm bImm + 1
+ %endrep
+.immEnd:                                ; 256*8 == 0x800
+dw 0xf7ff  + (.immEnd - .imm0)          ; will cause warning if entries are too big.
+dw 0x107ff - (.immEnd - .imm0)          ; will cause warning if entries are too small.
+ENDPROC iemAImpl_ %+ %1 %+ _u128
+%endmacro
+
+IEMIMPL_MEDIA_PCMPXSTRM_INSN_IMM8_6 pcmpistrm
+IEMIMPL_MEDIA_PCMPXSTRM_INSN_IMM8_6 pcmpestrm
 
 
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp	(revision 98722)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllAImplC.cpp	(revision 98723)
@@ -16469,7 +16469,37 @@
  * [V]PCMPISTRI
  */
-IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128_fallback,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPISTRISRC pSrc, uint8_t bEvil))
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128_fallback,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil))
 {
     RT_NOREF(pu32Ecx, pEFlags, pSrc, bEvil);
+    AssertReleaseFailed();
+}
+
+
+/**
+ * [V]PCMPESTRI
+ */
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpestri_u128_fallback,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil))
+{
+    RT_NOREF(pu32Ecx, pEFlags, pSrc, bEvil);
+    AssertReleaseFailed();
+}
+
+
+/**
+ * [V]PCMPISTRM
+ */
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistrm_u128_fallback,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil))
+{
+    RT_NOREF(puDst, pEFlags, pSrc, bEvil);
+    AssertReleaseFailed();
+}
+
+
+/**
+ * [V]PCMPESTRM
+ */
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpestrm_u128_fallback,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil))
+{
+    RT_NOREF(puDst, pEFlags, pSrc, bEvil);
     AssertReleaseFailed();
 }
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h	(revision 98722)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsThree0f3a.cpp.h	(revision 98723)
@@ -1129,14 +1129,73 @@
 
 /** Opcode 0x66 0x0f 0x60. */
-FNIEMOP_STUB(iemOp_pcmpestrm_Vdq_Wdq_Ib);
+FNIEMOP_DEF(iemOp_pcmpestrm_Vdq_Wdq_Ib)
+{
+    IEMOP_MNEMONIC3(RMI, PCMPESTRM, pcmpestrm, Vdq, Wdq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0);
+
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
+    if (IEM_IS_MODRM_REG_MODE(bRm))
+    {
+        /*
+         * Register, register.
+         */
+        uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_BEGIN(4, 1);
+        IEM_MC_ARG(PRTUINT128U,                puDst,             0);
+        IEM_MC_ARG(uint32_t *,                 pEFlags,             1);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,          Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC, pSrc,           Src, 2);
+        IEM_MC_ARG_CONST(uint8_t,              bImmArg, /*=*/ bImm, 3);
+        IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT();
+        IEM_MC_PREPARE_SSE_USAGE();
+        IEM_MC_FETCH_XREG_U128(Src.uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm));
+        IEM_MC_FETCH_XREG_U128(Src.uSrc2, IEM_GET_MODRM_RM(pVCpu, bRm));
+        IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/);
+        IEM_MC_REF_EFLAGS(pEFlags);
+        IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fSse42,
+                                                             iemAImpl_pcmpestrm_u128,
+                                                             iemAImpl_pcmpestrm_u128_fallback),
+                                 puDst, pEFlags, pSrc, bImmArg);
+        IEM_MC_ADVANCE_RIP_AND_FINISH();
+        IEM_MC_END();
+    }
+    else
+    {
+        /*
+         * Register, memory.
+         */
+        IEM_MC_BEGIN(4, 3);
+        IEM_MC_ARG(uint32_t *,                  pu32Ecx,             0);
+        IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,           Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC,  pSrc,           Src, 2);
+        IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
+
+        IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
+        uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
+        IEM_MC_ARG_CONST(uint8_t,               bImmArg, /*=*/ bImm, 3);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT();
+        IEM_MC_FETCH_MEM_U128(Src.uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
+
+        IEM_MC_PREPARE_SSE_USAGE();
+        IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX);
+        IEM_MC_FETCH_XREG_U128(Src.uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm));
+        IEM_MC_REF_EFLAGS(pEFlags);
+        IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fSse42,
+                                                             iemAImpl_pcmpestri_u128,
+                                                             iemAImpl_pcmpestri_u128_fallback),
+                                 pu32Ecx, pEFlags, pSrc, bImmArg);
+        IEM_MC_ADVANCE_RIP_AND_FINISH();
+        IEM_MC_END();
+    }
+}
+
+
 /** Opcode 0x66 0x0f 0x61, */
-FNIEMOP_STUB(iemOp_pcmpestri_Vdq_Wdq_Ib);
-/** Opcode 0x66 0x0f 0x62. */
-FNIEMOP_STUB(iemOp_pcmpistrm_Vdq_Wdq_Ib);
-
-
-/** Opcode 0x66 0x0f 0x63*/
-FNIEMOP_DEF(iemOp_pcmpistri_Vdq_Wdq_Ib)
-{
+FNIEMOP_DEF(iemOp_pcmpestri_Vdq_Wdq_Ib)
+{
+    IEMOP_MNEMONIC3(RMI, PCMPESTRI, pcmpestri, Vdq, Wdq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0);
+
     uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
     if (IEM_IS_MODRM_REG_MODE(bRm))
@@ -1150,6 +1209,138 @@
         IEM_MC_ARG(uint32_t *,                 pu32Ecx,             0);
         IEM_MC_ARG(uint32_t *,                 pEFlags,             1);
-        IEM_MC_LOCAL(IEMPCMPISTRISRC,          Src);
-        IEM_MC_ARG_LOCAL_REF(PIEMPCMPISTRISRC, pSrc,           Src, 2);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,          Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC, pSrc,           Src, 2);
+        IEM_MC_ARG_CONST(uint8_t,              bImmArg, /*=*/ bImm, 3);
+        IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT();
+        IEM_MC_PREPARE_SSE_USAGE();
+        IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX);
+        IEM_MC_FETCH_XREG_U128(Src.uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm));
+        IEM_MC_FETCH_XREG_U128(Src.uSrc2, IEM_GET_MODRM_RM(pVCpu, bRm));
+        IEM_MC_REF_EFLAGS(pEFlags);
+        IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fSse42,
+                                                             iemAImpl_pcmpestri_u128,
+                                                             iemAImpl_pcmpestri_u128_fallback),
+                                 pu32Ecx, pEFlags, pSrc, bImmArg);
+        /** @todo testcase: High dword of RCX cleared? */
+        IEM_MC_ADVANCE_RIP_AND_FINISH();
+        IEM_MC_END();
+    }
+    else
+    {
+        /*
+         * Register, memory.
+         */
+        IEM_MC_BEGIN(4, 3);
+        IEM_MC_ARG(uint32_t *,                  pu32Ecx,             0);
+        IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,           Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC,  pSrc,           Src, 2);
+        IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
+
+        IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
+        uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
+        IEM_MC_ARG_CONST(uint8_t,               bImmArg, /*=*/ bImm, 3);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT();
+        IEM_MC_FETCH_MEM_U128(Src.uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
+
+        IEM_MC_PREPARE_SSE_USAGE();
+        IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX);
+        IEM_MC_FETCH_XREG_U128(Src.uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm));
+        IEM_MC_REF_EFLAGS(pEFlags);
+        IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fSse42,
+                                                             iemAImpl_pcmpestri_u128,
+                                                             iemAImpl_pcmpestri_u128_fallback),
+                                 pu32Ecx, pEFlags, pSrc, bImmArg);
+        /** @todo testcase: High dword of RCX cleared? */
+        IEM_MC_ADVANCE_RIP_AND_FINISH();
+        IEM_MC_END();
+    }
+}
+
+
+/** Opcode 0x66 0x0f 0x62. */
+FNIEMOP_DEF(iemOp_pcmpistrm_Vdq_Wdq_Ib)
+{
+    IEMOP_MNEMONIC3(RMI, PCMPISTRM, pcmpistrm, Vdq, Wdq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0);
+
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
+    if (IEM_IS_MODRM_REG_MODE(bRm))
+    {
+        /*
+         * Register, register.
+         */
+        uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_BEGIN(4, 1);
+        IEM_MC_ARG(PRTUINT128U,                puDst,             0);
+        IEM_MC_ARG(uint32_t *,                 pEFlags,             1);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,          Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC, pSrc,           Src, 2);
+        IEM_MC_ARG_CONST(uint8_t,              bImmArg, /*=*/ bImm, 3);
+        IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT();
+        IEM_MC_PREPARE_SSE_USAGE();
+        IEM_MC_FETCH_XREG_U128(Src.uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm));
+        IEM_MC_FETCH_XREG_U128(Src.uSrc2, IEM_GET_MODRM_RM(pVCpu, bRm));
+        IEM_MC_REF_XREG_U128(puDst, 0 /*xmm0*/);
+        IEM_MC_REF_EFLAGS(pEFlags);
+        IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fSse42,
+                                                             iemAImpl_pcmpistrm_u128,
+                                                             iemAImpl_pcmpistrm_u128_fallback),
+                                 puDst, pEFlags, pSrc, bImmArg);
+        IEM_MC_ADVANCE_RIP_AND_FINISH();
+        IEM_MC_END();
+    }
+    else
+    {
+        /*
+         * Register, memory.
+         */
+        IEM_MC_BEGIN(4, 3);
+        IEM_MC_ARG(uint32_t *,                  pu32Ecx,             0);
+        IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,           Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC,  pSrc,           Src, 2);
+        IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
+
+        IEM_MC_CALC_RM_EFF_ADDR(GCPtrEffSrc, bRm, 1);
+        uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
+        IEM_MC_ARG_CONST(uint8_t,               bImmArg, /*=*/ bImm, 3);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT();
+        IEM_MC_FETCH_MEM_U128(Src.uSrc2, pVCpu->iem.s.iEffSeg, GCPtrEffSrc);
+
+        IEM_MC_PREPARE_SSE_USAGE();
+        IEM_MC_REF_GREG_U32(pu32Ecx, X86_GREG_xCX);
+        IEM_MC_FETCH_XREG_U128(Src.uSrc1, IEM_GET_MODRM_REG(pVCpu, bRm));
+        IEM_MC_REF_EFLAGS(pEFlags);
+        IEM_MC_CALL_VOID_AIMPL_4(IEM_SELECT_HOST_OR_FALLBACK(fSse42,
+                                                             iemAImpl_pcmpistri_u128,
+                                                             iemAImpl_pcmpistri_u128_fallback),
+                                 pu32Ecx, pEFlags, pSrc, bImmArg);
+        IEM_MC_ADVANCE_RIP_AND_FINISH();
+        IEM_MC_END();
+    }
+}
+
+
+/** Opcode 0x66 0x0f 0x63*/
+FNIEMOP_DEF(iemOp_pcmpistri_Vdq_Wdq_Ib)
+{
+    IEMOP_MNEMONIC3(RMI, PCMPISTRI, pcmpistri, Vdq, Wdq, Ib, DISOPTYPE_HARMLESS | DISOPTYPE_SSE, 0);
+
+    uint8_t bRm; IEM_OPCODE_GET_NEXT_U8(&bRm);
+    if (IEM_IS_MODRM_REG_MODE(bRm))
+    {
+        /*
+         * Register, register.
+         */
+        uint8_t bImm; IEM_OPCODE_GET_NEXT_U8(&bImm);
+        IEMOP_HLP_DONE_DECODING_NO_LOCK_PREFIX();
+        IEM_MC_BEGIN(4, 1);
+        IEM_MC_ARG(uint32_t *,                 pu32Ecx,             0);
+        IEM_MC_ARG(uint32_t *,                 pEFlags,             1);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,          Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC, pSrc,           Src, 2);
         IEM_MC_ARG_CONST(uint8_t,              bImmArg, /*=*/ bImm, 3);
         IEM_MC_MAYBE_RAISE_SSE42_RELATED_XCPT();
@@ -1175,6 +1366,6 @@
         IEM_MC_ARG(uint32_t *,                  pu32Ecx,             0);
         IEM_MC_ARG(uint32_t *,                  pEFlags,             1);
-        IEM_MC_LOCAL(IEMPCMPISTRISRC,           Src);
-        IEM_MC_ARG_LOCAL_REF(PIEMPCMPISTRISRC,  pSrc,           Src, 2);
+        IEM_MC_LOCAL(IEMPCMPXSTRXSRC,           Src);
+        IEM_MC_ARG_LOCAL_REF(PIEMPCMPXSTRXSRC,  pSrc,           Src, 2);
         IEM_MC_LOCAL(RTGCPTR,                   GCPtrEffSrc);
 
Index: /trunk/src/VBox/VMM/include/IEMInternal.h
===================================================================
--- /trunk/src/VBox/VMM/include/IEMInternal.h	(revision 98722)
+++ /trunk/src/VBox/VMM/include/IEMInternal.h	(revision 98723)
@@ -2387,14 +2387,21 @@
 IEM_DECL_IMPL_DEF(void, iemAImpl_sha256rnds2_u128_fallback,(PRTUINT128U puDst, PCRTUINT128U puSrc, PCRTUINT128U puXmm0Constants));
 
-typedef struct IEMPCMPISTRISRC
+typedef struct IEMPCMPXSTRXSRC
 {
     RTUINT128U              uSrc1;
     RTUINT128U              uSrc2;
-} IEMPCMPISTRISRC;
-typedef IEMPCMPISTRISRC *PIEMPCMPISTRISRC;
-typedef const IEMPCMPISTRISRC *PCIEMPCMPISTRISRC;
-
-IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPISTRISRC pSrc, uint8_t bEvil));
-IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128_fallback,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPISTRISRC pSrc, uint8_t bEvil));
+} IEMPCMPXSTRXSRC;
+typedef IEMPCMPXSTRXSRC *PIEMPCMPXSTRXSRC;
+typedef const IEMPCMPXSTRXSRC *PCIEMPCMPXSTRXSRC;
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistri_u128_fallback,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpestri_u128,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpestri_u128_fallback,(uint32_t *pu32Ecx, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
+
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistrm_u128,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpistrm_u128_fallback,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpestrm_u128,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
+IEM_DECL_IMPL_DEF(void, iemAImpl_pcmpestrm_u128_fallback,(PRTUINT128U puDst, uint32_t *pEFlags, PCIEMPCMPXSTRXSRC pSrc, uint8_t bEvil));
 
 FNIEMAIMPLMEDIAOPTF2U128IMM8 iemAImpl_pclmulqdq_u128, iemAImpl_pclmulqdq_u128_fallback;
