Changeset 98828 in vbox
- Timestamp:
- Mar 3, 2023 12:03:11 PM (21 months ago)
- Location:
- trunk/src/VBox/ValidationKit/bootsectors
- Files:
-
- 3 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-template.c
r98103 r98828 217 217 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_RBX_icebp); 218 218 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_crc32_EAX_qword_FSxBX_icebp); 219 220 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_EAX_EBX_icebp); 221 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_EAX_dword_FSxBX_icebp); 222 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_RAX_RBX_icebp); 223 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adcx_RAX_qword_FSxBX_icebp); 224 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_EAX_EBX_icebp); 225 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_EAX_dword_FSxBX_icebp); 226 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_RAX_RBX_icebp); 227 extern FNBS3FAR BS3_CMN_NM(bs3CpuInstr2_adox_RAX_qword_FSxBX_icebp); 219 228 220 229 # if ARCH_BITS == 64 … … 2746 2755 } 2747 2756 #endif 2757 2758 2759 /* 2760 * ADCX/ADOX - ADX 2761 */ 2762 BS3_DECL_FAR(uint8_t) BS3_CMN_NM(bs3CpuInstr2_adcx_adox)(uint8_t bMode) 2763 { 2764 typedef struct BS3CPUINSTR2_ADX_VALUES_T 2765 { 2766 uint64_t uDstOut; 2767 uint64_t uDstIn; 2768 uint64_t uSrc; 2769 bool fFlagIn; 2770 bool fFlagOut; 2771 } BS3CPUINSTR2_ADX_VALUES_T; 2772 static const BS3CPUINSTR2_ADX_VALUES_T s_aValues4[] = 2773 { 2774 { UINT32_C(0000000000), UINT32_C(0000000000), UINT32_C(0000000000), false, false }, 2775 { UINT32_C(0000000001), UINT32_C(0000000000), UINT32_C(0000000000), true, false }, 2776 2777 { UINT32_C(0xfffffffe), UINT32_MAX / 2, UINT32_MAX / 2, false, false }, 2778 { UINT32_C(0xffffffff), UINT32_MAX / 2, UINT32_MAX / 2, true, false }, 2779 2780 { UINT32_C(0x7ffffffe), UINT32_MAX, UINT32_MAX / 2, false, true }, 2781 { UINT32_C(0x7fffffff), UINT32_MAX, UINT32_MAX / 2, true, true }, 2782 2783 { UINT32_C(0x7ffffffe), UINT32_MAX / 2, UINT32_MAX, false, true }, 2784 { UINT32_C(0x7fffffff), UINT32_MAX / 2, UINT32_MAX, true, true }, 2785 2786 { UINT32_C(0xfffffffe), UINT32_MAX, UINT32_MAX, false, true }, 2787 { UINT32_C(0xffffffff), UINT32_MAX, UINT32_MAX, true, true }, 2788 }; 2789 #if ARCH_BITS >= 64 2790 static const BS3CPUINSTR2_ADX_VALUES_T s_aValues8[] = 2791 { 2792 { UINT64_C(00000000000000000000), UINT64_C(00000000000000000000), UINT64_C(00000000000000000000), false, false }, 2793 { UINT64_C(00000000000000000001), UINT64_C(00000000000000000000), UINT64_C(00000000000000000000), true, false }, 2794 2795 { UINT64_C(0xfffffffffffffffe), UINT64_MAX / 2, UINT64_MAX / 2, false, false }, 2796 { UINT64_C(0xffffffffffffffff), UINT64_MAX / 2, UINT64_MAX / 2, true, false }, 2797 2798 { UINT64_C(0x7ffffffffffffffe), UINT64_MAX, UINT64_MAX / 2, false, true }, 2799 { UINT64_C(0x7fffffffffffffff), UINT64_MAX, UINT64_MAX / 2, true, true }, 2800 2801 { UINT64_C(0x7ffffffffffffffe), UINT64_MAX / 2, UINT64_MAX, false, true }, 2802 { UINT64_C(0x7fffffffffffffff), UINT64_MAX / 2, UINT64_MAX, true, true }, 2803 2804 { UINT64_C(0xfffffffffffffffe), UINT64_MAX, UINT64_MAX, false, true }, 2805 { UINT64_C(0xffffffffffffffff), UINT64_MAX, UINT64_MAX, true, true }, 2806 }; 2807 #endif 2808 static const struct 2809 { 2810 FPFNBS3FAR pfnWorker; 2811 bool fMemSrc; 2812 uint8_t cbOp; 2813 uint8_t cValues; 2814 BS3CPUINSTR2_ADX_VALUES_T const BS3_FAR *paValues; 2815 uint32_t fEFlagsMod; 2816 } s_aTests[] = 2817 { 2818 /* 32-bit register width */ 2819 { BS3_CMN_NM(bs3CpuInstr2_adcx_EAX_EBX_icebp), false, 4, RT_ELEMENTS(s_aValues4), s_aValues4, X86_EFL_CF }, 2820 { BS3_CMN_NM(bs3CpuInstr2_adcx_EAX_dword_FSxBX_icebp), true, 4, RT_ELEMENTS(s_aValues4), s_aValues4, X86_EFL_CF }, 2821 2822 { BS3_CMN_NM(bs3CpuInstr2_adox_EAX_EBX_icebp), false, 4, RT_ELEMENTS(s_aValues4), s_aValues4, X86_EFL_OF }, 2823 { BS3_CMN_NM(bs3CpuInstr2_adox_EAX_dword_FSxBX_icebp), true, 4, RT_ELEMENTS(s_aValues4), s_aValues4, X86_EFL_OF }, 2824 #if ARCH_BITS >= 64 2825 /* 64-bit register width */ 2826 { BS3_CMN_NM(bs3CpuInstr2_adcx_RAX_RBX_icebp), false, 8, RT_ELEMENTS(s_aValues8), s_aValues8, X86_EFL_CF }, 2827 { BS3_CMN_NM(bs3CpuInstr2_adcx_RAX_qword_FSxBX_icebp), true, 8, RT_ELEMENTS(s_aValues8), s_aValues8, X86_EFL_CF }, 2828 2829 { BS3_CMN_NM(bs3CpuInstr2_adox_RAX_RBX_icebp), false, 8, RT_ELEMENTS(s_aValues8), s_aValues8, X86_EFL_OF }, 2830 { BS3_CMN_NM(bs3CpuInstr2_adox_RAX_qword_FSxBX_icebp), true, 8, RT_ELEMENTS(s_aValues8), s_aValues8, X86_EFL_OF }, 2831 #endif 2832 }; 2833 2834 BS3REGCTX Ctx; 2835 BS3TRAPFRAME TrapFrame; 2836 unsigned i, j; 2837 bool fSupportsAdx = false; 2838 2839 if ( (g_uBs3CpuDetected & BS3CPU_F_CPUID) 2840 && ASMCpuId_EAX(0) >= 7) 2841 { 2842 uint32_t fEbx = 0; 2843 ASMCpuIdExSlow(7, 0, 0, 0, NULL, &fEbx, NULL, NULL); 2844 fSupportsAdx = RT_BOOL(fEbx & X86_CPUID_STEXT_FEATURE_EBX_ADX); 2845 } 2846 2847 /* Ensure the structures are allocated before we sample the stack pointer. */ 2848 Bs3MemSet(&Ctx, 0, sizeof(Ctx)); 2849 Bs3MemSet(&TrapFrame, 0, sizeof(TrapFrame)); 2850 2851 /* 2852 * Create test context. 2853 */ 2854 Bs3RegCtxSaveEx(&Ctx, bMode, 512); 2855 2856 /* 2857 * Do the tests twice, first with all flags set, then once again with 2858 * flags cleared. The flags are not supposed to be touched at all except for the one indicated (CF or OF). 2859 */ 2860 Ctx.rflags.u16 |= X86_EFL_STATUS_BITS; 2861 for (j = 0; j < 2; j++) 2862 { 2863 for (i = 0; i < RT_ELEMENTS(s_aTests); i++) 2864 { 2865 uint8_t const cbOp = s_aTests[i].cbOp; 2866 unsigned const cValues = s_aTests[i].cValues; 2867 BS3CPUINSTR2_ADX_VALUES_T const BS3_FAR *paValues = s_aTests[i].paValues; 2868 uint32_t const fEFlagsMod = s_aTests[i].fEFlagsMod; 2869 unsigned iValue; 2870 bool const fOkay = fSupportsAdx; 2871 uint8_t const bExpectXcpt = fOkay ? X86_XCPT_DB : X86_XCPT_UD; 2872 uint64_t const uSrcGarbage = ( cbOp == 4 ? UINT64_C(0x0394831000000000) : 0) 2873 & (ARCH_BITS >= 64 ? UINT64_MAX : UINT32_MAX); 2874 uint64_t uExpectRip; 2875 2876 Bs3RegCtxSetRipCsFromCurPtr(&Ctx, s_aTests[i].pfnWorker); 2877 uExpectRip = Ctx.rip.u + (fOkay ? ((uint8_t const BS3_FAR *)s_aTests[i].pfnWorker)[-1] + 1 : 0); 2878 2879 for (iValue = 0; iValue < cValues; iValue++) 2880 { 2881 uint64_t const uExpectRax = fOkay ? paValues[iValue].uDstOut : paValues[iValue].uDstIn; 2882 uint64_t uMemSrc, uMemSrcExpect; 2883 2884 Ctx.rax.uCcXReg = paValues[iValue].uDstIn; 2885 if (!s_aTests[i].fMemSrc) 2886 { 2887 Ctx.rbx.u64 = paValues[iValue].uSrc | uSrcGarbage; 2888 uMemSrcExpect = uMemSrc = ~(paValues[iValue].uSrc | uSrcGarbage); 2889 } 2890 else 2891 { 2892 uMemSrcExpect = uMemSrc = paValues[iValue].uSrc | uSrcGarbage; 2893 Bs3RegCtxSetGrpSegFromCurPtr(&Ctx, &Ctx.rbx, &Ctx.fs, &uMemSrc); 2894 } 2895 2896 Ctx.rflags.u16 &= ~fEFlagsMod; 2897 if (paValues[iValue].fFlagIn) 2898 Ctx.rflags.u16 |= fEFlagsMod; 2899 2900 Bs3TrapSetJmpAndRestore(&Ctx, &TrapFrame); 2901 2902 Ctx.rflags.u16 &= ~fEFlagsMod; 2903 if (paValues[iValue].fFlagOut) 2904 Ctx.rflags.u16 |= fEFlagsMod; 2905 2906 if ( TrapFrame.bXcpt != bExpectXcpt 2907 || TrapFrame.Ctx.rip.u != uExpectRip 2908 || TrapFrame.Ctx.rbx.u != Ctx.rbx.u 2909 || TrapFrame.Ctx.rax.u != uExpectRax 2910 /* check that nothing else really changed: */ 2911 || TrapFrame.Ctx.rflags.u16 != Ctx.rflags.u16 2912 || TrapFrame.Ctx.rcx.u != Ctx.rcx.u 2913 || TrapFrame.Ctx.rdx.u != Ctx.rdx.u 2914 || TrapFrame.Ctx.rsp.u != Ctx.rsp.u 2915 || TrapFrame.Ctx.rbp.u != Ctx.rbp.u 2916 || TrapFrame.Ctx.rsi.u != Ctx.rsi.u 2917 || TrapFrame.Ctx.rdi.u != Ctx.rdi.u 2918 || uMemSrc != uMemSrcExpect 2919 ) 2920 { 2921 Bs3TestFailedF("test #%i value #%i failed: input %#RX64, %#RX64", 2922 i, iValue, paValues[iValue].uDstIn, paValues[iValue].uSrc); 2923 if (TrapFrame.bXcpt != bExpectXcpt) 2924 Bs3TestFailedF("Expected bXcpt = %#x, got %#x", bExpectXcpt, TrapFrame.bXcpt); 2925 if (TrapFrame.Ctx.rip.u != uExpectRip) 2926 Bs3TestFailedF("Expected RIP = %#06RX64, got %#06RX64", uExpectRip, TrapFrame.Ctx.rip.u); 2927 if (TrapFrame.Ctx.rax.u != uExpectRax) 2928 Bs3TestFailedF("Expected RAX = %#010RX64, got %#010RX64", uExpectRax, TrapFrame.Ctx.rax.u); 2929 if (TrapFrame.Ctx.rbx.u != Ctx.rbx.u) 2930 Bs3TestFailedF("Expected RBX = %#06RX64, got %#06RX64 (dst)", Ctx.rbx.u, TrapFrame.Ctx.rbx.u); 2931 2932 if (TrapFrame.Ctx.rflags.u16 != Ctx.rflags.u16) 2933 Bs3TestFailedF("Expected EFLAGS = %#06RX16, got %#06RX16", Ctx.rflags.u16, TrapFrame.Ctx.rflags.u16); 2934 if (TrapFrame.Ctx.rcx.u != Ctx.rcx.u) 2935 Bs3TestFailedF("Expected RCX = %#06RX64, got %#06RX64", Ctx.rcx.u, TrapFrame.Ctx.rcx.u); 2936 if (TrapFrame.Ctx.rdx.u != Ctx.rdx.u) 2937 Bs3TestFailedF("Expected RDX = %#06RX64, got %#06RX64 (src)", Ctx.rdx.u, TrapFrame.Ctx.rdx.u); 2938 if (TrapFrame.Ctx.rsp.u != Ctx.rsp.u) 2939 Bs3TestFailedF("Expected RSP = %#06RX64, got %#06RX64", Ctx.rsp.u, TrapFrame.Ctx.rsp.u); 2940 if (TrapFrame.Ctx.rbp.u != Ctx.rbp.u) 2941 Bs3TestFailedF("Expected RBP = %#06RX64, got %#06RX64", Ctx.rbp.u, TrapFrame.Ctx.rbp.u); 2942 if (TrapFrame.Ctx.rsi.u != Ctx.rsi.u) 2943 Bs3TestFailedF("Expected RSI = %#06RX64, got %#06RX64", Ctx.rsi.u, TrapFrame.Ctx.rsi.u); 2944 if (TrapFrame.Ctx.rdi.u != Ctx.rdi.u) 2945 Bs3TestFailedF("Expected RDI = %#06RX64, got %#06RX64", Ctx.rdi.u, TrapFrame.Ctx.rdi.u); 2946 if (uMemSrc != uMemSrcExpect) 2947 Bs3TestFailedF("Expected uMemSrc = %#06RX64, got %#06RX64", (uint64_t)uMemSrcExpect, (uint64_t)uMemSrc); 2948 } 2949 } 2950 } 2951 Ctx.rflags.u16 &= ~X86_EFL_STATUS_BITS; 2952 } 2953 2954 return 0; 2955 } 2956 2748 2957 2749 2958 -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2-template.mac
r98103 r98828 641 641 642 642 ; 643 ; ADCX 644 ; 645 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adcx_EAX_EBX_icebp 646 adcx eax, ebx 647 .again: 648 icebp 649 jmp .again 650 BS3_PROC_END_CMN bs3CpuInstr2_adcx_EAX_EBX_icebp 651 652 %if TMPL_BITS == 64 653 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adcx_RAX_RBX_icebp 654 adcx rax, rbx 655 .again: 656 icebp 657 jmp .again 658 BS3_PROC_END_CMN bs3CpuInstr2_adcx_RAX_RBX_icebp 659 %endif 660 661 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adcx_EAX_dword_FSxBX_icebp 662 adcx eax, dword [fs:xBX] 663 .again: 664 icebp 665 jmp .again 666 BS3_PROC_END_CMN bs3CpuInstr2_adcx_EAX_dword_FSxBX_icebp 667 668 %if TMPL_BITS == 64 669 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adcx_RAX_qword_FSxBX_icebp 670 adcx rax, qword [fs:xBX] 671 .again: 672 icebp 673 jmp .again 674 BS3_PROC_END_CMN bs3CpuInstr2_adcx_RAX_qword_FSxBX_icebp 675 %endif 676 677 678 ; 679 ; ADOX 680 ; 681 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adox_EAX_EBX_icebp 682 adox eax, ebx 683 .again: 684 icebp 685 jmp .again 686 BS3_PROC_END_CMN bs3CpuInstr2_adox_EAX_EBX_icebp 687 688 %if TMPL_BITS == 64 689 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adox_RAX_RBX_icebp 690 adox rax, rbx 691 .again: 692 icebp 693 jmp .again 694 BS3_PROC_END_CMN bs3CpuInstr2_adox_RAX_RBX_icebp 695 %endif 696 697 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adox_EAX_dword_FSxBX_icebp 698 adox eax, dword [fs:xBX] 699 .again: 700 icebp 701 jmp .again 702 BS3_PROC_END_CMN bs3CpuInstr2_adox_EAX_dword_FSxBX_icebp 703 704 %if TMPL_BITS == 64 705 BS3CPUINSTR2_PROC_BEGIN_CMN bs3CpuInstr2_adox_RAX_qword_FSxBX_icebp 706 adox rax, qword [fs:xBX] 707 .again: 708 icebp 709 jmp .again 710 BS3_PROC_END_CMN bs3CpuInstr2_adox_RAX_qword_FSxBX_icebp 711 %endif 712 713 714 ; 643 715 ; CMPXCHG16B 644 716 ; -
trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-2.c
r98103 r98828 66 66 BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_popcnt); 67 67 BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_crc32); 68 BS3TESTMODE_PROTOTYPES_CMN(bs3CpuInstr2_adcx_adox); 68 69 BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_cmpxchg16b); 69 70 BS3TESTMODE_PROTOTYPES_CMN_64(bs3CpuInstr2_wrfsbase); … … 106 107 #endif 107 108 #if 1 108 BS3TESTMODEENTRY_CMN("popcnt", bs3CpuInstr2_popcnt), /* Intel: POPCNT; AMD: ABM */ 109 BS3TESTMODEENTRY_CMN("crc32", bs3CpuInstr2_crc32), /* SSE4.2 */ 109 BS3TESTMODEENTRY_CMN("popcnt", bs3CpuInstr2_popcnt), /* Intel: POPCNT; AMD: ABM */ 110 BS3TESTMODEENTRY_CMN("crc32", bs3CpuInstr2_crc32), /* SSE4.2 */ 111 BS3TESTMODEENTRY_CMN("adcx/adox", bs3CpuInstr2_adcx_adox), /* ADX */ 110 112 #endif 111 113 #if 1
Note:
See TracChangeset
for help on using the changeset viewer.