Changeset 99193 in vbox for trunk

Timestamp:

Mar 28, 2023 9:09:30 AM (22 months ago)

Author:

vboxsync

Message:

Devices/DevQemuFwCfg: Add support for the MMIO interface for ARM, bugref:10386

File:

• trunk/src/VBox/Devices/PC/DevQemuFwCfg.cpp (modified) (6 diffs)

trunk/src/VBox/Devices/PC/DevQemuFwCfg.cpp

@@ -99 +99 @@
 /** Offset of the low 32bit of the DMA address. */
 #define QEMU_FW_CFG_OFF_DMA_LOW                     8
+
+
+/** @name MMIO register offsets.
+ * @{ */
+/** Data register offset. */
+#define QEU_FW_CFG_MMIO_OFF_DATA                    0
+/** Selector register offset. */
+#define QEU_FW_CFG_MMIO_OFF_SELECTOR                8
+/** DMA base address register offset. */
+#define QEU_FW_CFG_MMIO_OFF_DMA                     16
+/** @} */
 
 
@@ -572 +583 @@
 static int qemuFwCfgItemSelect(PDEVQEMUFWCFG pThis, uint16_t uCfgItem)
 {
+    LogFlowFunc(("uCfgItem=%#x\n", uCfgItem));
+
     qemuFwCfgR3ItemReset(pThis);
 
@@ -792 +805 @@
 
 
+/* -=-=-=-=-=- MMIO callbacks -=-=-=-=-=- */
+
+
+/**
+ * @callback_method_impl{FNIOMMMIONEWREAD}
+ */
+static DECLCALLBACK(VBOXSTRICTRC) qemuFwCfgMmioRead(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void *pv, unsigned cb)
+{
+    PDEVQEMUFWCFG pThis = PDMDEVINS_2_DATA(pDevIns, PDEVQEMUFWCFG);
+    RT_NOREF(pvUser);
+
+    LogFlowFunc(("%RGp cb=%u\n", off, cb));
+
+    AssertReturn(cb <= sizeof(uint64_t), VERR_INVALID_PARAMETER);
+
+    VBOXSTRICTRC rc = VINF_SUCCESS;
+    switch (off)
+    {
+        case QEU_FW_CFG_MMIO_OFF_DATA:
+        {
+            if (   pThis->cbCfgItemLeft
+                && pThis->pCfgItem)
+            {
+                uint32_t cbRead = 0;
+                int rc2 = pThis->pCfgItem->pfnRead(pThis, pThis->pCfgItem, pThis->offCfgItemNext, pv,
+                                                   cb, &cbRead);
+                if (RT_SUCCESS(rc2))
+                {
+                    pThis->offCfgItemNext += cbRead;
+                    pThis->cbCfgItemLeft  -= cbRead;
+                }
+            }
+            else
+                rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "offMmio=%#x cb=%d\n", off, cb);
+            break;
+        }
+        case QEU_FW_CFG_MMIO_OFF_SELECTOR:
+        case QEU_FW_CFG_MMIO_OFF_DMA:
+            /* Writeonly, ignore. */
+            break;
+        default:
+            rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "offMmio=%#x cb=%d\n", off, cb);
+            break;
+    }
+
+    return rc;
+}
+
+
+/**
+ * @callback_method_impl{FNIOMMMIONEWWRITE}
+ */
+static DECLCALLBACK(VBOXSTRICTRC) qemuFwCfgMmioWrite(PPDMDEVINS pDevIns, void *pvUser, RTGCPHYS off, void const *pv, unsigned cb)
+{
+    int rc = VINF_SUCCESS;
+    PDEVQEMUFWCFG pThis = PDMDEVINS_2_DATA(pDevIns, PDEVQEMUFWCFG);
+    RT_NOREF(pvUser);
+
+    LogFlowFunc(("off=%RGp cb=%u\n", off, cb));
+
+    switch (off)
+    {
+        case QEU_FW_CFG_MMIO_OFF_DATA: /* Readonly, ignore */
+            break;
+        case QEU_FW_CFG_MMIO_OFF_SELECTOR:
+        {
+            if (cb == sizeof(uint16_t))
+                qemuFwCfgItemSelect(pThis, *(uint16_t *)pv);
+            else
+                rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "offMmio=%#x cb=%d\n", off, cb);
+            break;
+        }
+        case QEU_FW_CFG_MMIO_OFF_DMA:
+        {
+            if (cb == sizeof(uint64_t))
+            {
+                pThis->GCPhysDma |= ((RTGCPHYS)RT_BE2H_U64(*(uint64_t *)pv));
+                qemuFwCfgDmaXfer(pThis, pThis->GCPhysDma);
+                pThis->GCPhysDma = 0;
+            }
+            else
+                rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "offMmio=%#x cb=%d\n", off, cb);
+            break;
+        }
+        default:
+            rc = PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "offMmio=%#x cb=%d\n", off, cb);
+            break;
+    }
+
+    LogFlowFunc((" -> rc=%Rrc\n", rc));
+    return rc;
+}
+
+
 /**
  * Sets up the initrd memory file and CPIO filesystem stream for writing.
@@ -1173 +1280 @@
      */
     PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "DmaEnabled"
+                                           "|MmioBase"
+                                           "|MmioSize"
                                            "|KernelImage"
                                            "|InitrdImage"
@@ -1193 +1302 @@
     pThis->hVfsFileInitrd = NIL_RTVFSFILE;
 
+    RTGCPHYS GCPhysMmioBase = 0;
+    rc = pHlp->pfnCFGMQueryU64(pCfg, "MmioBase", &GCPhysMmioBase);
+    if (RT_FAILURE(rc) && rc != VERR_CFGM_VALUE_NOT_FOUND)
+        return PDMDEV_SET_ERROR(pDevIns, rc,
+                                N_("Configuration error: Failed to get the \"MmioBase\" value"));
+    if (rc == VERR_CFGM_VALUE_NOT_FOUND)
+    {
+        /*
+         * Register standard I/O Ports
+         */
+        IOMIOPORTHANDLE hIoPorts;
+        rc = PDMDevHlpIoPortCreateFlagsAndMap(pDevIns, QEMU_FW_CFG_IO_PORT_START, QEMU_FW_CFG_IO_PORT_SIZE, 0 /*fFlags*/,
+                                              qemuFwCfgIoPortWrite, qemuFwCfgIoPortRead,
+                                              "QEMU firmware configuration", NULL /*paExtDescs*/, &hIoPorts);
+        AssertRCReturn(rc, rc);
+    }
+    else
+    {
+        uint32_t cbMmio = 0;
+        rc = pHlp->pfnCFGMQueryU32(pCfg, "MmioSize", &cbMmio);
+        if (RT_FAILURE(rc))
+            return PDMDEV_SET_ERROR(pDevIns, rc,
+                                    N_("Configuration error: Failed to get the \"MmioSize\" value"));
+
+        /*
+         * Register and map the MMIO region.
+         */
+        IOMMMIOHANDLE hMmio;
+        rc = PDMDevHlpMmioCreateAndMap(pDevIns, GCPhysMmioBase, cbMmio, qemuFwCfgMmioWrite, qemuFwCfgMmioRead,
+                                       IOMMMIO_FLAGS_READ_PASSTHRU | IOMMMIO_FLAGS_WRITE_PASSTHRU, "QemuFwCfg", &hMmio);
+        AssertRCReturn(rc, rc);
+    }
+
     qemuFwCfgR3ItemReset(pThis);
 
@@ -1198 +1340 @@
     if (RT_FAILURE(rc))
         return rc; /* Error set. */
-
-    /*
-     * Register I/O Ports
-     */
-    IOMIOPORTHANDLE hIoPorts;
-    rc = PDMDevHlpIoPortCreateFlagsAndMap(pDevIns, QEMU_FW_CFG_IO_PORT_START, QEMU_FW_CFG_IO_PORT_SIZE, 0 /*fFlags*/,
-                                          qemuFwCfgIoPortWrite, qemuFwCfgIoPortRead,
-                                          "QEMU firmware configuration", NULL /*paExtDescs*/, &hIoPorts);
-    AssertRCReturn(rc, rc);
 
     return VINF_SUCCESS;