Changeset 9925 in vbox

Timestamp:

Jun 25, 2008 2:42:31 PM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

32347

Message:

Yasm formatter: Fixes for sil, dil, spl, bpl and r8b-r15b.

Location:

trunk/src/VBox/Disassembler

Files:

• DisasmFormatYasm.cpp (modified) (3 diffs)
• testcase/tstAsmRegs-1.asm (modified) (1 diff)

trunk/src/VBox/Disassembler/DisasmFormatYasm.cpp

@@ -36 +36 @@
 static const char g_szSpaces[] =
 "                                                                               ";
-static const char g_aszYasmRegGen8x86[8][4] =
-{
-    "al\0",   "cl\0",   "dl\0",   "bl\0",   "ah\0",   "ch\0",   "dh\0",   "bh\0"
-};
-static const char g_aszYasmRegGen8Amd64[16][5] =
-{
-    "al\0\0", "cl\0\0", "dl\0\0", "bl\0\0", "spl\0",  "bpl\0",  "sil\0",  "dil\0",  "r8b\0",  "r9b\0",  "r10b",  "r11b",  "r12b",  "r13b",  "r14b",  "r15b"
+static const char g_aszYasmRegGen8[20][5] =
+{
+    "al\0\0", "cl\0\0", "dl\0\0", "bl\0\0", "ah\0\0", "ch\0\0", "dh\0\0", "bh\0\0", "r8b\0",  "r9b\0",  "r10b",  "r11b",  "r12b",  "r13b",  "r14b",  "r15b",  "spl\0",  "bpl\0",  "sil\0",  "dil\0"
 };
 static const char g_aszYasmRegGen16[16][5] =
@@ -107 +103 @@
     {
         case USE_REG_GEN8:
-            if (pCpu->opmode == CPUMODE_64BIT)
-            {
-                Assert(pParam->base.reg_gen < RT_ELEMENTS(g_aszYasmRegGen8Amd64));
-                const char *psz = g_aszYasmRegGen8Amd64[pParam->base.reg_gen];
-                *pcchReg = 2 + !!psz[2] + !!psz[3];
-                return psz;
-            }
-            *pcchReg = 2;
-            Assert(pParam->base.reg_gen < RT_ELEMENTS(g_aszYasmRegGen8x86));
-            return g_aszYasmRegGen8x86[pParam->base.reg_gen];
+        {
+            Assert(pParam->base.reg_gen < RT_ELEMENTS(g_aszYasmRegGen8));
+            const char *psz = g_aszYasmRegGen8[pParam->base.reg_gen];
+            *pcchReg = 2 + !!psz[2] + !!psz[3];
+            return psz;
+        }
 
         case USE_REG_GEN16:
@@ -184 +176 @@
         case USE_REG_SEG:
         {
-            Assert(pParam->base.reg_seg < RT_ELEMENTS(g_aszYasmRegCRx));
+            Assert(pParam->base.reg_seg < (DIS_SELREG)RT_ELEMENTS(g_aszYasmRegCRx));
             const char *psz = g_aszYasmRegSeg[pParam->base.reg_seg];
             *pcchReg = 2;

trunk/src/VBox/Disassembler/testcase/tstAsmRegs-1.asm

@@ -40 +40 @@
     mov     al, dl
     mov     al, dh
-%if TEST_BITS == 64 && 0 ; This is busted both in the yasm formatter (all) and in the disasm core (first 4).
+%if TEST_BITS == 64
     mov     al, dil
     mov     al, sil