- Timestamp:
- Apr 3, 2023 12:20:40 PM (22 months ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp
r99220 r99261 1494 1494 1495 1495 /* Blocking-by-STI or blocking-by-MovSS. */ 1496 if (!CPUMIsInInterruptShadowWithUpdate(&pVCpu->cpum.GstCtx)) 1496 uint32_t fInhibitShw; 1497 if (!CPUMIsInInterruptShadowWithUpdateEx(&pVCpu->cpum.GstCtx, &fInhibitShw)) 1497 1498 { /* probable */} 1498 1499 else 1499 1500 { 1500 1501 if (pVCpu->cpum.GstCtx.rip == pVCpu->cpum.GstCtx.uRipInhibitInt) 1501 pVmcs->u32GuestIntrState |= VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS; 1502 1503 /* Clear inhibition unconditionally since we've ensured it isn't set prior to executing VMLAUNCH/VMRESUME. */ 1504 CPUMClearInterruptShadow(&pVCpu->cpum.GstCtx); 1502 { 1503 /* 1504 * We must take care to ensure only one of these bits are set. 1505 * Our emulation can have both set perhaps because AMD doesn't distinguish 1506 * between the two? Hence the 'else' with blocking-by-MovSS taking priority 1507 * since it blocks more. Nested Ubuntu running inside a Hyper-V enabled 1508 * Windows Server 2008 R2 guest runs into this issue. 1509 * 1510 * See Intel spec. 26.3.1.5 "Checks on Guest Non-Register State". 1511 */ 1512 if (fInhibitShw & CPUMCTX_INHIBIT_SHADOW_SS) 1513 pVmcs->u32GuestIntrState |= VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS; 1514 else 1515 { 1516 Assert(fInhibitShw & CPUMCTX_INHIBIT_SHADOW_STI); 1517 pVmcs->u32GuestIntrState |= VMX_VMCS_GUEST_INT_STATE_BLOCK_STI; 1518 } 1519 } 1505 1520 } 1506 1521 /* Nothing to do for SMI/enclave. We don't support enclaves or SMM yet. */
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